move mcu cmsis file to /mcu
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hathach
254
mcu/lpc43xx/CMSIS_LPC43xx_DriverLib/inc/spifi_rom_api.h
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254
mcu/lpc43xx/CMSIS_LPC43xx_DriverLib/inc/spifi_rom_api.h
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/***********************************************************************
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* Copyright(C) 2011, NXP Semiconductor
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* All rights reserved.
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*
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* Software that is described herein is for illustrative purposes only
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* which provides customers with programming information regarding the
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* products. This software is supplied "AS IS" without any warranties.
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* NXP Semiconductors assumes no responsibility or liability for the
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* use of the software, conveys no license or title under any patent,
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* copyright, or mask work right to the product. NXP Semiconductors
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* reserves the right to make changes in the software without
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* notification. NXP Semiconductors also make no representation or
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* warranty that such application will be suitable for the specified
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* use without further testing or modification.
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* Permission to use, copy, modify, and distribute this software and its
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* documentation is hereby granted, under NXP Semiconductors<72>
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* relevant copyright in the software, without fee, provided that it
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* is used in conjunction with NXP Semiconductors microcontrollers. This
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* copyright, permission, and disclaimer notice must appear in all copies of
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* this code.
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**********************************************************************/
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#ifndef SPIFI_ROM_API_H
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#define SPIFI_ROM_API_H
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#include <stdint.h>
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/* define the symbol TESTING in the environment if test output desired */
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/* maintain LONGEST_PROT >= the length (in bytes) of the largest
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protection block of any serial flash that this driver handles */
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#define LONGEST_PROT 68
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typedef uint8_t uc;
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#ifndef NULL
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#define NULL ((void *)0)
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#endif
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/* protection/sector descriptors */
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typedef struct {
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uint32_t base;
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uc flags;
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int8_t log2;
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uint16_t rept;
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} protEnt;
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/* bits in the flags byte */
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enum {RWPROT=1};
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/* overall data structure includes # sectors, length of protection reg,
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array of descriptors
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typedef struct {
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uint16_t sectors;
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uint16_t protBytes;
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protEnt *entries;
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} protDesc; */
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typedef union {
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uint16_t hw;
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uc byte[2];
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}stat_t;
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/* the object that init returns, and other routines use as an operand */
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typedef struct {
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uint32_t base, regbase, devSize, memSize;
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uc mfger, devType, devID, busy;
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stat_t stat;
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uint16_t reserved;
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uint16_t set_prot, write_prot;
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uint32_t mem_cmd, prog_cmd;
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uint16_t sectors, protBytes;
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uint32_t opts, errCheck;
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uc erase_shifts[4], erase_ops[4];
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protEnt *protEnts;
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char prot[LONGEST_PROT];
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} SPIFIobj;
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/* operands of program and erase */
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typedef struct {
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char *dest;
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uint32_t length;
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char *scratch;
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int32_t protect;
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uint32_t options;
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} SPIFIopers;
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/* instruction classes for wait_busy */
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typedef enum {stat_inst, block_erase, prog_inst, chip_erase} inst_type;
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/* bits in options operands (MODE3, RCVCLK, and FULLCLK
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have the same relationship as in the Control register) */
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#define S_MODE3 1
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#define S_MODE0 0
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#define S_MINIMAL 2
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#define S_MAXIMAL 0
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#define S_FORCE_ERASE 4
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#define S_ERASE_NOT_REQD 8
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#define S_CALLER_ERASE 8
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#define S_ERASE_AS_REQD 0
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#define S_VERIFY_PROG 0x10
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#define S_VERIFY_ERASE 0x20
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#define S_NO_VERIFY 0
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#define S_RCVCLK 0x80
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#define S_INTCLK 0
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#define S_FULLCLK 0x40
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#define S_HALFCLK 0
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#define S_DUAL 0x100
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#define S_CALLER_PROT 0x200
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#define S_DRIVER_PROT 0
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/* the following values in the first post-address memory command byte work
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for all known quad devices that support "no opcode" operation */
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#define NO_OPCODE_FOLLOWS 0xA5
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#define OPCODE_FOLLOWS 0xFF
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/* basic SPI commands for serial flash */
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#define BASE_READ_CMD (CMD_RD<<OPCODE_SHIFT|4<<FRAMEFORM_SHIFT|UNL_DATA)
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#define FAST_READ_CMD (CMD_READ_FAST<<OPCODE_SHIFT|4<<FRAMEFORM_SHIFT|1<<INTLEN_SHIFT|UNL_DATA)
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#define BASE_PROG_CMD (CMD_PROG<<OPCODE_SHIFT|4<<FRAMEFORM_SHIFT|DOUT)
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/* the length of a standard program command is 256 on all devices */
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#define PROG_SIZE 256
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/* options in obj->opts (mostly for setMulti) */
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/* used by Winbond: send 0xA3 command so hardware can read faster */
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#define OPT_SEND_A3 1
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/* used by SST: send 0x38 command to enable quad and allow full command set */
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#define OPT_SEND_38 2
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/* used by Winbond and others: read status reg 2, check it,
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if necessary write it back with Quad Enable set */
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#define OPT_35_OR02_01 4
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/* used by Atmel: read Configuration register, if necessary set Quad Enable */
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#define OPT_3F_OR80_3E 8
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/* used by Numonyx to set all-quad mode: only for parts that include RSTQIO */
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#define OPT_65_CLR_C0_61 0x10
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/* used by Numonyx: send 0x81 command to write Volatile Configuration Register
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to set # dummy bytes and allow XIP mode */
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#define OPT_81 0x20
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/* set for devices without full device erase command (Numonyx type 0x40) */
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#define OPT_NO_DEV_ERASE 0x40
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/* used by Macronix: status reg 2 includes selection between write-protect
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in status reg and command-based */
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#define OPT_WPSEL 0x80
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/* set when protection data has been read into the SPIFI object */
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#define OPT_PROT_READ 0x100
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/* set if device needs 4-byte address (and maybe 0x4B command = use 4-byte address) */
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#define OPT_4BAD 0x200
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/* set if setMulti should set the Dual bit in Control reg */
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#define OPT_DUAL 0x400
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/* send "# dummy bits" in C0 command to Winbond */
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#define OPT_C0 0x800
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/* set QE for Chingis */
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#define OPT_05_OR40_01 0x1000
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/* write status does not go busy */
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#define OPT_01_NO_BUSY 0x2000
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/* protection mode bits moved from protMode byte to opts Fri May 13 2011 */
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#define OPT_PROT_STAT 0x4000
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#define OPT_PROT_REG 0x8000
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#define OPT_PROT_CMD3 0x10000
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#define OPT_PROT_CMDE 0x20000
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#define OPT_PROT_MASK 0x3C000
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#define OPT_ALL_QUAD 0x40000
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#ifndef OMIT_ROM_TABLE
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/* interface to ROM API */
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typedef struct {
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int32_t (*spifi_init) (SPIFIobj *obj, uint32_t csHigh, uint32_t options,
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uint32_t mhz);
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int32_t (*spifi_program) (SPIFIobj *obj, char *source, SPIFIopers *opers);
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int32_t (*spifi_erase) (SPIFIobj *obj, SPIFIopers *opers);
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/* mode switching */
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void (*cancel_mem_mode)(SPIFIobj *obj);
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void (*set_mem_mode) (SPIFIobj *obj);
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/* mid level functions */
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int32_t (*checkAd) (SPIFIobj *obj, SPIFIopers *opers);
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int32_t (*setProt) (SPIFIobj *obj, SPIFIopers *opers, char *change,
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char *saveProt);
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int32_t (*check_block) (SPIFIobj *obj, char *source, SPIFIopers *opers,
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uint32_t check_program);
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int32_t (*send_erase_cmd) (SPIFIobj *obj, uint8_t op, uint32_t addr);
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uint32_t (*ck_erase) (SPIFIobj *obj, uint32_t *addr, uint32_t length);
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int32_t (*prog_block) (SPIFIobj *obj, char *source, SPIFIopers *opers,
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uint32_t *left_in_page);
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uint32_t (*ck_prog) (SPIFIobj *obj, char *source, char *dest, uint32_t length);
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/* low level functions */
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void(*setSize) (SPIFIobj *obj, int32_t value);
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int32_t (*setDev) (SPIFIobj *obj, uint32_t opts, uint32_t mem_cmd,
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uint32_t prog_cmd);
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uint32_t (*cmd) (uc op, uc addrLen, uc intLen, uint16_t len);
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uint32_t (*readAd) (SPIFIobj *obj, uint32_t cmd, uint32_t addr);
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void (*send04) (SPIFIobj *obj, uc op, uc len, uint32_t value);
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void (*wren_sendAd) (SPIFIobj *obj, uint32_t cmd, uint32_t addr, uint32_t value);
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int32_t (*write_stat) (SPIFIobj *obj, uc len, uint16_t value);
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int32_t (*wait_busy) (SPIFIobj *obj, uc prog_or_erase);
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} SPIFI_RTNS;
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#define define_spifi_romPtr(name) const SPIFI_RTNS *name=*((SPIFI_RTNS **)SPIFI_ROM_PTR)
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#endif /* OMIT_ROM_TABLE */
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#ifdef USE_SPIFI_LIB
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extern SPIFI_RTNS spifi_table;
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#endif /* USE_SPIFI_LIB */
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/* example of using this interface:
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#include "spifi_rom_api.h"
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#define CSHIGH 4
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#define SPIFI_MHZ 80
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#define source_data_ad (char *)1234
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int32_t rc;
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SPIFIopers opers;
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define_spifi_romPtr(spifi);
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SPIFIobj *obj = malloc(sizeof(SPIFIobj));
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if (!obj) { can't allocate memory }
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rc = spifi->spifi_init (obj, CSHIGH, S_FULLCLK+S_RCVCLK, SPIFI_MHZ);
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if (rc) { investigate init error rc }
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printf ("the serial flash contains %d bytes\n", obj->devSize);
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opers.dest = where_to_program;
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opers.length = how_many_bytes;
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opers.scratch = NULL; // unprogrammed data is not saved/restored
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opers.protect = -1; // save & restore protection
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opers.options = S_VERIFY_PROG;
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rc = spifi->spifi_program (obj, source_data_ad, &opers);
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if (rc) { investigate program error rc }
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*/
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/* these are for normal users, including boot code */
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int32_t spifi_init (SPIFIobj *obj, uint32_t csHigh, uint32_t options, uint32_t mhz);
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int32_t spifi_program (SPIFIobj *obj, char *source, SPIFIopers *opers);
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int32_t spifi_erase (SPIFIobj *obj, SPIFIopers *opers);
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/* these are used by the manufacturer-specific init functions */
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void setSize (SPIFIobj *obj, int32_t value);
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int32_t setDev (SPIFIobj *obj, uint32_t opts, uint32_t mem_cmd, uint32_t prog_cmd);
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uint32_t read04(SPIFIobj *obj, uc op, uc len);
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int32_t write_stat (SPIFIobj *obj, uc len, uint16_t value);
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void setProtEnts(SPIFIobj *obj, const protEnt *p, uint32_t protTabLen);
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/* needs to be defined for each platform */
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void pullMISO(int high);
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#ifdef TESTING
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/* used by testing code */
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unsigned short getProtBytes (SPIFIobj *obj, unsigned short *sectors);
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/* predeclare a debug routine */
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void wait_sample (volatile unsigned *addr, unsigned mask, unsigned value);
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#endif
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#endif /* SPIFI_ROM_API_H */
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