fix a problem with dcd 13uxx dcd_pipe_clear_stall that should clear toggle for buffer0 (instead of active buffer)
as the next transfer is always forced to be happened on buffer0
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@@ -105,7 +105,7 @@ uint16_t tusbd_msc_read10_cb (uint8_t coreid, uint8_t lun, void** pp_buffer, uin
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return 1;
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}
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// Stall write10 as this is readonly disk
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// Stall write10 by return 0, as this is readonly disk
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uint16_t tusbd_msc_write10_cb(uint8_t coreid, uint8_t lun, void** pp_buffer, uint32_t lba, uint16_t block_count)
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{
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(*pp_buffer) = NULL;
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