fix(hcd_rp2040) assert/panic endpoint already active: when a device reset while having on-going control transfer
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@@ -459,28 +459,33 @@ tusb_speed_t hcd_port_speed_get(uint8_t rhport)
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}
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// Close all opened endpoint belong to this device
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// Close all opened endpoint belong to this device
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void hcd_device_close(uint8_t rhport, uint8_t dev_addr)
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void hcd_device_close(uint8_t rhport, uint8_t dev_addr) {
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{
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pico_trace("hcd_device_close %d\n", dev_addr);
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pico_trace("hcd_device_close %d\n", dev_addr);
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(void) rhport;
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(void) rhport;
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if (dev_addr == 0) return;
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// reset epx if it is currently active with unplugged device
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if (epx.configured && epx.active && epx.dev_addr == dev_addr) {
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epx.configured = false;
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*epx.endpoint_control = 0;
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*epx.buffer_control = 0;
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hw_endpoint_reset_transfer(&epx);
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}
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for (size_t i = 1; i < TU_ARRAY_SIZE(ep_pool); i++)
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// dev0 only has ep0
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{
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if (dev_addr != 0) {
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hw_endpoint_t* ep = &ep_pool[i];
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for (size_t i = 1; i < TU_ARRAY_SIZE(ep_pool); i++) {
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hw_endpoint_t *ep = &ep_pool[i];
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if (ep->dev_addr == dev_addr && ep->configured) {
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// in case it is an interrupt endpoint, disable it
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usb_hw_clear->int_ep_ctrl = (1 << (ep->interrupt_num + 1));
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usb_hw->int_ep_addr_ctrl[ep->interrupt_num] = 0;
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if (ep->dev_addr == dev_addr && ep->configured)
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// unconfigure the endpoint
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{
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ep->configured = false;
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// in case it is an interrupt endpoint, disable it
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*ep->endpoint_control = 0;
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usb_hw_clear->int_ep_ctrl = (1 << (ep->interrupt_num + 1));
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*ep->buffer_control = 0;
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usb_hw->int_ep_addr_ctrl[ep->interrupt_num] = 0;
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hw_endpoint_reset_transfer(ep);
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}
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// unconfigure the endpoint
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ep->configured = false;
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*ep->endpoint_control = 0;
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*ep->buffer_control = 0;
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hw_endpoint_reset_transfer(ep);
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}
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}
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}
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}
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}
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}
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@@ -557,7 +562,7 @@ bool hcd_edpt_xfer(uint8_t rhport, uint8_t dev_addr, uint8_t ep_addr, uint8_t *
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}
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}
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// If a normal transfer (non-interrupt) then initiate using
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// If a normal transfer (non-interrupt) then initiate using
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// sie ctrl registers. Otherwise interrupt ep registers should
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// sie ctrl registers. Otherwise, interrupt ep registers should
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// already be configured
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// already be configured
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if ( ep == &epx )
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if ( ep == &epx )
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{
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{
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@@ -597,13 +602,12 @@ bool hcd_setup_send(uint8_t rhport, uint8_t dev_addr, uint8_t const setup_packet
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(void) rhport;
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(void) rhport;
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// Copy data into setup packet buffer
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// Copy data into setup packet buffer
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for ( uint8_t i = 0; i < 8; i++ )
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for (uint8_t i = 0; i < 8; i++) {
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{
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usbh_dpram->setup_packet[i] = setup_packet[i];
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usbh_dpram->setup_packet[i] = setup_packet[i];
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}
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}
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// Configure EP0 struct with setup info for the trans complete
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// Configure EP0 struct with setup info for the trans complete
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struct hw_endpoint * ep = _hw_endpoint_allocate(0);
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struct hw_endpoint * ep = _hw_endpoint_allocate( (uint8_t) TUSB_XFER_CONTROL);
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TU_ASSERT(ep);
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TU_ASSERT(ep);
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// EPX should be inactive
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// EPX should be inactive
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@@ -110,7 +110,7 @@ void __tusb_irq_path_func(_hw_endpoint_buffer_control_update32)(struct hw_endpoi
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*ep->buffer_control = value & ~USB_BUF_CTRL_AVAIL;
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*ep->buffer_control = value & ~USB_BUF_CTRL_AVAIL;
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// 4.1.2.5.1 Con-current access: 12 cycles (should be good for 48*12Mhz = 576Mhz) after write to buffer control
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// 4.1.2.5.1 Con-current access: 12 cycles (should be good for 48*12Mhz = 576Mhz) after write to buffer control
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// Don't need delay in host mode as host is in charge
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// Don't need delay in host mode as host is in charge
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if ( !is_host_mode()) {
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if (!is_host_mode()) {
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busy_wait_at_least_cycles(12);
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busy_wait_at_least_cycles(12);
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}
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}
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}
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}
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