clean up
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@@ -43,8 +43,6 @@
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#include "hal/include/hal_init.h"
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#include "hpl/gclk/hpl_gclk_base.h"
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#include "hpl_mclk_config.h"
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#include "peripheral_clk_config.h"
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//--------------------------------------------------------------------+
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// MACRO TYPEDEF CONSTANT ENUM DECLARATION
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@@ -60,7 +58,7 @@
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void board_init(void)
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{
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// Clock init ( follow hpl_init.c )
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// hri_nvmctrl_set_CTRLA_RWS_bf(NVMCTRL, CONF_NVM_WAIT_STATE);
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hri_nvmctrl_set_CTRLA_RWS_bf(NVMCTRL, 0);
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_osc32kctrl_init_sources();
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_oscctrl_init_sources();
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@@ -84,7 +82,7 @@ void board_init(void)
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/* USB Clock init
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* The USB module requires a GCLK_USB of 48 MHz ~ 0.25% clock
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* for low speed and full speed operation. */
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hri_gclk_write_PCHCTRL_reg(GCLK, USB_GCLK_ID, CONF_GCLK_USB_SRC | GCLK_PCHCTRL_CHEN);
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hri_gclk_write_PCHCTRL_reg(GCLK, USB_GCLK_ID, GCLK_PCHCTRL_GEN_GCLK1_Val | GCLK_PCHCTRL_CHEN);
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hri_mclk_set_AHBMASK_USB_bit(MCLK);
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hri_mclk_set_APBBMASK_USB_bit(MCLK);
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