rename xfer complete enum
This commit is contained in:
@@ -251,10 +251,10 @@ void test_cdc_xfer_notification_pipe(void)
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cdch_data[dev_addr-1].pipe_out = pipe_out;
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cdch_data[dev_addr-1].pipe_in = pipe_in;
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tusbh_cdc_xfer_isr_Expect(dev_addr, TUSB_EVENT_XFER_COMPLETE, CDC_PIPE_NOTIFICATION, 10);
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tusbh_cdc_xfer_isr_Expect(dev_addr, XFER_RESULT_SUCCESS, CDC_PIPE_NOTIFICATION, 10);
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//------------- CUT -------------//
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cdch_isr(pipe_notification, TUSB_EVENT_XFER_COMPLETE, 10);
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cdch_isr(pipe_notification, XFER_RESULT_SUCCESS, 10);
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}
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void test_cdc_xfer_pipe_out(void)
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@@ -267,10 +267,10 @@ void test_cdc_xfer_pipe_out(void)
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cdch_data[dev_addr-1].pipe_out = pipe_out;
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cdch_data[dev_addr-1].pipe_in = pipe_in;
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tusbh_cdc_xfer_isr_Expect(dev_addr, TUSB_EVENT_XFER_ERROR, CDC_PIPE_DATA_OUT, 20);
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tusbh_cdc_xfer_isr_Expect(dev_addr, XFER_RESULT_FAILED, CDC_PIPE_DATA_OUT, 20);
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//------------- CUT -------------//
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cdch_isr(pipe_out, TUSB_EVENT_XFER_ERROR, 20);
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cdch_isr(pipe_out, XFER_RESULT_FAILED, 20);
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}
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void test_cdc_xfer_pipe_in(void)
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@@ -283,8 +283,8 @@ void test_cdc_xfer_pipe_in(void)
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cdch_data[dev_addr-1].pipe_out = pipe_out;
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cdch_data[dev_addr-1].pipe_in = pipe_in;
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tusbh_cdc_xfer_isr_Expect(dev_addr, TUSB_EVENT_XFER_STALLED, CDC_PIPE_DATA_IN, 0);
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tusbh_cdc_xfer_isr_Expect(dev_addr, XFER_RESULT_STALLED, CDC_PIPE_DATA_IN, 0);
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//------------- CUT -------------//
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cdch_isr(pipe_in, TUSB_EVENT_XFER_STALLED, 0);
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cdch_isr(pipe_in, XFER_RESULT_STALLED, 0);
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}
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@@ -188,7 +188,7 @@ static tusb_error_t stub_pipe_notification_xfer(pipe_handle_t pipe_hdl, uint8_t
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buffer[0] = 1; // response available
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cdch_isr(pipe_hdl, TUSB_EVENT_XFER_COMPLETE, 8);
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cdch_isr(pipe_hdl, XFER_RESULT_SUCCESS, 8);
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return TUSB_ERROR_NONE;
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}
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@@ -208,7 +208,7 @@ void test_bulk_xfer_complete_isr(void)
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ehci_qtd_t* p_head = p_qhd_bulk->p_qtd_list_head;
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ehci_qtd_t* p_tail = p_qhd_bulk->p_qtd_list_tail;
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usbh_xfer_isr_Expect(pipe_hdl_bulk, TUSB_CLASS_MSC, TUSB_EVENT_XFER_COMPLETE, sizeof(data2)+sizeof(xfer_data));
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usbh_xfer_isr_Expect(pipe_hdl_bulk, TUSB_CLASS_MSC, XFER_RESULT_SUCCESS, sizeof(data2)+sizeof(xfer_data));
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//------------- Code Under Test -------------//
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ehci_controller_run(hostid);
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@@ -228,7 +228,7 @@ void test_control_xfer_complete_isr(void)
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{
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TEST_ASSERT_STATUS( hcd_pipe_control_xfer(dev_addr, &request_get_dev_desc, xfer_data) );
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usbh_xfer_isr_Expect(((pipe_handle_t){.dev_addr = dev_addr}), 0, TUSB_EVENT_XFER_COMPLETE, 18);
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usbh_xfer_isr_Expect(((pipe_handle_t){.dev_addr = dev_addr}), 0, XFER_RESULT_SUCCESS, 18);
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//------------- Code Under TEST -------------//
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ehci_controller_run(hostid);
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@@ -247,7 +247,7 @@ void test_control_xfer_error_isr(void)
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{
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TEST_ASSERT_STATUS( hcd_pipe_control_xfer(dev_addr, &request_get_dev_desc, xfer_data) );
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usbh_xfer_isr_Expect(((pipe_handle_t){.dev_addr = dev_addr}), 0, TUSB_EVENT_XFER_ERROR, 0);
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usbh_xfer_isr_Expect(((pipe_handle_t){.dev_addr = dev_addr}), 0, XFER_RESULT_FAILED, 0);
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//------------- Code Under TEST -------------//
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ehci_controller_run_error(hostid);
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@@ -266,7 +266,7 @@ void test_control_xfer_error_stall(void)
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{
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TEST_ASSERT_STATUS( hcd_pipe_control_xfer(dev_addr, &request_get_dev_desc, xfer_data) );
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usbh_xfer_isr_Expect(((pipe_handle_t){.dev_addr = dev_addr}), 0, TUSB_EVENT_XFER_STALLED, 0);
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usbh_xfer_isr_Expect(((pipe_handle_t){.dev_addr = dev_addr}), 0, XFER_RESULT_STALLED, 0);
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//------------- Code Under TEST -------------//
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ehci_controller_run_stall(hostid);
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@@ -201,7 +201,7 @@ void test_interrupt_xfer_complete_isr_interval_less_than_1ms(void)
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TEST_ASSERT_STATUS( hcd_pipe_xfer(pipe_hdl_interrupt, data2, sizeof(data2), true) );
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usbh_xfer_isr_Expect(pipe_hdl_interrupt, TUSB_CLASS_HID, TUSB_EVENT_XFER_COMPLETE, sizeof(xfer_data)+sizeof(data2));
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usbh_xfer_isr_Expect(pipe_hdl_interrupt, TUSB_CLASS_HID, XFER_RESULT_SUCCESS, sizeof(xfer_data)+sizeof(data2));
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ehci_qtd_t* p_head = p_qhd_interrupt->p_qtd_list_head;
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ehci_qtd_t* p_tail = p_qhd_interrupt->p_qtd_list_tail;
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@@ -242,7 +242,7 @@ void test_interrupt_xfer_error_isr(void)
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{
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TEST_ASSERT_STATUS( hcd_pipe_xfer(pipe_hdl_interrupt, xfer_data, sizeof(xfer_data), true) );
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usbh_xfer_isr_Expect(pipe_hdl_interrupt, TUSB_CLASS_HID, TUSB_EVENT_XFER_ERROR, 0);
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usbh_xfer_isr_Expect(pipe_hdl_interrupt, TUSB_CLASS_HID, XFER_RESULT_FAILED, 0);
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//------------- Code Under TEST -------------//
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ehci_controller_run_error(hostid);
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@@ -254,7 +254,7 @@ void test_interrupt_xfer_error_stall(void)
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{
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TEST_ASSERT_STATUS( hcd_pipe_xfer(pipe_hdl_interrupt, xfer_data, sizeof(xfer_data), true) );
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usbh_xfer_isr_Expect(pipe_hdl_interrupt, TUSB_CLASS_HID, TUSB_EVENT_XFER_STALLED, 0);
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usbh_xfer_isr_Expect(pipe_hdl_interrupt, TUSB_CLASS_HID, XFER_RESULT_STALLED, 0);
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//------------- Code Under TEST -------------//
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ehci_controller_run_stall(hostid);
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@@ -216,10 +216,10 @@ void test_keyboard_get_ok()
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void test_keyboard_isr_event_complete(void)
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{
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tusbh_hid_keyboard_isr_Expect(dev_addr, TUSB_EVENT_XFER_COMPLETE);
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tusbh_hid_keyboard_isr_Expect(dev_addr, XFER_RESULT_SUCCESS);
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//------------- Code Under TEST -------------//
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hidh_isr(p_hidh_kbd->pipe_hdl, TUSB_EVENT_XFER_COMPLETE, 8);
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hidh_isr(p_hidh_kbd->pipe_hdl, XFER_RESULT_SUCCESS, 8);
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// tusbh_device_get_state_IgnoreAndReturn(TUSB_DEVICE_STATE_CONFIGURED);
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// TEST_ASSERT_EQUAL(TUSB_INTERFACE_STATUS_COMPLETE, tusbh_hid_keyboard_status(dev_addr));
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@@ -189,10 +189,10 @@ void test_mouse_get_ok()
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void test_mouse_isr_event_xfer_complete(void)
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{
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tusbh_hid_mouse_isr_Expect(dev_addr, TUSB_EVENT_XFER_COMPLETE);
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tusbh_hid_mouse_isr_Expect(dev_addr, XFER_RESULT_SUCCESS);
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//------------- Code Under TEST -------------//
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hidh_isr(p_hidh_mouse->pipe_hdl, TUSB_EVENT_XFER_COMPLETE, 8);
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hidh_isr(p_hidh_mouse->pipe_hdl, XFER_RESULT_SUCCESS, 8);
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tusbh_device_get_state_IgnoreAndReturn(TUSB_DEVICE_STATE_CONFIGURED);
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// TEST_ASSERT_EQUAL(TUSB_INTERFACE_STATUS_COMPLETE, tusbh_hid_mouse_status(dev_addr));
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@@ -200,10 +200,10 @@ void test_mouse_isr_event_xfer_complete(void)
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void test_mouse_isr_event_xfer_error(void)
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{
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tusbh_hid_mouse_isr_Expect(dev_addr, TUSB_EVENT_XFER_ERROR);
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tusbh_hid_mouse_isr_Expect(dev_addr, XFER_RESULT_FAILED);
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//------------- Code Under TEST -------------//
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hidh_isr(p_hidh_mouse->pipe_hdl, TUSB_EVENT_XFER_ERROR, 0);
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hidh_isr(p_hidh_mouse->pipe_hdl, XFER_RESULT_FAILED, 0);
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tusbh_device_get_state_IgnoreAndReturn(TUSB_DEVICE_STATE_CONFIGURED);
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// TEST_ASSERT_EQUAL(TUSB_INTERFACE_STATUS_ERROR, tusbh_hid_mouse_status(dev_addr));
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@@ -181,7 +181,7 @@ tusb_error_t control_xfer_stub(uint8_t dev_addr, const tusb_control_request_t *
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usbh_xfer_isr(
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(pipe_handle_t) { .dev_addr = (num_call > 1 ? 1 : 0), .xfer_type = TUSB_XFER_CONTROL },
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0, TUSB_EVENT_XFER_COMPLETE, 0);
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0, XFER_RESULT_SUCCESS, 0);
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return TUSB_ERROR_NONE;
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}
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