dcd lpc17xx, route control endpoint to EP_FAST
This commit is contained in:
		@@ -167,7 +167,7 @@ static void bus_reset(void)
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  LPC_USB->USBEpIntClr     = 0xFFFFFFFF; // clear all pending interrupt
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  LPC_USB->USBDevIntClr    = 0xFFFFFFFF; // clear all pending interrupt
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  LPC_USB->USBEpIntEn      = 0x03UL;     // control endpoint cannot use DMA, non-control all use DMA
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  LPC_USB->USBEpIntPri     = 0;          // same priority for all endpoint
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  LPC_USB->USBEpIntPri     = 0x03UL;     // fast for control endpoint
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  // step 8 : DMA set up
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  LPC_USB->USBEpDMADis     = 0xFFFFFFFF; // firstly disable all dma
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@@ -190,7 +190,7 @@ bool dcd_init(uint8_t rhport)
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  bus_reset();
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  LPC_USB->USBDevIntEn = (DEV_INT_DEVICE_STATUS_MASK | DEV_INT_ENDPOINT_SLOW_MASK | DEV_INT_ERROR_MASK);
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  LPC_USB->USBDevIntEn = (DEV_INT_DEVICE_STATUS_MASK | DEV_INT_ENDPOINT_FAST_MASK | DEV_INT_ENDPOINT_SLOW_MASK | DEV_INT_ERROR_MASK);
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  LPC_USB->USBUDCAH = (uint32_t) _dcd.udca;
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  LPC_USB->USBDMAIntEn = (DMA_INT_END_OF_XFER_MASK /*| DMA_INT_NEW_DD_REQUEST_MASK*/ | DMA_INT_ERROR_MASK);
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@@ -429,34 +429,8 @@ bool dcd_edpt_xfer (uint8_t rhport, uint8_t ep_addr, uint8_t* buffer, uint16_t t
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//--------------------------------------------------------------------+
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// ISR
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//--------------------------------------------------------------------+
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static void dd_complete_isr(uint8_t rhport, uint8_t ep_id)
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{
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  dma_desc_t* const dd = &_dcd.dd[ep_id];
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  uint8_t result = (dd->status == DD_STATUS_NORMAL || dd->status == DD_STATUS_DATA_UNDERUN) ? XFER_RESULT_SUCCESS : XFER_RESULT_FAILED;
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  uint8_t const ep_addr = (ep_id / 2) | ((ep_id & 0x01) ? TUSB_DIR_IN_MASK : 0);
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  dcd_event_xfer_complete(rhport, ep_addr, dd->present_count, result, true);
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}
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static void normal_xfer_isr (uint8_t rhport, uint32_t eot_int)
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{
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  for ( uint8_t ep_id = 2; ep_id < DCD_ENDPOINT_MAX; ep_id++ )
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  {
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    if ( BIT_TEST_(eot_int, ep_id) )
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    {
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      if ( ep_id & 0x01 )
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      {
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        // IN
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        LPC_USB->USBEpIntEn |= BIT_(ep_id);
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      }else
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      {
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        // OUT
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        dd_complete_isr(rhport, ep_id);
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      }
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    }
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  }
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}
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// handle control xfer (slave mode)
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static void control_xfer_isr(uint8_t rhport, uint32_t ep_int_status)
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{
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  // Control out complete
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@@ -497,6 +471,7 @@ static void control_xfer_isr(uint8_t rhport, uint32_t ep_int_status)
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  }
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}
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// handle bus event signal
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static void bus_event_isr(uint8_t rhport)
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{
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  uint8_t const dev_status = sie_read(SIE_CMDCODE_DEVICE_STATUS, 1);
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@@ -525,6 +500,17 @@ static void bus_event_isr(uint8_t rhport)
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  }
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}
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// Helper to complete a DMA descriptor for non-control transfer
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static void dd_complete_isr(uint8_t rhport, uint8_t ep_id)
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{
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  dma_desc_t* const dd = &_dcd.dd[ep_id];
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  uint8_t result = (dd->status == DD_STATUS_NORMAL || dd->status == DD_STATUS_DATA_UNDERUN) ? XFER_RESULT_SUCCESS : XFER_RESULT_FAILED;
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  uint8_t const ep_addr = (ep_id / 2) | ((ep_id & 0x01) ? TUSB_DIR_IN_MASK : 0);
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  dcd_event_xfer_complete(rhport, ep_addr, dd->present_count, result, true);
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}
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// main USB IRQ handler
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void hal_dcd_isr(uint8_t rhport)
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{
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  uint32_t const dev_int_status = LPC_USB->USBDevIntSt & LPC_USB->USBDevIntEn;
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@@ -536,16 +522,20 @@ void hal_dcd_isr(uint8_t rhport)
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    bus_event_isr(rhport);
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  }
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  // Control Endpoint and Non-control IN transfer complete
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  if (dev_int_status & DEV_INT_ENDPOINT_SLOW_MASK)
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  // Endpoint interrupt
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  uint32_t const ep_int_status = LPC_USB->USBEpIntSt & LPC_USB->USBEpIntEn;
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  // Control Endpoint are fast
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  if (dev_int_status & DEV_INT_ENDPOINT_FAST_MASK)
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  {
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    uint32_t const ep_int_status = LPC_USB->USBEpIntSt & LPC_USB->USBEpIntEn;
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    // Note clear USBEpIntClr will also clear the setup received bit --> clear after handle setup packet
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    // Only clear USBEpIntClr 1 endpoint each, and should wait for CDFULL bit set
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    control_xfer_isr(rhport, ep_int_status);
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  }
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    // For non-control only IN transfer is enabled
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  // non-control IN are slow
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  if (dev_int_status & DEV_INT_ENDPOINT_SLOW_MASK)
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  {
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    for ( uint8_t ep_id = 3; ep_id < DCD_ENDPOINT_MAX; ep_id += 2 )
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    {
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      if ( BIT_TEST_(ep_int_status, ep_id) )
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@@ -575,7 +565,7 @@ void hal_dcd_isr(uint8_t rhport)
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      {
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        if ( ep_id & 0x01 )
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        {
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          // IN
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          // IN enable EpInt for end of usb transfer
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          LPC_USB->USBEpIntEn |= BIT_(ep_id);
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        }else
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        {
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