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add test & code for open bulk transfer to hcd_pipe_open()

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This commit is contained in:
hathach
2013-03-05 23:08:00 +07:00
parent c0bbc2aded
commit b3775b631b
7 changed files with 133 additions and 52 deletions
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96
tests/test/host/ehci/test_ehci_pipe.c
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@@ -53,7 +53,7 @@ usbh_device_info_t usbh_device_info_pool[TUSB_CFG_HOST_DEVICE_MAX+1];
LPC_USB0_Type lpc_usb0;
LPC_USB1_Type lpc_usb1;
uint8_t const max_packet_size = 64;
uint8_t const control_max_packet_size = 64;
uint8_t dev_addr;
uint8_t hub_addr;
uint8_t hub_port;
@@ -61,6 +61,16 @@ uint8_t hostid;
ehci_qhd_t *async_head;
tusb_descriptor_endpoint_t const desc_ept_bulk_in =
{
.bLength = sizeof(tusb_descriptor_endpoint_t),
.bDescriptorType = TUSB_DESC_ENDPOINT,
.bEndpointAddress = 0x81,
.bmAttributes = { .xfer = TUSB_XFER_BULK },
.wMaxPacketSize = 64,
.bInterval = 0
};
//--------------------------------------------------------------------+
// Setup/Teardown + helper declare
//--------------------------------------------------------------------+
@@ -96,21 +106,14 @@ void tearDown(void)
//--------------------------------------------------------------------+
// CONTROL PIPE
//--------------------------------------------------------------------+
void verify_control_open_qhd(ehci_qhd_t *p_qhd)
void verify_open_qhd(ehci_qhd_t *p_qhd)
{
TEST_ASSERT_EQUAL(dev_addr, p_qhd->device_address);
TEST_ASSERT_FALSE(p_qhd->inactive_next_xact);
TEST_ASSERT_EQUAL(0, p_qhd->endpoint_number);
TEST_ASSERT_EQUAL(1, p_qhd->data_toggle_control);
TEST_ASSERT_EQUAL(max_packet_size, p_qhd->max_package_size);
TEST_ASSERT_EQUAL(0, p_qhd->nak_count_reload); // TODO NAK Reload disable
TEST_ASSERT_EQUAL(0, p_qhd->smask);
TEST_ASSERT_EQUAL(0, p_qhd->cmask);
TEST_ASSERT_EQUAL(hub_addr, p_qhd->hub_address);
TEST_ASSERT_EQUAL(hub_port, p_qhd->hub_port);
TEST_ASSERT_EQUAL(1, p_qhd->mult);
TEST_ASSERT(p_qhd->qtd_overlay.next.terminate);
TEST_ASSERT(p_qhd->qtd_overlay.alternate.terminate);
TEST_ASSERT(p_qhd->qtd_overlay.halted);
@@ -120,13 +123,44 @@ void verify_control_open_qhd(ehci_qhd_t *p_qhd)
TEST_ASSERT_NULL(p_qhd->p_qtd_list);
}
void verify_bulk_open_qhd(ehci_qhd_t *p_qhd, tusb_descriptor_endpoint_t const * desc_endpoint)
{
verify_open_qhd(p_qhd);
TEST_ASSERT_FALSE(p_qhd->head_list_flag);
TEST_ASSERT_EQUAL(desc_endpoint->wMaxPacketSize, p_qhd->max_package_size);
TEST_ASSERT_EQUAL(desc_endpoint->bEndpointAddress & 0x0F, p_qhd->endpoint_number);
TEST_ASSERT_EQUAL(0, p_qhd->data_toggle_control);
TEST_ASSERT_EQUAL(0, p_qhd->smask);
TEST_ASSERT_EQUAL(0, p_qhd->cmask);
// TEST_ASSERT_EQUAL(desc_endpoint->bInterval); TEST highspeed bulk/control OUT
TEST_ASSERT_EQUAL(desc_endpoint->bEndpointAddress & 0x80 ? EHCI_PID_IN : EHCI_PID_OUT, p_qhd->pid_non_control);
//------------- async list check -------------//
TEST_ASSERT_EQUAL_HEX((uint32_t) p_qhd, align32(async_head->next.address));
TEST_ASSERT_FALSE(async_head->next.terminate);
TEST_ASSERT_EQUAL(EHCI_QUEUE_ELEMENT_QHD, async_head->next.type);
}
void verify_control_open_qhd(ehci_qhd_t *p_qhd)
{
verify_open_qhd(p_qhd);
TEST_ASSERT_EQUAL(control_max_packet_size, p_qhd->max_package_size);
TEST_ASSERT_EQUAL(0, p_qhd->endpoint_number);
TEST_ASSERT_EQUAL(1, p_qhd->data_toggle_control);
TEST_ASSERT_EQUAL(0, p_qhd->smask);
TEST_ASSERT_EQUAL(0, p_qhd->cmask);
}
void test_control_open_addr0_qhd_data(void)
{
dev_addr = 0;
ehci_qhd_t * const p_qhd = async_head;
hcd_pipe_control_open(dev_addr, max_packet_size);
hcd_pipe_control_open(dev_addr, control_max_packet_size);
verify_control_open_qhd(p_qhd);
TEST_ASSERT(p_qhd->head_list_flag);
@@ -136,7 +170,7 @@ void test_control_open_qhd_data(void)
{
ehci_qhd_t * const p_qhd = &ehci_data.device[dev_addr].control.qhd;
hcd_pipe_control_open(dev_addr, max_packet_size);
hcd_pipe_control_open(dev_addr, control_max_packet_size);
verify_control_open_qhd(p_qhd);
TEST_ASSERT_FALSE(p_qhd->head_list_flag);
@@ -153,7 +187,7 @@ void test_control_open_highspeed(void)
usbh_device_info_pool[dev_addr].speed = TUSB_SPEED_HIGH;
hcd_pipe_control_open(dev_addr, max_packet_size);
hcd_pipe_control_open(dev_addr, control_max_packet_size);
TEST_ASSERT_EQUAL(TUSB_SPEED_HIGH, p_qhd->endpoint_speed);
TEST_ASSERT_FALSE(p_qhd->non_hs_control_endpoint);
@@ -165,7 +199,7 @@ void test_control_open_non_highspeed(void)
usbh_device_info_pool[dev_addr].speed = TUSB_SPEED_FULL;
hcd_pipe_control_open(dev_addr, max_packet_size);
hcd_pipe_control_open(dev_addr, control_max_packet_size);
TEST_ASSERT_EQUAL(TUSB_SPEED_FULL, p_qhd->endpoint_speed);
TEST_ASSERT_TRUE(p_qhd->non_hs_control_endpoint);
@@ -174,28 +208,20 @@ void test_control_open_non_highspeed(void)
//--------------------------------------------------------------------+
// BULK PIPE
//--------------------------------------------------------------------+
void test_open_bulk_qhd_data(void)
void test_open_bulk_in_qhd_data(void)
{
// dev_addr = 1;
// for (uint8_t i=0; i<CONTROLLER_HOST_NUMBER; i++)
// {
// uint8_t hostid = i + TEST_CONTROLLER_HOST_START_INDEX;
// ehci_qhd_t * const async_head = get_async_head( hostid );
// ehci_qhd_t * const p_qhd = &ehci_data.device[dev_addr].control.qhd;
//
// usbh_device_info_pool[dev_addr].core_id = hostid;
// usbh_device_info_pool[dev_addr].hub_addr = hub_addr;
// usbh_device_info_pool[dev_addr].hub_port = hub_port;
//
// hcd_pipe_open(dev_addr, &desc_configuration.keyboard_endpoint);
//
// verify_control_open_qhd(p_qhd);
// TEST_ASSERT_FALSE(p_qhd->head_list_flag);
//
// //------------- async list check -------------//
// TEST_ASSERT_EQUAL_HEX((uint32_t) p_qhd, align32(async_head->next.address));
// TEST_ASSERT_FALSE(async_head->next.terminate);
// TEST_ASSERT_EQUAL(EHCI_QUEUE_ELEMENT_QHD, async_head->next.type);
// }
ehci_qhd_t *p_qhd;
tusb_descriptor_endpoint_t const * desc_endpoint = &desc_ept_bulk_in;
pipe_handle_t pipe_hdl;
pipe_hdl = hcd_pipe_open(dev_addr, desc_endpoint);
p_qhd = &ehci_data.device[ pipe_hdl.dev_addr ].qhd[ pipe_hdl.index ];
verify_bulk_open_qhd(p_qhd, desc_endpoint);
//------------- async list check -------------//
TEST_ASSERT_EQUAL_HEX((uint32_t) p_qhd, align32(async_head->next.address));
TEST_ASSERT_FALSE(async_head->next.terminate);
TEST_ASSERT_EQUAL(EHCI_QUEUE_ELEMENT_QHD, async_head->next.type);
}

4
tests/test/host/test_hid_host_keyboard.c
View File

@@ -67,7 +67,7 @@ void setUp(void)
memset(&report, 0, sizeof(tusb_keyboard_report_t));
keyboard_info_pool[0].instance_count = 0;
keyboard_info_pool[0].instance[0].pipe_in = 1;
keyboard_info_pool[0].instance[0].pipe_in = (pipe_handle_t) { .dev_addr = 1, .xfer_type = TUSB_XFER_INTERRUPT, .index = 1};
keyboard_info_pool[0].instance[0].report_size = sizeof(tusb_keyboard_report_t);
kbd_descriptor = ((tusb_descriptor_interface_t)
@@ -163,7 +163,7 @@ void test_keyboard_get_invalid_para()
void test_keyboard_get_class_not_supported()
{
tusbh_device_status_get_IgnoreAndReturn(TUSB_DEVICE_STATUS_READY);
keyboard_info_pool[device_hdl].instance[0].pipe_in = 0;
keyboard_info_pool[device_hdl].instance[0].pipe_in = (pipe_handle_t) { 0 };
TEST_ASSERT_EQUAL(TUSB_ERROR_CLASS_DEVICE_DONT_SUPPORT, tusbh_hid_keyboard_get(device_hdl, instance_num, &report));
}