diff --git a/hw/bsp/lpcxpresso51u68/LPC51U68_flash.ld b/hw/bsp/lpcxpresso51u68/LPC51U68_flash.ld new file mode 100644 index 000000000..89b46c692 --- /dev/null +++ b/hw/bsp/lpcxpresso51u68/LPC51U68_flash.ld @@ -0,0 +1,200 @@ +/* +** ################################################################### +** Processors: LPC51U68JBD48 +** LPC51U68JBD64 +** +** Compiler: GNU C Compiler +** Reference manual: LPC51U68 User manual User manual Rev. 1.0 13 Dec 2017 +** Version: rev. 1.0, 2017-12-15 +** Build: b180801 +** +** Abstract: +** Linker file for the GNU C Compiler +** +** Copyright 2016 Freescale Semiconductor, Inc. +** Copyright 2016-2018 NXP +** +** SPDX-License-Identifier: BSD-3-Clause +** +** http: www.nxp.com +** mail: support@nxp.com +** +** ################################################################### +*/ + + + +/* Entry Point */ +ENTRY(Reset_Handler) + +HEAP_SIZE = DEFINED(__heap_size__) ? __heap_size__ : 0x0400; +STACK_SIZE = DEFINED(__stack_size__) ? __stack_size__ : 0x0800; + +/* Specify the memory areas */ +MEMORY +{ + m_interrupts (RX) : ORIGIN = 0x00000000, LENGTH = 0x000000E0 + m_text (RX) : ORIGIN = 0x000000E0, LENGTH = 0x0003FF20 + m_data_sramx (RW) : ORIGIN = 0x04000000, LENGTH = 0x00008000 + m_data (RW) : ORIGIN = 0x20000000, LENGTH = 0x00010000 +} + +/* Define output sections */ +SECTIONS +{ + /* The startup code goes first into internal flash */ + .interrupts : + { + . = ALIGN(4); + KEEP(*(.isr_vector)) /* Startup code */ + . = ALIGN(4); + } > m_interrupts + + /* The program code and other data goes into internal flash */ + .text : + { + . = ALIGN(4); + *(.text) /* .text sections (code) */ + *(.text*) /* .text* sections (code) */ + *(.rodata) /* .rodata sections (constants, strings, etc.) */ + *(.rodata*) /* .rodata* sections (constants, strings, etc.) */ + *(.glue_7) /* glue arm to thumb code */ + *(.glue_7t) /* glue thumb to arm code */ + *(.eh_frame) + KEEP (*(.init)) + KEEP (*(.fini)) + . = ALIGN(4); + } > m_text + + .ARM.extab : + { + *(.ARM.extab* .gnu.linkonce.armextab.*) + } > m_text + + .ARM : + { + __exidx_start = .; + *(.ARM.exidx*) + __exidx_end = .; + } > m_text + + .ctors : + { + __CTOR_LIST__ = .; + /* gcc uses crtbegin.o to find the start of + the constructors, so we make sure it is + first. Because this is a wildcard, it + doesn't matter if the user does not + actually link against crtbegin.o; the + linker won't look for a file to match a + wildcard. The wildcard also means that it + doesn't matter which directory crtbegin.o + is in. */ + KEEP (*crtbegin.o(.ctors)) + KEEP (*crtbegin?.o(.ctors)) + /* We don't want to include the .ctor section from + from the crtend.o file until after the sorted ctors. + The .ctor section from the crtend file contains the + end of ctors marker and it must be last */ + KEEP (*(EXCLUDE_FILE(*crtend?.o *crtend.o) .ctors)) + KEEP (*(SORT(.ctors.*))) + KEEP (*(.ctors)) + __CTOR_END__ = .; + } > m_text + + .dtors : + { + __DTOR_LIST__ = .; + KEEP (*crtbegin.o(.dtors)) + KEEP (*crtbegin?.o(.dtors)) + KEEP (*(EXCLUDE_FILE(*crtend?.o *crtend.o) .dtors)) + KEEP (*(SORT(.dtors.*))) + KEEP (*(.dtors)) + __DTOR_END__ = .; + } > m_text + + .preinit_array : + { + PROVIDE_HIDDEN (__preinit_array_start = .); + KEEP (*(.preinit_array*)) + PROVIDE_HIDDEN (__preinit_array_end = .); + } > m_text + + .init_array : + { + PROVIDE_HIDDEN (__init_array_start = .); + KEEP (*(SORT(.init_array.*))) + KEEP (*(.init_array*)) + PROVIDE_HIDDEN (__init_array_end = .); + } > m_text + + .fini_array : + { + PROVIDE_HIDDEN (__fini_array_start = .); + KEEP (*(SORT(.fini_array.*))) + KEEP (*(.fini_array*)) + PROVIDE_HIDDEN (__fini_array_end = .); + } > m_text + + __etext = .; /* define a global symbol at end of code */ + __DATA_ROM = .; /* Symbol is used by startup for data initialization */ + + .data : AT(__DATA_ROM) + { + . = ALIGN(4); + __DATA_RAM = .; + __data_start__ = .; /* create a global symbol at data start */ + *(.ramfunc*) /* for functions in ram */ + *(.data) /* .data sections */ + *(.data*) /* .data* sections */ + KEEP(*(.jcr*)) + . = ALIGN(4); + __data_end__ = .; /* define a global symbol at data end */ + } > m_data + + __DATA_END = __DATA_ROM + (__data_end__ - __data_start__); + text_end = ORIGIN(m_text) + LENGTH(m_text); + ASSERT(__DATA_END <= text_end, "region m_text overflowed with text and data") + + /* Uninitialized data section */ + .bss : + { + /* This is used by the startup in order to initialize the .bss section */ + . = ALIGN(4); + __START_BSS = .; + __bss_start__ = .; + *(.bss) + *(.bss*) + *(COMMON) + . = ALIGN(4); + __bss_end__ = .; + __END_BSS = .; + } > m_data + + .heap : + { + . = ALIGN(8); + __end__ = .; + PROVIDE(end = .); + __HeapBase = .; + . += HEAP_SIZE; + __HeapLimit = .; + __heap_limit = .; /* Add for _sbrk */ + } > m_data_sramx + + .stack : + { + . = ALIGN(8); + . += STACK_SIZE; + } > m_data_sramx + + /* Initializes stack on the end of block */ + __StackTop = ORIGIN(m_data_sramx) + LENGTH(m_data_sramx); + __StackLimit = __StackTop - STACK_SIZE; + PROVIDE(__stack = __StackTop); + + .ARM.attributes 0 : { *(.ARM.attributes) } + + ASSERT(__StackLimit >= __HeapLimit, "region m_data_sramx overflowed with stack and heap") +} + diff --git a/hw/bsp/lpcxpresso51u68/board.mk b/hw/bsp/lpcxpresso51u68/board.mk new file mode 100644 index 000000000..7bb37e75c --- /dev/null +++ b/hw/bsp/lpcxpresso51u68/board.mk @@ -0,0 +1,39 @@ +CFLAGS += \ + -mthumb \ + -mabi=aapcs \ + -mcpu=cortex-m0plus \ + -DCORE_M0PLUS \ + -DCFG_TUSB_MCU=OPT_MCU_LPC51UXX \ + -DCPU_LPC51U68JBD64 \ + -Wfatal-errors \ + -DCFG_TUSB_MEM_SECTION='__attribute__((section(".data.$$RAM3")))' \ + -DCFG_TUSB_MEM_ALIGN='__attribute__((aligned(64)))' + +# All source paths should be relative to the top level. +LD_FILE = hw/bsp/lpcxpresso51u68/LPC51U68_flash.ld + +SRC_C += \ + hw/mcu/nxp/lpcopen/lpc51u6x/system_LPC51U68.c \ + hw/mcu/nxp/lpcopen/lpc51u6x/drivers/fsl_clock.c \ + hw/mcu/nxp/lpcopen/lpc51u6x/drivers/fsl_gpio.c + +INC += \ + $(TOP)/hw/mcu/nxp/lpcopen/lpc51u6x \ + $(TOP)/hw/mcu/nxp/lpcopen/lpc51u6x/CMSIS/Include \ + $(TOP)/hw/mcu/nxp/lpcopen/lpc51u6x/drivers + +SRC_S += hw/bsp/lpcxpresso51u68/startup_LPC51U68.S + +# For TinyUSB port source +VENDOR = nxp +CHIP_FAMILY = lpc11_13_15 + +# For freeRTOS port source +FREERTOS_PORT = ARM_CM0 + +# For flash-jlink target +JLINK_DEVICE = LPC51U68 +JLINK_IF = swd + +# flash using jlink +flash: flash-jlink diff --git a/hw/bsp/lpcxpresso51u68/lpcxpresso51u68.c b/hw/bsp/lpcxpresso51u68/lpcxpresso51u68.c new file mode 100644 index 000000000..76e159903 --- /dev/null +++ b/hw/bsp/lpcxpresso51u68/lpcxpresso51u68.c @@ -0,0 +1,47 @@ +/* + * The MIT License (MIT) + * + * Copyright (c) 2018, hathach (tinyusb.org) + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + * + * This file is part of the TinyUSB stack. + */ + +#include "../board.h" +#include "fsl_gpio.h" + +#define LED_PORT 0 +#define LED_PIN 29 +#define LED_STATE_ON 0 + +// WAKE button +#define BUTTON_PORT 0 +#define BUTTON_PIN 24 + +void board_init(void) +{ + /* Board pin, clock, debug console init */ + /* attach 12 MHz clock to FLEXCOMM0 (debug console) */ +// CLOCK_AttachClk(BOARD_DEBUG_UART_CLK_ATTACH); + /* enable clock for GPIO*/ + CLOCK_EnableClock(kCLOCK_Gpio0); + CLOCK_EnableClock(kCLOCK_Gpio1); + +} diff --git a/hw/bsp/lpcxpresso51u68/startup_LPC51U68.S b/hw/bsp/lpcxpresso51u68/startup_LPC51U68.S new file mode 100644 index 000000000..81a6f320e --- /dev/null +++ b/hw/bsp/lpcxpresso51u68/startup_LPC51U68.S @@ -0,0 +1,536 @@ +/* --------------------------------------------------------------------------*/ +/* @file: startup_LPC51U68.S */ +/* @purpose: CMSIS Cortex-M0+ Core Device Startup File */ +/* LPC51U68 */ +/* @version: 1.0 */ +/* @date: 2017-12-15 */ +/* --------------------------------------------------------------------------*/ +/* */ +/* Copyright 1997-2016 Freescale Semiconductor, Inc. */ +/* Copyright 2016-2018 NXP */ +/* */ +/* SPDX-License-Identifier: BSD-3-Clause */ +/*****************************************************************************/ +/* Version: GCC for ARM Embedded Processors */ +/*****************************************************************************/ + + + .syntax unified + .arch armv6-m + + .section .isr_vector, "a" + .align 2 + .globl __Vectors +__Vectors: + .long __StackTop /* Top of Stack */ + .long Reset_Handler /* Reset Handler */ + .long NMI_Handler /* NMI Handler */ + .long HardFault_Handler /* Hard Fault Handler */ + .long 0 /* Reserved */ + .long 0 /* Reserved */ + .long 0 /* Reserved */ + .long 0 /* Reserved */ + .long 0 /* Reserved */ + .long 0 /* Reserved */ + .long 0 /* Reserved */ + .long SVC_Handler /* SVCall Handler */ + .long 0 /* Reserved */ + .long 0 /* Reserved */ + .long PendSV_Handler /* PendSV Handler */ + .long SysTick_Handler /* SysTick Handler */ + + /* External Interrupts */ + .long WDT_BOD_IRQHandler /* Windowed watchdog timer, Brownout detect */ + .long DMA0_IRQHandler /* DMA controller */ + .long GINT0_IRQHandler /* GPIO group 0 */ + .long GINT1_IRQHandler /* GPIO group 1 */ + .long PIN_INT0_IRQHandler /* Pin interrupt 0 or pattern match engine slice 0 */ + .long PIN_INT1_IRQHandler /* Pin interrupt 1or pattern match engine slice 1 */ + .long PIN_INT2_IRQHandler /* Pin interrupt 2 or pattern match engine slice 2 */ + .long PIN_INT3_IRQHandler /* Pin interrupt 3 or pattern match engine slice 3 */ + .long UTICK0_IRQHandler /* Micro-tick Timer */ + .long MRT0_IRQHandler /* Multi-rate timer */ + .long CTIMER0_IRQHandler /* Standard counter/timer CTIMER0 */ + .long CTIMER1_IRQHandler /* Standard counter/timer CTIMER1 */ + .long SCT0_IRQHandler /* SCTimer/PWM */ + .long CTIMER3_IRQHandler /* Standard counter/timer CTIMER3 */ + .long FLEXCOMM0_IRQHandler /* Flexcomm Interface 0 (USART, SPI, I2C) */ + .long FLEXCOMM1_IRQHandler /* Flexcomm Interface 1 (USART, SPI, I2C) */ + .long FLEXCOMM2_IRQHandler /* Flexcomm Interface 2 (USART, SPI, I2C) */ + .long FLEXCOMM3_IRQHandler /* Flexcomm Interface 3 (USART, SPI, I2C) */ + .long FLEXCOMM4_IRQHandler /* Flexcomm Interface 4 (USART, SPI, I2C) */ + .long FLEXCOMM5_IRQHandler /* Flexcomm Interface 5 (USART, SPI, I2C) */ + .long FLEXCOMM6_IRQHandler /* Flexcomm Interface 6 (USART, SPI, I2C, I2S) */ + .long FLEXCOMM7_IRQHandler /* Flexcomm Interface 7 (USART, SPI, I2C, I2S) */ + .long ADC0_SEQA_IRQHandler /* ADC0 sequence A completion. */ + .long ADC0_SEQB_IRQHandler /* ADC0 sequence B completion. */ + .long ADC0_THCMP_IRQHandler /* ADC0 threshold compare and error. */ + .long Reserved41_IRQHandler /* Reserved interrupt */ + .long Reserved42_IRQHandler /* Reserved interrupt */ + .long USB0_NEEDCLK_IRQHandler /* USB Activity Wake-up Interrupt */ + .long USB0_IRQHandler /* USB device */ + .long RTC_IRQHandler /* RTC alarm and wake-up interrupts */ + .long Reserved46_IRQHandler /* Reserved interrupt */ + .long Reserved47_IRQHandler /* Reserved interrupt */ + + .size __Vectors, . - __Vectors + + .text + .thumb + +/* Reset Handler */ + .thumb_func + .align 2 + .globl Reset_Handler + .weak Reset_Handler + .type Reset_Handler, %function +Reset_Handler: + cpsid i /* Mask interrupts */ + +#ifndef __NO_SYSTEM_INIT + ldr r0,=SystemInit + blx r0 +#endif +/* Loop to copy data from read only memory to RAM. The ranges + * of copy from/to are specified by following symbols evaluated in + * linker script. + * __etext: End of code section, i.e., begin of data sections to copy from. + * __data_start__/__data_end__: RAM address range that data should be + * copied to. Both must be aligned to 4 bytes boundary. */ + + ldr r1, =__etext + ldr r2, =__data_start__ + ldr r3, =__data_end__ + + subs r3, r2 + ble .LC0 + +.LC1: + subs r3, 4 + ldr r0, [r1,r3] + str r0, [r2,r3] + bgt .LC1 +.LC0: + +#ifdef __STARTUP_CLEAR_BSS +/* This part of work usually is done in C library startup code. Otherwise, + * define this macro to enable it in this startup. + * + * Loop to zero out BSS section, which uses following symbols + * in linker script: + * __bss_start__: start of BSS section. Must align to 4 + * __bss_end__: end of BSS section. Must align to 4 + */ + ldr r1, =__bss_start__ + ldr r2, =__bss_end__ + + subs r2, r1 + ble .LC3 + + movs r0, 0 +.LC2: + str r0, [r1, r2] + subs r2, 4 + bge .LC2 +.LC3: +#endif + cpsie i /* Unmask interrupts */ + +#ifndef __START +#define __START _start +#endif +#ifndef __ATOLLIC__ + ldr r0,=__START + blx r0 +#else + ldr r0,=__libc_init_array + blx r0 + ldr r0,=main + bx r0 +#endif + .pool + .size Reset_Handler, . - Reset_Handler + + .align 1 + .thumb_func + .weak DefaultISR + .type DefaultISR, %function +DefaultISR: + ldr r0, =DefaultISR + bx r0 + .size DefaultISR, . - DefaultISR + + .align 1 + .thumb_func + .weak NMI_Handler + .type NMI_Handler, %function +NMI_Handler: + ldr r0,=NMI_Handler + bx r0 + .size NMI_Handler, . - NMI_Handler + + .align 1 + .thumb_func + .weak HardFault_Handler + .type HardFault_Handler, %function +HardFault_Handler: + ldr r0,=HardFault_Handler + bx r0 + .size HardFault_Handler, . - HardFault_Handler + + .align 1 + .thumb_func + .weak SVC_Handler + .type SVC_Handler, %function +SVC_Handler: + ldr r0,=SVC_Handler + bx r0 + .size SVC_Handler, . - SVC_Handler + + .align 1 + .thumb_func + .weak PendSV_Handler + .type PendSV_Handler, %function +PendSV_Handler: + ldr r0,=PendSV_Handler + bx r0 + .size PendSV_Handler, . - PendSV_Handler + + .align 1 + .thumb_func + .weak SysTick_Handler + .type SysTick_Handler, %function +SysTick_Handler: + ldr r0,=SysTick_Handler + bx r0 + .size SysTick_Handler, . - SysTick_Handler + + .align 1 + .thumb_func + .weak WDT_BOD_IRQHandler + .type WDT_BOD_IRQHandler, %function +WDT_BOD_IRQHandler: + ldr r0,=WDT_BOD_DriverIRQHandler + bx r0 + .size WDT_BOD_IRQHandler, . - WDT_BOD_IRQHandler + + .align 1 + .thumb_func + .weak DMA0_IRQHandler + .type DMA0_IRQHandler, %function +DMA0_IRQHandler: + ldr r0,=DMA0_DriverIRQHandler + bx r0 + .size DMA0_IRQHandler, . - DMA0_IRQHandler + + .align 1 + .thumb_func + .weak GINT0_IRQHandler + .type GINT0_IRQHandler, %function +GINT0_IRQHandler: + ldr r0,=GINT0_DriverIRQHandler + bx r0 + .size GINT0_IRQHandler, . - GINT0_IRQHandler + + .align 1 + .thumb_func + .weak GINT1_IRQHandler + .type GINT1_IRQHandler, %function +GINT1_IRQHandler: + ldr r0,=GINT1_DriverIRQHandler + bx r0 + .size GINT1_IRQHandler, . - GINT1_IRQHandler + + .align 1 + .thumb_func + .weak PIN_INT0_IRQHandler + .type PIN_INT0_IRQHandler, %function +PIN_INT0_IRQHandler: + ldr r0,=PIN_INT0_DriverIRQHandler + bx r0 + .size PIN_INT0_IRQHandler, . - PIN_INT0_IRQHandler + + .align 1 + .thumb_func + .weak PIN_INT1_IRQHandler + .type PIN_INT1_IRQHandler, %function +PIN_INT1_IRQHandler: + ldr r0,=PIN_INT1_DriverIRQHandler + bx r0 + .size PIN_INT1_IRQHandler, . - PIN_INT1_IRQHandler + + .align 1 + .thumb_func + .weak PIN_INT2_IRQHandler + .type PIN_INT2_IRQHandler, %function +PIN_INT2_IRQHandler: + ldr r0,=PIN_INT2_DriverIRQHandler + bx r0 + .size PIN_INT2_IRQHandler, . - PIN_INT2_IRQHandler + + .align 1 + .thumb_func + .weak PIN_INT3_IRQHandler + .type PIN_INT3_IRQHandler, %function +PIN_INT3_IRQHandler: + ldr r0,=PIN_INT3_DriverIRQHandler + bx r0 + .size PIN_INT3_IRQHandler, . - PIN_INT3_IRQHandler + + .align 1 + .thumb_func + .weak UTICK0_IRQHandler + .type UTICK0_IRQHandler, %function +UTICK0_IRQHandler: + ldr r0,=UTICK0_DriverIRQHandler + bx r0 + .size UTICK0_IRQHandler, . - UTICK0_IRQHandler + + .align 1 + .thumb_func + .weak MRT0_IRQHandler + .type MRT0_IRQHandler, %function +MRT0_IRQHandler: + ldr r0,=MRT0_DriverIRQHandler + bx r0 + .size MRT0_IRQHandler, . - MRT0_IRQHandler + + .align 1 + .thumb_func + .weak CTIMER0_IRQHandler + .type CTIMER0_IRQHandler, %function +CTIMER0_IRQHandler: + ldr r0,=CTIMER0_DriverIRQHandler + bx r0 + .size CTIMER0_IRQHandler, . - CTIMER0_IRQHandler + + .align 1 + .thumb_func + .weak CTIMER1_IRQHandler + .type CTIMER1_IRQHandler, %function +CTIMER1_IRQHandler: + ldr r0,=CTIMER1_DriverIRQHandler + bx r0 + .size CTIMER1_IRQHandler, . - CTIMER1_IRQHandler + + .align 1 + .thumb_func + .weak SCT0_IRQHandler + .type SCT0_IRQHandler, %function +SCT0_IRQHandler: + ldr r0,=SCT0_DriverIRQHandler + bx r0 + .size SCT0_IRQHandler, . - SCT0_IRQHandler + + .align 1 + .thumb_func + .weak CTIMER3_IRQHandler + .type CTIMER3_IRQHandler, %function +CTIMER3_IRQHandler: + ldr r0,=CTIMER3_DriverIRQHandler + bx r0 + .size CTIMER3_IRQHandler, . - CTIMER3_IRQHandler + + .align 1 + .thumb_func + .weak FLEXCOMM0_IRQHandler + .type FLEXCOMM0_IRQHandler, %function +FLEXCOMM0_IRQHandler: + ldr r0,=FLEXCOMM0_DriverIRQHandler + bx r0 + .size FLEXCOMM0_IRQHandler, . - FLEXCOMM0_IRQHandler + + .align 1 + .thumb_func + .weak FLEXCOMM1_IRQHandler + .type FLEXCOMM1_IRQHandler, %function +FLEXCOMM1_IRQHandler: + ldr r0,=FLEXCOMM1_DriverIRQHandler + bx r0 + .size FLEXCOMM1_IRQHandler, . - FLEXCOMM1_IRQHandler + + .align 1 + .thumb_func + .weak FLEXCOMM2_IRQHandler + .type FLEXCOMM2_IRQHandler, %function +FLEXCOMM2_IRQHandler: + ldr r0,=FLEXCOMM2_DriverIRQHandler + bx r0 + .size FLEXCOMM2_IRQHandler, . - FLEXCOMM2_IRQHandler + + .align 1 + .thumb_func + .weak FLEXCOMM3_IRQHandler + .type FLEXCOMM3_IRQHandler, %function +FLEXCOMM3_IRQHandler: + ldr r0,=FLEXCOMM3_DriverIRQHandler + bx r0 + .size FLEXCOMM3_IRQHandler, . - FLEXCOMM3_IRQHandler + + .align 1 + .thumb_func + .weak FLEXCOMM4_IRQHandler + .type FLEXCOMM4_IRQHandler, %function +FLEXCOMM4_IRQHandler: + ldr r0,=FLEXCOMM4_DriverIRQHandler + bx r0 + .size FLEXCOMM4_IRQHandler, . - FLEXCOMM4_IRQHandler + + .align 1 + .thumb_func + .weak FLEXCOMM5_IRQHandler + .type FLEXCOMM5_IRQHandler, %function +FLEXCOMM5_IRQHandler: + ldr r0,=FLEXCOMM5_DriverIRQHandler + bx r0 + .size FLEXCOMM5_IRQHandler, . - FLEXCOMM5_IRQHandler + + .align 1 + .thumb_func + .weak FLEXCOMM6_IRQHandler + .type FLEXCOMM6_IRQHandler, %function +FLEXCOMM6_IRQHandler: + ldr r0,=FLEXCOMM6_DriverIRQHandler + bx r0 + .size FLEXCOMM6_IRQHandler, . - FLEXCOMM6_IRQHandler + + .align 1 + .thumb_func + .weak FLEXCOMM7_IRQHandler + .type FLEXCOMM7_IRQHandler, %function +FLEXCOMM7_IRQHandler: + ldr r0,=FLEXCOMM7_DriverIRQHandler + bx r0 + .size FLEXCOMM7_IRQHandler, . - FLEXCOMM7_IRQHandler + + .align 1 + .thumb_func + .weak ADC0_SEQA_IRQHandler + .type ADC0_SEQA_IRQHandler, %function +ADC0_SEQA_IRQHandler: + ldr r0,=ADC0_SEQA_DriverIRQHandler + bx r0 + .size ADC0_SEQA_IRQHandler, . - ADC0_SEQA_IRQHandler + + .align 1 + .thumb_func + .weak ADC0_SEQB_IRQHandler + .type ADC0_SEQB_IRQHandler, %function +ADC0_SEQB_IRQHandler: + ldr r0,=ADC0_SEQB_DriverIRQHandler + bx r0 + .size ADC0_SEQB_IRQHandler, . - ADC0_SEQB_IRQHandler + + .align 1 + .thumb_func + .weak ADC0_THCMP_IRQHandler + .type ADC0_THCMP_IRQHandler, %function +ADC0_THCMP_IRQHandler: + ldr r0,=ADC0_THCMP_DriverIRQHandler + bx r0 + .size ADC0_THCMP_IRQHandler, . - ADC0_THCMP_IRQHandler + + .align 1 + .thumb_func + .weak Reserved41_IRQHandler + .type Reserved41_IRQHandler, %function +Reserved41_IRQHandler: + ldr r0,=Reserved41_DriverIRQHandler + bx r0 + .size Reserved41_IRQHandler, . - Reserved41_IRQHandler + + .align 1 + .thumb_func + .weak Reserved42_IRQHandler + .type Reserved42_IRQHandler, %function +Reserved42_IRQHandler: + ldr r0,=Reserved42_DriverIRQHandler + bx r0 + .size Reserved42_IRQHandler, . - Reserved42_IRQHandler + + .align 1 + .thumb_func + .weak USB0_NEEDCLK_IRQHandler + .type USB0_NEEDCLK_IRQHandler, %function +USB0_NEEDCLK_IRQHandler: + ldr r0,=USB0_NEEDCLK_DriverIRQHandler + bx r0 + .size USB0_NEEDCLK_IRQHandler, . - USB0_NEEDCLK_IRQHandler + + .align 1 + .thumb_func + .weak USB0_IRQHandler + .type USB0_IRQHandler, %function +USB0_IRQHandler: + ldr r0,=USB0_DriverIRQHandler + bx r0 + .size USB0_IRQHandler, . - USB0_IRQHandler + + .align 1 + .thumb_func + .weak RTC_IRQHandler + .type RTC_IRQHandler, %function +RTC_IRQHandler: + ldr r0,=RTC_DriverIRQHandler + bx r0 + .size RTC_IRQHandler, . - RTC_IRQHandler + + .align 1 + .thumb_func + .weak Reserved46_IRQHandler + .type Reserved46_IRQHandler, %function +Reserved46_IRQHandler: + ldr r0,=Reserved46_DriverIRQHandler + bx r0 + .size Reserved46_IRQHandler, . - Reserved46_IRQHandler + + .align 1 + .thumb_func + .weak Reserved47_IRQHandler + .type Reserved47_IRQHandler, %function +Reserved47_IRQHandler: + ldr r0,=Reserved47_DriverIRQHandler + bx r0 + .size Reserved47_IRQHandler, . - Reserved47_IRQHandler + +/* Macro to define default handlers. Default handler + * will be weak symbol and just dead loops. They can be + * overwritten by other handlers */ + .macro def_irq_handler handler_name + .weak \handler_name + .set \handler_name, DefaultISR + .endm + def_irq_handler WDT_BOD_DriverIRQHandler + def_irq_handler DMA0_DriverIRQHandler + def_irq_handler GINT0_DriverIRQHandler + def_irq_handler GINT1_DriverIRQHandler + def_irq_handler PIN_INT0_DriverIRQHandler + def_irq_handler PIN_INT1_DriverIRQHandler + def_irq_handler PIN_INT2_DriverIRQHandler + def_irq_handler PIN_INT3_DriverIRQHandler + def_irq_handler UTICK0_DriverIRQHandler + def_irq_handler MRT0_DriverIRQHandler + def_irq_handler CTIMER0_DriverIRQHandler + def_irq_handler CTIMER1_DriverIRQHandler + def_irq_handler SCT0_DriverIRQHandler + def_irq_handler CTIMER3_DriverIRQHandler + def_irq_handler FLEXCOMM0_DriverIRQHandler + def_irq_handler FLEXCOMM1_DriverIRQHandler + def_irq_handler FLEXCOMM2_DriverIRQHandler + def_irq_handler FLEXCOMM3_DriverIRQHandler + def_irq_handler FLEXCOMM4_DriverIRQHandler + def_irq_handler FLEXCOMM5_DriverIRQHandler + def_irq_handler FLEXCOMM6_DriverIRQHandler + def_irq_handler FLEXCOMM7_DriverIRQHandler + def_irq_handler ADC0_SEQA_DriverIRQHandler + def_irq_handler ADC0_SEQB_DriverIRQHandler + def_irq_handler ADC0_THCMP_DriverIRQHandler + def_irq_handler Reserved41_DriverIRQHandler + def_irq_handler Reserved42_DriverIRQHandler + def_irq_handler USB0_NEEDCLK_DriverIRQHandler + def_irq_handler USB0_DriverIRQHandler + def_irq_handler RTC_DriverIRQHandler + def_irq_handler Reserved46_DriverIRQHandler + def_irq_handler Reserved47_DriverIRQHandler + + .end diff --git a/src/tusb_option.h b/src/tusb_option.h index a273d59b3..bf1fac6ea 100644 --- a/src/tusb_option.h +++ b/src/tusb_option.h @@ -42,6 +42,7 @@ #define OPT_MCU_LPC18XX 6 ///< NXP LPC18xx #define OPT_MCU_LPC40XX 7 ///< NXP LPC40xx #define OPT_MCU_LPC43XX 8 ///< NXP LPC43xx +#define OPT_MCU_LPC51UXX 9 ///< NXP LPC51U6x #define OPT_MCU_NRF5X 100 ///< Nordic nRF5x series