fix issue with bcm2711 caching issue by ading ISB() after dwc2_dcd_int_enable90

also add hwcfg_list for reference
This commit is contained in:
hathach
2021-11-04 12:30:11 +07:00
parent 0faff5a859
commit b51d038b65
3 changed files with 743 additions and 5 deletions

View File

@@ -56,11 +56,25 @@
// MACRO TYPEDEF CONSTANT ENUM
//--------------------------------------------------------------------+
// DWC2 registers
#define DWC2_REG(_port) ((dwc2_regs_t*) DWC2_REG_BASE)
// Debug level for DWC2
#define DWC2_DEBUG 2
#ifndef dcache_clean
#define dcache_clean(_addr, _size)
#endif
#ifndef dcache_invalidate
#define dcache_invalidate(_addr, _size)
#endif
#ifndef dcache_clean_invalidate
#define dcache_clean_invalidate(_addr, _size)
#endif
static TU_ATTR_ALIGNED(4) uint32_t _setup_packet[2];
typedef struct {
@@ -71,7 +85,7 @@ typedef struct {
uint8_t interval;
} xfer_ctl_t;
xfer_ctl_t xfer_status[DWC2_EP_MAX][2];
static xfer_ctl_t xfer_status[DWC2_EP_MAX][2];
#define XFER_CTL_BASE(_ep, _dir) (&xfer_status[_ep][_dir])
// EP0 transfers are limited to 1 packet - larger sizes has to be split