remove dcd_efm32
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87
src/portable/synopsys/dwc2/dwc2_efm32.h
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87
src/portable/synopsys/dwc2/dwc2_efm32.h
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/*
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* The MIT License (MIT)
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*
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* Copyright (c) 2021 Rafael Silva (@perigoso)
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* Copyright (c) 2021, Ha Thach (tinyusb.org)
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy
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* of this software and associated documentation files (the "Software"), to deal
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* in the Software without restriction, including without limitation the rights
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* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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* copies of the Software, and to permit persons to whom the Software is
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* furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
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* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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* THE SOFTWARE.
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*
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* This file is part of the TinyUSB stack.
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*/
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#ifndef _DWC2_EFM32_H_
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#define _DWC2_EFM32_H_
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#ifdef __cplusplus
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extern "C" {
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#endif
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#include "em_device.h"
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// EFM32 has custom control register before DWC registers
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#define DWC2_REG_BASE (USB_BASE + offsetof(USB_TypeDef, GOTGCTL))
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#define DWC2_EP_MAX 7
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#define DWC2_EP_FIFO_SIZE 2048
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TU_ATTR_ALWAYS_INLINE
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static inline void dwc2_dcd_int_enable(uint8_t rhport)
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{
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(void) rhport;
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NVIC_EnableIRQ(USB_IRQn);
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}
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TU_ATTR_ALWAYS_INLINE
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static inline void dwc2_dcd_int_disable (uint8_t rhport)
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{
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(void) rhport;
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NVIC_DisableIRQ(USB_IRQn);
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}
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static inline void dwc2_remote_wakeup_delay(void)
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{
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// try to delay for 1 ms
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// uint32_t count = SystemCoreClock / 1000;
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// while ( count-- ) __NOP();
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}
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// MCU specific PHY init, called BEFORE core reset
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static inline void dwc2_phy_init(dwc2_regs_t * dwc2, uint8_t hs_phy_type)
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{
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(void) dwc2;
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(void) hs_phy_type;
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// Enable PHY
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USB->ROUTE = USB_ROUTE_PHYPEN;
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}
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// MCU specific PHY update, it is called AFTER init() and core reset
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static inline void dwc2_phy_update(dwc2_regs_t * dwc2, uint8_t hs_phy_type)
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{
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(void) dwc2;
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(void) hs_phy_type;
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// EFM32 Manual: turn around must be 5 (reset & default value)
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// dwc2->gusbcfg = (dwc2->gusbcfg & ~GUSBCFG_TRDT_Msk) | (5u << GUSBCFG_TRDT_Pos);
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}
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#ifdef __cplusplus
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}
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#endif
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#endif
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