diff --git a/examples/device/cdc_msc_hid/Makefile b/examples/device/cdc_msc_hid/Makefile index fffabee9d..a2156e1b1 100644 --- a/examples/device/cdc_msc_hid/Makefile +++ b/examples/device/cdc_msc_hid/Makefile @@ -69,7 +69,7 @@ else CFLAGS += -flto -Os endif -CFLAGS += $(INC) -Wall -Werror -std=gnu11 -DBOARD_$(shell echo $(BOARD) | tr a-z\- A-Z_) +CFLAGS += $(INC) -Wall -Werror -std=gnu11 -DBOARD_$(shell echo $(BOARD) | tr '[:lower:]' '[:upper:]') LDFLAGS += $(CFLAGS) -fshort-enums -Wl,-T,$(TOP)/$(LD_FILE) -Wl,-Map=$@.map -Wl,-cref -Wl,-gc-sections -specs=nosys.specs -specs=nano.specs ifeq ("$(V)","1") @@ -161,7 +161,7 @@ $(BUILD)/obj/%.o: %.S @echo AS $(notdir $@) $(QUIET)$(CC) -x assembler-with-cpp $(ASFLAGS) -c -o $@ $< -# Flash binary using Jlink +# Flash binary using Jlink, should be added into system path ifeq ($(OS),Windows_NT) JLINKEXE = JLink.exe else diff --git a/examples/device/cdc_msc_hid/ses/lpc11u6x/lpc11u6x.emProject b/examples/device/cdc_msc_hid/ses/lpc11u6x/lpc11u6x.emProject index 80acd6fae..3904cda3b 100644 --- a/examples/device/cdc_msc_hid/ses/lpc11u6x/lpc11u6x.emProject +++ b/examples/device/cdc_msc_hid/ses/lpc11u6x/lpc11u6x.emProject @@ -19,7 +19,7 @@ arm_target_device_name="LPC11U68" arm_target_interface_type="SWD" build_treat_warnings_as_errors="Yes" - c_preprocessor_definitions="__LPC11U68__;__LPC1100_FAMILY;__LPC11U00_SUBFAMILY;ARM_MATH_CM0PLUS;FLASH_PLACEMENT=1;CORE_M0PLUS;BOARD_LPCXPRESSO11U68;CFG_TUSB_MCU=OPT_MCU_LPC11UXX;CFG_TUSB_MEM_SECTION= __attribute__((section(".bss3")));CFG_TUSB_MEM_ALIGN=__attribute__ ((aligned(64)))" + c_preprocessor_definitions="__LPC11U68__;__LPC1100_FAMILY;__LPC11U00_SUBFAMILY;ARM_MATH_CM0PLUS;FLASH_PLACEMENT=1;CORE_M0PLUS;CFG_TUSB_MCU=OPT_MCU_LPC11UXX;CFG_TUSB_MEM_SECTION= __attribute__((section(".bss3")));CFG_TUSB_MEM_ALIGN=__attribute__ ((aligned(64)))" c_user_include_directories="../../src;$(rootDir)/hw;$(rootDir)/hw/mcu/nxp/lpcopen/lpc_chip_11u6x/inc;$(rootDir)/src" debug_register_definition_file="$(ProjectDir)/LPC11U6x_Registers.xml" debug_target_connection="J-Link" @@ -47,6 +47,7 @@ diff --git a/examples/device/cdc_msc_hid/ses/lpc13xx/lpc13xx.emProject b/examples/device/cdc_msc_hid/ses/lpc13xx/lpc13xx.emProject index 2cd92ca4c..9654a951e 100644 --- a/examples/device/cdc_msc_hid/ses/lpc13xx/lpc13xx.emProject +++ b/examples/device/cdc_msc_hid/ses/lpc13xx/lpc13xx.emProject @@ -18,7 +18,7 @@ arm_target_device_name="LPC1347" arm_target_interface_type="SWD" build_treat_warnings_as_errors="Yes" - c_preprocessor_definitions="__LPC1347FBD64__;__LPC1300_FAMILY;__LPC134x_SUBFAMILY;ARM_MATH_CM3;FLASH_PLACEMENT=1;CORE_M3;BOARD_LPCXPRESSO1347;CFG_TUSB_MCU=OPT_MCU_LPC13XX;CFG_TUSB_MEM_SECTION= __attribute__((section(".bss3")));CFG_TUSB_MEM_ALIGN=__attribute__ ((aligned(64)))" + c_preprocessor_definitions="__LPC1347FBD64__;__LPC1300_FAMILY;__LPC134x_SUBFAMILY;ARM_MATH_CM3;FLASH_PLACEMENT=1;CORE_M3;CFG_TUSB_MCU=OPT_MCU_LPC13XX;CFG_TUSB_MEM_SECTION= __attribute__((section(".bss3")));CFG_TUSB_MEM_ALIGN=__attribute__ ((aligned(64)))" c_user_include_directories="../../src;$(rootDir)/hw;$(rootDir)/hw/mcu/nxp/lpcopen/lpc_chip_13xx/inc;$(rootDir)/src" debug_register_definition_file="$(ProjectDir)/LPC13Uxx_Registers.xml" debug_target_connection="J-Link" @@ -107,6 +107,9 @@ filter="*.c;*.h" path="../../../../../lib/segger_rtt" recurse="No" /> + + diff --git a/examples/device/cdc_msc_hid/ses/lpc18xx/lpc18xx.emProject b/examples/device/cdc_msc_hid/ses/lpc18xx/lpc18xx.emProject index e3b2d4ce0..286e76e3a 100644 --- a/examples/device/cdc_msc_hid/ses/lpc18xx/lpc18xx.emProject +++ b/examples/device/cdc_msc_hid/ses/lpc18xx/lpc18xx.emProject @@ -18,7 +18,7 @@ arm_target_device_name="LPC1857" arm_target_interface_type="SWD" build_treat_warnings_as_errors="Yes" - c_preprocessor_definitions="LPC18xx;__LPC1800_FAMILY;__LPC185x_SUBFAMILY;ARM_MATH_CM3;FLASH_PLACEMENT=1;CORE_M3;BOARD_MCB1800;CFG_TUSB_MCU=OPT_MCU_LPC18XX;CFG_TUSB_MEM_SECTION= __attribute__((section(".bss2")))" + c_preprocessor_definitions="LPC18xx;__LPC1800_FAMILY;__LPC185x_SUBFAMILY;ARM_MATH_CM3;FLASH_PLACEMENT=1;CORE_M3;CFG_TUSB_MCU=OPT_MCU_LPC18XX;CFG_TUSB_MEM_SECTION= __attribute__((section(".bss2")))" c_user_include_directories="../../src;$(rootDir)/hw;$(rootDir)/hw/mcu/nxp/lpcopen/lpc_chip_18xx/inc;$(rootDir)/hw/mcu/nxp/lpcopen/lpc_chip_18xx/inc/config_18xx;$(rootDir)/src" debug_register_definition_file="$(ProjectDir)/LPC18xx_Registers.xml" debug_target_connection="J-Link" @@ -122,6 +122,9 @@ filter="*.c;*.h" path="../../../../../src" recurse="Yes" /> + diff --git a/examples/device/cdc_msc_hid/ses/lpc43xx/lpc43xx.emProject b/examples/device/cdc_msc_hid/ses/lpc43xx/lpc43xx.emProject index e742159fa..d67cd3ce4 100644 --- a/examples/device/cdc_msc_hid/ses/lpc43xx/lpc43xx.emProject +++ b/examples/device/cdc_msc_hid/ses/lpc43xx/lpc43xx.emProject @@ -19,7 +19,7 @@ arm_target_device_name="LPC4357_M4" arm_target_interface_type="SWD" build_treat_warnings_as_errors="Yes" - c_preprocessor_definitions="CORE_M4;__LPC4300_FAMILY;__LPC435x_SUBFAMILY;ARM_MATH_CM4;FLASH_PLACEMENT=1;BOARD_EA4357;CFG_TUSB_MCU=OPT_MCU_LPC43XX;CFG_TUSB_MEM_SECTION= __attribute__((section(".bss2")))" + c_preprocessor_definitions="CORE_M4;__LPC4300_FAMILY;__LPC435x_SUBFAMILY;ARM_MATH_CM4;FLASH_PLACEMENT=1;CFG_TUSB_MCU=OPT_MCU_LPC43XX;CFG_TUSB_MEM_SECTION= __attribute__((section(".bss2")))" c_user_include_directories="../../src;$(rootDir)/hw;$(rootDir)/hw/mcu/nxp/lpcopen/lpc_chip_43xx/inc;$(rootDir)/hw/mcu/nxp/lpcopen/lpc_chip_43xx/inc/config_43xx;$(rootDir)/src;$(lpcDir)//inc" debug_register_definition_file="LPC43xx_Registers.xml" debug_target_connection="J-Link" @@ -129,5 +129,7 @@ filter="*.c;*.h" path="../../../../../lib/segger_rtt" recurse="No" /> + + diff --git a/examples/device/cdc_msc_hid/ses/nrf5x/nrf5x.emProject b/examples/device/cdc_msc_hid/ses/nrf5x/nrf5x.emProject index b94dac089..f95b43318 100644 --- a/examples/device/cdc_msc_hid/ses/nrf5x/nrf5x.emProject +++ b/examples/device/cdc_msc_hid/ses/nrf5x/nrf5x.emProject @@ -19,7 +19,7 @@ arm_target_device_name="nRF52840_xxAA" arm_target_interface_type="SWD" build_treat_warnings_as_errors="Yes" - c_preprocessor_definitions="NRF52840_XXAA;__nRF_FAMILY;ARM_MATH_CM4;FLASH_PLACEMENT=1;BOARD_PCA10056;CFG_TUSB_MCU=OPT_MCU_NRF5X" + c_preprocessor_definitions="NRF52840_XXAA;__nRF_FAMILY;ARM_MATH_CM4;FLASH_PLACEMENT=1;CFG_TUSB_MCU=OPT_MCU_NRF5X" c_user_include_directories="../../src;$(rootDir)/hw/cmsis/Include;$(rootDir)/hw;$(rootDir)/src;$(nrfxDir)/..;$(nrfxDir);$(nrfxDir)/mdk;$(nrfxDir)/hal;$(nrfxDir)/drivers/include" debug_register_definition_file="nrf52840_Registers.xml" debug_target_connection="J-Link" @@ -112,11 +112,12 @@ diff --git a/examples/device/cdc_msc_hid/ses/samd21/samd21.emProject b/examples/device/cdc_msc_hid/ses/samd21/samd21.emProject index 4452699ef..6aa73d1e4 100644 --- a/examples/device/cdc_msc_hid/ses/samd21/samd21.emProject +++ b/examples/device/cdc_msc_hid/ses/samd21/samd21.emProject @@ -18,7 +18,7 @@ arm_target_device_name="ATSAMD21G18A" arm_target_interface_type="SWD" build_treat_warnings_as_errors="Yes" - c_preprocessor_definitions="__SAMD21G18A__;__SAMD21_FAMILY;__SAM_D21_SUBFAMILY;ARM_MATH_CM0PLUS;FLASH_PLACEMENT=1;USE_SIMPLE_ASSERT;CONF_XOSC32K_CONFIG=1;CONF_OSC32K_ENABLE=1;CONF_OSC32K_EN32K=1;CONF_XOSC32K_STARTUP=CONF_XOSC32K_STARTUP_TIME_2000092MCS;CONF_DFLL_ONDEMAND=0;CONF_DFLL_OVERWRITE_CALIBRATION=0;BOARD_METRO_M0_EXPRESS;CFG_TUSB_MCU=OPT_MCU_SAMD21" + c_preprocessor_definitions="__SAMD21G18A__;__SAMD21_FAMILY;__SAM_D21_SUBFAMILY;ARM_MATH_CM0PLUS;FLASH_PLACEMENT=1;USE_SIMPLE_ASSERT;CONF_XOSC32K_CONFIG=1;CONF_OSC32K_ENABLE=1;CONF_OSC32K_EN32K=1;CONF_XOSC32K_STARTUP=CONF_XOSC32K_STARTUP_TIME_2000092MCS;CONF_DFLL_ONDEMAND=0;CONF_DFLL_OVERWRITE_CALIBRATION=0;CFG_TUSB_MCU=OPT_MCU_SAMD21" c_user_include_directories="../../src;$(rootDir)/hw;$(rootDir)/src;$(asf4Dir);$(asf4Dir)/CMSIS/Include;$(asf4Dir)/include;$(asf4Dir)/config;$(asf4Dir)/hri;$(asf4Dir)/hal/include;$(asf4Dir)/hal/utils/include;$(asf4Dir)/hpl/port;$(asf4Dir)/hpl/gclk;$(asf4Dir)/hpl/pm" debug_register_definition_file="ATSAMD21G18A_Registers.xml" debug_target_connection="J-Link" @@ -96,6 +96,9 @@ filter="*.c;*.h" path="../../../../../lib/segger_rtt" recurse="No" /> + diff --git a/examples/device/cdc_msc_hid/ses/samd51/samd51.emProject b/examples/device/cdc_msc_hid/ses/samd51/samd51.emProject index 6d5c14507..e175873ee 100644 --- a/examples/device/cdc_msc_hid/ses/samd51/samd51.emProject +++ b/examples/device/cdc_msc_hid/ses/samd51/samd51.emProject @@ -19,7 +19,7 @@ arm_target_device_name="ATSAMD51J19" arm_target_interface_type="SWD" build_treat_warnings_as_errors="Yes" - c_preprocessor_definitions="__SAMD51_FAMILY;__SAMD51J19A__;ARM_MATH_CM4;FLASH_PLACEMENT=1;USE_SIMPLE_ASSERT;BOARD_METRO_M4_EXPRESS;CFG_TUSB_MCU=OPT_MCU_SAMD51" + c_preprocessor_definitions="__SAMD51_FAMILY;__SAMD51J19A__;ARM_MATH_CM4;FLASH_PLACEMENT=1;USE_SIMPLE_ASSERT;CFG_TUSB_MCU=OPT_MCU_SAMD51" c_user_include_directories="../../src;$(rootDir)/hw;$(rootDir)/src;$(asf4Dir);$(asf4Dir)/CMSIS/Include;$(asf4Dir)/include;$(asf4Dir)/config;$(asf4Dir)/hri;$(asf4Dir)/hal/include;$(asf4Dir)/hal/utils/include;$(asf4Dir)/hpl/port;$(asf4Dir)/hpl/gclk" debug_register_definition_file="ATSAMD51J19A_Registers.xml" debug_target_connection="J-Link" @@ -100,6 +100,9 @@ filter="*.c;*.h" path="../../../../../lib/segger_rtt" recurse="No" /> + diff --git a/examples/device/cdc_msc_hid/ses/stm32f4/stm32f4.emProject b/examples/device/cdc_msc_hid/ses/stm32f4/stm32f4.emProject index 71119a878..4067e4c10 100644 --- a/examples/device/cdc_msc_hid/ses/stm32f4/stm32f4.emProject +++ b/examples/device/cdc_msc_hid/ses/stm32f4/stm32f4.emProject @@ -18,7 +18,7 @@ arm_target_debug_interface_type="ADIv5" arm_target_device_name="STM32F407VG" arm_target_interface_type="SWD" - c_preprocessor_definitions="STM32F407xx;__STM32F4xx_FAMILY;__STM32F407_SUBFAMILY;ARM_MATH_CM4;FLASH_PLACEMENT=1;CFG_TUSB_MCU=OPT_MCU_STM32F4;HSE_VALUE=8000000;BOARD_STM32F407G_DISC1" + c_preprocessor_definitions="STM32F407xx;__STM32F4xx_FAMILY;__STM32F407_SUBFAMILY;ARM_MATH_CM4;FLASH_PLACEMENT=1;CFG_TUSB_MCU=OPT_MCU_STM32F4;HSE_VALUE=8000000" c_user_include_directories="../../src;$(rootDir)/src;$(rootDir)/hw;$(rootDir)/hw/mcu/st/cmsis;$(rootDir)/hw/mcu/st/stm32lib/CMSIS/STM32F4xx/Include" debug_register_definition_file="$(ProjectDir)/STM32F40x_Registers.xml" debug_target_connection="J-Link" @@ -76,6 +76,9 @@ + FLASH + + /* The program code and other data goes into FLASH */ + .text : + { + . = ALIGN(4); + *(.text) /* .text sections (code) */ + *(.text*) /* .text* sections (code) */ + *(.glue_7) /* glue arm to thumb code */ + *(.glue_7t) /* glue thumb to arm code */ + *(.eh_frame) + + KEEP (*(.init)) + KEEP (*(.fini)) + + . = ALIGN(4); + _etext = .; /* define a global symbols at end of code */ + } >FLASH + + /* Constant data goes into FLASH */ + .rodata : + { + . = ALIGN(4); + *(.rodata) /* .rodata sections (constants, strings, etc.) */ + *(.rodata*) /* .rodata* sections (constants, strings, etc.) */ + . = ALIGN(4); + } >FLASH + + .ARM.extab : { *(.ARM.extab* .gnu.linkonce.armextab.*) } >FLASH + .ARM : { + __exidx_start = .; + *(.ARM.exidx*) + __exidx_end = .; + } >FLASH + + .preinit_array : + { + PROVIDE_HIDDEN (__preinit_array_start = .); + KEEP (*(.preinit_array*)) + PROVIDE_HIDDEN (__preinit_array_end = .); + } >FLASH + .init_array : + { + PROVIDE_HIDDEN (__init_array_start = .); + KEEP (*(SORT(.init_array.*))) + KEEP (*(.init_array*)) + PROVIDE_HIDDEN (__init_array_end = .); + } >FLASH + .fini_array : + { + PROVIDE_HIDDEN (__fini_array_start = .); + KEEP (*(SORT(.fini_array.*))) + KEEP (*(.fini_array*)) + PROVIDE_HIDDEN (__fini_array_end = .); + } >FLASH + + /* used by the startup to initialize data */ + _sidata = LOADADDR(.data); + + /* Initialized data sections goes into RAM, load LMA copy after code */ + .data : + { + . = ALIGN(4); + _sdata = .; /* create a global symbol at data start */ + *(.data) /* .data sections */ + *(.data*) /* .data* sections */ + + . = ALIGN(4); + _edata = .; /* define a global symbol at data end */ + } >RAM AT> FLASH + + _siccmram = LOADADDR(.ccmram); + + /* CCM-RAM section + * + * IMPORTANT NOTE! + * If initialized variables will be placed in this section, + * the startup code needs to be modified to copy the init-values. + */ + .ccmram : + { + . = ALIGN(4); + _sccmram = .; /* create a global symbol at ccmram start */ + *(.ccmram) + *(.ccmram*) + + . = ALIGN(4); + _eccmram = .; /* create a global symbol at ccmram end */ + } >CCMRAM AT> FLASH + + + /* Uninitialized data section */ + . = ALIGN(4); + .bss : + { + /* This is used by the startup in order to initialize the .bss secion */ + _sbss = .; /* define a global symbol at bss start */ + __bss_start__ = _sbss; + *(.bss) + *(.bss*) + *(COMMON) + + . = ALIGN(4); + _ebss = .; /* define a global symbol at bss end */ + __bss_end__ = _ebss; + } >RAM + + /* User_heap_stack section, used to check that there is enough RAM left */ + ._user_heap_stack : + { + . = ALIGN(8); + PROVIDE ( end = . ); + PROVIDE ( _end = . ); + . = . + _Min_Heap_Size; + . = . + _Min_Stack_Size; + . = ALIGN(8); + } >RAM + + + + /* Remove information from the standard libraries */ + /DISCARD/ : + { + libc.a ( * ) + libm.a ( * ) + libgcc.a ( * ) + } + + .ARM.attributes 0 : { *(.ARM.attributes) } +} + + diff --git a/hw/bsp/stm32f303disc/board.mk b/hw/bsp/stm32f303disc/board.mk new file mode 100644 index 000000000..5b558c1ec --- /dev/null +++ b/hw/bsp/stm32f303disc/board.mk @@ -0,0 +1,37 @@ +CFLAGS += \ + -DHSE_VALUE=8000000 \ + -DCFG_TUSB_MCU=OPT_MCU_STM32F3 \ + -DSTM32F303xC \ + -mthumb \ + -mabi=aapcs-linux \ + -mcpu=cortex-m4 \ + -mfloat-abi=hard \ + -mfpu=fpv4-sp-d16 \ + -nostdlib -nostartfiles + +# All source paths should be relative to the top level. +LD_FILE = hw/bsp/stm32f303disc/STM32F303VCTx_FLASH.ld + +LDFLAGS += -mthumb -mcpu=cortex-m4 + +SRC_C += \ + hw/mcu/st/system-init/system_stm32f3xx.c + +SRC_S += \ + hw/mcu/st/startup/stm32f3/startup_stm32f303xc.s + +INC += \ + -I$(TOP)/hw/mcu/st/stm32lib/CMSIS/STM32F3xx/Include \ + -I$(TOP)/hw/mcu/st/cmsis + +VENDOR = st +CHIP_FAMILY = stm32f4 + +JLINK_DEVICE = stm32f303vc + +# Path to STM32 Cube Programmer CLI, should be added into system path +STM32Prog = STM32_Programmer_CLI + +# flash target using on-board stlink +flash: $(BUILD)/$(BOARD)-firmware.elf + $(STM32Prog) --connect port=swd --write $< --go diff --git a/hw/bsp/stm32f303disc/board_stm32f303disc.c b/hw/bsp/stm32f303disc/board_stm32f303disc.c new file mode 100644 index 000000000..99419b310 --- /dev/null +++ b/hw/bsp/stm32f303disc/board_stm32f303disc.c @@ -0,0 +1,122 @@ +/* + * The MIT License (MIT) + * + * Copyright (c) 2018, hathach (tinyusb.org) + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + * + * This file is part of the TinyUSB stack. + */ + +#include "../board.h" +#include "stm32f3xx.h" + +#include "tusb_option.h" + +void board_init(void) +{ + // Init the LED on PD14 + RCC->AHB1ENR |= RCC_AHB1ENR_GPIODEN; + GPIOD->MODER |= GPIO_MODER_MODE14_0; + + // USB Clock init + // PLL input- 8 MHz (External oscillator clock; HSI clock tolerance isn't + // tight enough- 1%, need 0.25%) + // VCO input- 1 to 2 MHz (2 MHz, M = 4) + // VCO output- 100 to 432 MHz (144 MHz, N = 72) + // Main PLL out- <= 180 MHz (18 MHz, P = 3- divides by 8) + // USB PLL out- 48 MHz (Q = 3) + RCC->PLLCFGR = RCC_PLLCFGR_PLLSRC_HSE | (3 << RCC_PLLCFGR_PLLQ_Pos) | \ + (3 << RCC_PLLCFGR_PLLP_Pos) | (72 << RCC_PLLCFGR_PLLN_Pos) | \ + (4 << RCC_PLLCFGR_PLLM_Pos); + + // Wait for external clock to become ready + RCC->CR |= RCC_CR_HSEON; + while(!(RCC->CR & RCC_CR_HSERDY_Msk)); + + // Wait for PLL to become ready + RCC->CR |= RCC_CR_PLLON; + while(!(RCC->CR & RCC_CR_PLLRDY_Msk)); + + // Switch clocks! + RCC->CFGR |= RCC_CFGR_SW_1; + + // Notify runtime of frequency change. + SystemCoreClockUpdate(); + // Systick init + #if CFG_TUSB_OS == OPT_OS_NONE + SysTick_Config(SystemCoreClock / 1000); + #endif + + RCC->AHB2ENR |= RCC_AHB2ENR_OTGFSEN; + + // USB Pin Init + // PA9- VUSB, PA10- ID, PA11- DM, PA12- DP + // PC0- Power on + RCC->AHB1ENR |= RCC_AHB1ENR_GPIOAEN; + GPIOA->MODER |= GPIO_MODER_MODE9_1 | GPIO_MODER_MODE10_1 | \ + GPIO_MODER_MODE11_1 | GPIO_MODER_MODE12_1; + GPIOA->AFR[1] |= (10 << GPIO_AFRH_AFSEL9_Pos) | \ + (10 << GPIO_AFRH_AFSEL10_Pos) | (10 << GPIO_AFRH_AFSEL11_Pos) | \ + (10 << GPIO_AFRH_AFSEL12_Pos); + + // Pullup required on ID, despite the manual claiming there's an + // internal pullup already (page 1245, Rev 17) + GPIOA->PUPDR |= GPIO_PUPDR_PUPD10_0; +} + + +void board_led_control(bool state) +{ + if (!state) { + GPIOD->BSRR = GPIO_BSRR_BR14; + } else { + GPIOD->BSRR = GPIO_BSRR_BS14; + } +} + + +/*------------------------------------------------------------------*/ +/* TUSB HAL MILLISECOND + *------------------------------------------------------------------*/ +#if CFG_TUSB_OS == OPT_OS_NONE +volatile uint32_t system_ticks = 0; + +void SysTick_Handler (void) +{ + system_ticks++; +} + +uint32_t tusb_hal_millis(void) +{ + return board_tick2ms(system_ticks); +} +#endif + +void HardFault_Handler (void) +{ + asm("bkpt"); +} + +// Required by __libc_init_array in startup code if we are compiling using +// -nostdlib/-nostartfiles. +void _init(void) +{ + +} diff --git a/hw/bsp/stm32f407g_disc1/board.mk b/hw/bsp/stm32f407g_disc1/board.mk index 73d64a6bd..e966f998c 100644 --- a/hw/bsp/stm32f407g_disc1/board.mk +++ b/hw/bsp/stm32f407g_disc1/board.mk @@ -7,7 +7,7 @@ CFLAGS += \ -mcpu=cortex-m4 \ -mfloat-abi=hard \ -mfpu=fpv4-sp-d16 \ - -nostdlib + -nostdlib -nostartfiles # All source paths should be relative to the top level. LD_FILE = hw/bsp/stm32f407g_disc1/STM32F407VGTx_FLASH.ld @@ -29,20 +29,8 @@ CHIP_FAMILY = stm32f4 JLINK_DEVICE = stm32f407vg -# Path to STM32 Cube Programmer CLI -ifeq ($(OS),Windows_NT) - STM32Prog = C:/Program Files/STMicroelectronics/STM32Cube/STM32CubeProgrammer/bin/STM32_Programmer_CLI -else - UNAME_S := $(shell uname -s) - - ifeq ($(UNAME_S),Linux) - STM32Prog = $(HOME)/STMicroelectronics/STM32Cube/STM32CubeProgrammer/bin/STM32_Programmer_CLI - endif - - ifeq ($(UNAME_S),Darwin) - STM32Prog = STM32_Programmer_CLI - endif -endif +# Path to STM32 Cube Programmer CLI, should be added into system path +STM32Prog = STM32_Programmer_CLI # flash target using on-board stlink flash: $(BUILD)/$(BOARD)-firmware.elf diff --git a/hw/bsp/stm32f407g_disc1/board_stm32f407g_disc1.c b/hw/bsp/stm32f407g_disc1/board_stm32f407g_disc1.c index 386356080..bf45eb5a0 100644 --- a/hw/bsp/stm32f407g_disc1/board_stm32f407g_disc1.c +++ b/hw/bsp/stm32f407g_disc1/board_stm32f407g_disc1.c @@ -24,15 +24,12 @@ * This file is part of the TinyUSB stack. */ -#include "bsp/board.h" +#include "../board.h" #include "stm32f4xx.h" #include "tusb_option.h" -//--------------------------------------------------------------------+ -// MACRO TYPEDEF CONSTANT ENUM DECLARATION -//--------------------------------------------------------------------+ void board_init(void) { // Init the LED on PD14 diff --git a/hw/bsp/stm32f407g_disc1/board_stm32f407g_disc1.h b/hw/bsp/stm32f407g_disc1/board_stm32f407g_disc1.h deleted file mode 100644 index 833e26489..000000000 --- a/hw/bsp/stm32f407g_disc1/board_stm32f407g_disc1.h +++ /dev/null @@ -1,40 +0,0 @@ -/* - * The MIT License (MIT) - * - * Copyright (c) 2018, hathach (tinyusb.org) - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - * - * This file is part of the TinyUSB stack. - */ -#ifndef BOARD_STM32F407G_DISC1_H_ -#define BOARD_STM32F407G_DISC1_H_ - -#ifdef __cplusplus - extern "C" { -#endif - -#define BOARD_LED_NUM 1 -#define BOARD_LED0 62 - -#ifdef __cplusplus - } -#endif - -#endif /* BOARD_STM32F407G_DISC1_H_ */ diff --git a/src/portable/st/stm32f4/dcd_stm32f4.c b/src/portable/st/stm32f4/dcd_stm32f4.c index 472a63f32..d99e455ed 100644 --- a/src/portable/st/stm32f4/dcd_stm32f4.c +++ b/src/portable/st/stm32f4/dcd_stm32f4.c @@ -26,7 +26,7 @@ #include "tusb_option.h" -#if TUSB_OPT_DEVICE_ENABLED && CFG_TUSB_MCU == OPT_MCU_STM32F4 +#if TUSB_OPT_DEVICE_ENABLED && (CFG_TUSB_MCU == OPT_MCU_STM32F4 || CFG_TUSB_MCU == OPT_MCU_STM32F3) #include "device/dcd.h" #include "stm32f4xx.h" diff --git a/src/tusb_option.h b/src/tusb_option.h index 40705bc00..46d2186a0 100644 --- a/src/tusb_option.h +++ b/src/tusb_option.h @@ -36,21 +36,21 @@ /** \defgroup group_mcu Supported MCU * \ref CFG_TUSB_MCU must be defined to one of these * @{ */ -#define OPT_MCU_LPC11UXX 1 ///< NXP LPC11Uxx +#define OPT_MCU_LPC11UXX 1 ///< NXP LPC11Uxx +#define OPT_MCU_LPC13XX 3 ///< NXP LPC13xx +#define OPT_MCU_LPC175X_6X 4 ///< NXP LPC175x, LPC176x +#define OPT_MCU_LPC177X_8X 5 ///< NXP LPC177x, LPC178x +#define OPT_MCU_LPC18XX 6 ///< NXP LPC18xx +#define OPT_MCU_LPC40XX 7 ///< NXP LPC40xx +#define OPT_MCU_LPC43XX 8 ///< NXP LPC43xx -#define OPT_MCU_LPC13XX 3 ///< NXP LPC13xx -#define OPT_MCU_LPC175X_6X 4 ///< NXP LPC175x, LPC176x -#define OPT_MCU_LPC177X_8X 5 ///< NXP LPC177x, LPC178x -#define OPT_MCU_LPC18XX 6 ///< NXP LPC18xx -#define OPT_MCU_LPC40XX 7 ///< NXP LPC40xx -#define OPT_MCU_LPC43XX 8 ///< NXP LPC43xx - -#define OPT_MCU_NRF5X 100 ///< Nordic nRF5x series +#define OPT_MCU_NRF5X 100 ///< Nordic nRF5x series #define OPT_MCU_SAMD21 200 ///< MicroChip SAMD21 #define OPT_MCU_SAMD51 201 ///< MicroChip SAMD51 #define OPT_MCU_STM32F4 300 ///< ST STM32F4 +#define OPT_MCU_STM32F3 301 ///< ST STM32F3 /** @} */