fix build error with device 43xx
refractor mscd ramdisk demo
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@@ -176,8 +176,7 @@ void mscd_isr(endpoint_handle_t edpt_hdl, tusb_event_t event, uint32_t xferred_b
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}
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//------------- Status Phase -------------//
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// TODO need to be true for dcd_lpc43xx to clean up qtd !!!
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ASSERT( dcd_pipe_xfer( p_msc->edpt_in , &p_msc->csw, sizeof(msc_cmd_status_wrapper_t), true) == TUSB_ERROR_NONE, VOID_RETURN );
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ASSERT( dcd_pipe_xfer( p_msc->edpt_in , &p_msc->csw, sizeof(msc_cmd_status_wrapper_t), true) == TUSB_ERROR_NONE, VOID_RETURN ); // need to be true for dcd to clean up qtd !!
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//------------- Queue the next CBW -------------//
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ASSERT( dcd_pipe_xfer( p_msc->edpt_out, &p_msc->cbw, sizeof(msc_cmd_block_wrapper_t), true) == TUSB_ERROR_NONE, VOID_RETURN );
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@@ -143,10 +143,9 @@ typedef struct {
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/// thus there are 16 bytes padding free that we can make use of.
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//--------------------------------------------------------------------+
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uint8_t class_code; // Class code that endpoint belongs to
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uint8_t xfer_type;
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uint8_t list_qtd_idx[DCD_QTD_PER_QHD_MAX];
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uint8_t reserved[14-DCD_QTD_PER_QHD_MAX];
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uint8_t reserved[15-DCD_QTD_PER_QHD_MAX];
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} ATTR_ALIGNED(64) dcd_qhd_t;
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STATIC_ASSERT( sizeof(dcd_qhd_t) == 64, "size is not correct");
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@@ -404,7 +403,7 @@ tusb_error_t dcd_pipe_clear_stall(uint8_t coreid, uint8_t edpt_addr)
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endpoint_handle_t dcd_pipe_open(uint8_t coreid, tusb_descriptor_endpoint_t const * p_endpoint_desc, uint8_t class_code)
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{
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// TODO USB1 only has 4 non-control enpoint (USB0 has 5)
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endpoint_handle_t const null_handle = { .coreid = 0, .xfer_type = 0, .index = 0 };
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endpoint_handle_t const null_handle = { 0 };
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if (p_endpoint_desc->bmAttributes.xfer == TUSB_XFER_ISOCHRONOUS)
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return null_handle; // TODO not support ISO yet
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@@ -418,7 +417,6 @@ endpoint_handle_t dcd_pipe_open(uint8_t coreid, tusb_descriptor_endpoint_t const
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memclr_(p_qhd, sizeof(dcd_qhd_t));
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p_qhd->class_code = class_code;
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p_qhd->xfer_type = p_endpoint_desc->bmAttributes.xfer;
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p_qhd->zero_length_termination = 1;
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p_qhd->max_package_size = p_endpoint_desc->wMaxPacketSize.size;
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p_qhd->qtd_overlay.next = QTD_NEXT_INVALID;
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@@ -432,7 +430,6 @@ endpoint_handle_t dcd_pipe_open(uint8_t coreid, tusb_descriptor_endpoint_t const
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return (endpoint_handle_t)
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{
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.coreid = coreid,
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.xfer_type = p_endpoint_desc->bmAttributes.xfer,
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.index = ep_idx,
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.class_code = class_code
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};
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@@ -449,8 +446,6 @@ bool dcd_pipe_is_busy(endpoint_handle_t edpt_hdl)
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// add only, controller virtually cannot know
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static tusb_error_t pipe_add_xfer(endpoint_handle_t edpt_hdl, void * buffer, uint16_t total_bytes, bool int_on_complete)
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{
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ASSERT(edpt_hdl.xfer_type != TUSB_XFER_ISOCHRONOUS, TUSB_ERROR_NOT_SUPPORTED_YET);
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uint8_t qtd_idx = qtd_find_free(edpt_hdl.coreid);
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ASSERT(qtd_idx != 0, TUSB_ERROR_DCD_NOT_ENOUGH_QTD);
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@@ -509,7 +504,6 @@ void xfer_complete_isr(uint8_t coreid, uint32_t reg_complete)
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endpoint_handle_t edpt_hdl =
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{
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.coreid = coreid,
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.xfer_type = p_qhd->xfer_type,
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.index = ep_idx,
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.class_code = p_qhd->class_code
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};
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