From bac75a81fd5b35c5d49801f0a1f02bcfab51d76c Mon Sep 17 00:00:00 2001 From: hathach Date: Sat, 31 Aug 2019 22:44:08 +0700 Subject: [PATCH] support LPC51u68 #100 --- examples/rules.mk | 2 +- hw/bsp/lpcxpresso51u68/board.mk | 9 ++- hw/bsp/lpcxpresso51u68/lpcxpresso51u68.c | 71 +++++++++++++++++-- src/common/tusb_common.h | 5 ++ .../nxp/lpc11_13_15/dcd_lpc11_13_15.c | 57 +++++++++------ 5 files changed, 112 insertions(+), 32 deletions(-) diff --git a/examples/rules.mk b/examples/rules.mk index 4fbce2529..18410d2d9 100644 --- a/examples/rules.mk +++ b/examples/rules.mk @@ -3,7 +3,7 @@ # # libc -LIBS = -lgcc -lc -lm -lnosys +LIBS += -lgcc -lc -lm -lnosys # TinyUSB Stack source SRC_C += \ diff --git a/hw/bsp/lpcxpresso51u68/board.mk b/hw/bsp/lpcxpresso51u68/board.mk index 9b1c5ac01..4d3dcbd73 100644 --- a/hw/bsp/lpcxpresso51u68/board.mk +++ b/hw/bsp/lpcxpresso51u68/board.mk @@ -13,18 +13,21 @@ CFLAGS += \ LD_FILE = hw/bsp/lpcxpresso51u68/LPC51U68_flash.ld SRC_C += \ - hw/mcu/nxp/lpcopen/lpc51u6x/system_LPC51U68.c \ + hw/mcu/nxp/lpcopen/lpc51u6x/devices/LPC51U68/system_LPC51U68.c \ hw/mcu/nxp/lpcopen/lpc51u6x/drivers/fsl_clock.c \ hw/mcu/nxp/lpcopen/lpc51u6x/drivers/fsl_gpio.c \ + hw/mcu/nxp/lpcopen/lpc51u6x/drivers/fsl_power.c \ hw/mcu/nxp/lpcopen/lpc51u6x/drivers/fsl_reset.c INC += \ - $(TOP)/hw/mcu/nxp/lpcopen/lpc51u6x \ $(TOP)/hw/mcu/nxp/lpcopen/lpc51u6x/CMSIS/Include \ + $(TOP)/hw/mcu/nxp/lpcopen/lpc51u6x/devices/LPC51U68 \ $(TOP)/hw/mcu/nxp/lpcopen/lpc51u6x/drivers SRC_S += hw/bsp/lpcxpresso51u68/startup_LPC51U68.S +LIBS += $(TOP)/hw/mcu/nxp/lpcopen/lpc51u6x/devices/LPC51U68/libpower.a + # For TinyUSB port source VENDOR = nxp CHIP_FAMILY = lpc11_13_15 @@ -37,4 +40,4 @@ JLINK_DEVICE = LPC51U68 JLINK_IF = swd # flash using jlink -flash: flash-jlink +#flash: flash-jlink diff --git a/hw/bsp/lpcxpresso51u68/lpcxpresso51u68.c b/hw/bsp/lpcxpresso51u68/lpcxpresso51u68.c index 3786f97fb..8b57ce7b9 100644 --- a/hw/bsp/lpcxpresso51u68/lpcxpresso51u68.c +++ b/hw/bsp/lpcxpresso51u68/lpcxpresso51u68.c @@ -27,6 +27,8 @@ #include "../board.h" #include "LPC51U68.h" #include "fsl_gpio.h" +#include "fsl_power.h" +#include "fsl_iocon.h" #define LED_PORT 0 #define LED_PIN 29 @@ -36,14 +38,59 @@ #define BUTTON_PORT 0 #define BUTTON_PIN 24 +// IOCON pin mux +#define IOCON_PIO_DIGITAL_EN 0x80u /*!< Enables digital function */ +#define IOCON_PIO_FUNC1 0x01u /*!< Selects pin function 1 */ +#define IOCON_PIO_FUNC7 0x07u /*!< Selects pin function 7 */ +#define IOCON_PIO_INPFILT_OFF 0x0100u /*!< Input filter disabled */ +#define IOCON_PIO_INV_DI 0x00u /*!< Input function is not inverted */ +#define IOCON_PIO_MODE_INACT 0x00u /*!< No addition pin function */ +#define IOCON_PIO_OPENDRAIN_DI 0x00u /*!< Open drain is disabled */ +#define IOCON_PIO_SLEW_STANDARD 0x00u /*!< Standard mode, output slew rate control is enabled */ + +/**************************************************************** +name: BOARD_BootClockFROHF96M +outputs: +- {id: SYSTICK_clock.outFreq, value: 96 MHz} +- {id: System_clock.outFreq, value: 96 MHz} +settings: +- {id: SYSCON.MAINCLKSELA.sel, value: SYSCON.fro_hf} +sources: +- {id: SYSCON.fro_hf.outFreq, value: 96 MHz} +******************************************************************/ +void BootClockFROHF96M(void) +{ + /*!< Set up the clock sources */ + /*!< Set up FRO */ + POWER_DisablePD(kPDRUNCFG_PD_FRO_EN); /*!< Ensure FRO is on */ + CLOCK_AttachClk(kFRO12M_to_MAIN_CLK); /*!< Switch to FRO 12MHz first to ensure we can change voltage without + accidentally being below the voltage for current speed */ + POWER_SetVoltageForFreq(96000000U); /*!< Set voltage for the one of the fastest clock outputs: System clock output */ + CLOCK_SetFLASHAccessCyclesForFreq(96000000U); /*!< Set FLASH wait states for core */ + + CLOCK_SetupFROClocking(96000000U); /*!< Set up high frequency FRO output to selected frequency */ + + /*!< Set up dividers */ + CLOCK_SetClkDiv(kCLOCK_DivAhbClk, 1U, false); /*!< Set AHBCLKDIV divider to value 1 */ + CLOCK_SetClkDiv(kCLOCK_DivSystickClk, 0U, true); /*!< Reset SYSTICKCLKDIV divider counter and halt it */ + CLOCK_SetClkDiv(kCLOCK_DivSystickClk, 1U, false); /*!< Set SYSTICKCLKDIV divider to value 1 */ + + /*!< Set up clock selectors - Attach clocks to the peripheries */ + CLOCK_AttachClk(kFRO_HF_to_MAIN_CLK); /*!< Switch MAIN_CLK to FRO_HF */ + /*!< Set SystemCoreClock variable. */ + SystemCoreClock = 96000000U; +} + void board_init(void) { - /* Board pin, clock, debug console init */ - /* attach 12 MHz clock to FLEXCOMM0 (debug console) */ - // CLOCK_AttachClk(BOARD_DEBUG_UART_CLK_ATTACH); - /* enable clock for GPIO*/ + // Enable IOCON clock + CLOCK_EnableClock(kCLOCK_Iocon); + + // Enable GPIO0 clock CLOCK_EnableClock(kCLOCK_Gpio0); - CLOCK_EnableClock(kCLOCK_Gpio1); + + // Init 96 MHz clock + BootClockFROHF96M(); #if CFG_TUSB_OS == OPT_OS_NONE // 1ms tick timer @@ -64,6 +111,20 @@ void board_init(void) // Button gpio_pin_config_t const button_config = { kGPIO_DigitalInput, 0}; GPIO_PinInit(GPIO, BUTTON_PORT, BUTTON_PIN, &button_config); + + // USB + const uint32_t port1_pin6_config = ( + IOCON_PIO_FUNC7 | /* Pin is configured as USB0_VBUS */ + IOCON_PIO_MODE_INACT | /* No addition pin function */ + IOCON_PIO_INV_DI | /* Input function is not inverted */ + IOCON_PIO_DIGITAL_EN | /* Enables digital function */ + IOCON_PIO_INPFILT_OFF | /* Input filter disabled */ + IOCON_PIO_OPENDRAIN_DI /* Open drain is disabled */ + ); + IOCON_PinMuxSet(IOCON, 1, 6, port1_pin6_config); /* PORT1 PIN6 (coords: 26) is configured as USB0_VBUS */ + + POWER_DisablePD(kPDRUNCFG_PD_USB0_PHY); /*Turn on USB Phy */ + CLOCK_EnableUsbfs0Clock(kCLOCK_UsbSrcFro, CLOCK_GetFreq(kCLOCK_FroHf)); /* enable USB IP clock */ } //--------------------------------------------------------------------+ diff --git a/src/common/tusb_common.h b/src/common/tusb_common.h index ee77b62f1..4352505eb 100644 --- a/src/common/tusb_common.h +++ b/src/common/tusb_common.h @@ -106,6 +106,11 @@ static inline uint16_t tu_max16 (uint16_t x, uint16_t y) { return (x > y) ? x : static inline uint32_t tu_max32 (uint32_t x, uint32_t y) { return (x > y) ? x : y; } // Align +static inline uint32_t tu_align_n(uint32_t value, uint32_t alignment) +{ + return value & ((uint32_t) ~(alignment-1)); +} + static inline uint32_t tu_align32 (uint32_t value) { return (value & 0xFFFFFFE0UL); } static inline uint32_t tu_align16 (uint32_t value) { return (value & 0xFFFFFFF0UL); } static inline uint32_t tu_align4k (uint32_t value) { return (value & 0xFFFFF000UL); } diff --git a/src/portable/nxp/lpc11_13_15/dcd_lpc11_13_15.c b/src/portable/nxp/lpc11_13_15/dcd_lpc11_13_15.c index 39c365d87..84aba742a 100644 --- a/src/portable/nxp/lpc11_13_15/dcd_lpc11_13_15.c +++ b/src/portable/nxp/lpc11_13_15/dcd_lpc11_13_15.c @@ -26,9 +26,19 @@ #include "tusb_option.h" -#if TUSB_OPT_DEVICE_ENABLED && (CFG_TUSB_MCU == OPT_MCU_LPC11UXX || CFG_TUSB_MCU == OPT_MCU_LPC13XX) +#if TUSB_OPT_DEVICE_ENABLED && (CFG_TUSB_MCU == OPT_MCU_LPC11UXX || CFG_TUSB_MCU == OPT_MCU_LPC13XX || CFG_TUSB_MCU == OPT_MCU_LPC51UXX) + +#if CFG_TUSB_MCU == OPT_MCU_LPC11UXX || CFG_TUSB_MCU == OPT_MCU_LPC13XX + // LPC11Uxx and LPC13xx use lpcopen + #include "chip.h" + #define DCD_REGS LPC_USB + #define DCD_IRQHandler USB_IRQHandler +#elif CFG_TUSB_MCU == OPT_MCU_LPC51UXX + #include "fsl_device_registers.h" + #define DCD_REGS USB0 + #define DCD_IRQHandler USB0_IRQHandler +#endif -#include "chip.h" #include "device/dcd.h" //--------------------------------------------------------------------+ @@ -39,6 +49,7 @@ #define EP_COUNT 10 // only SRAM1 & USB RAM can be used for transfer +// 2000 0000 to 203F FFFF #define SRAM_REGION 0x20000000 /* Although device controller are the same. DMA of @@ -47,7 +58,7 @@ * - LPC15 can ??? */ enum { - DMA_NBYTES_MAX = (CFG_TUSB_MCU == OPT_MCU_LPC11UXX ? 64 : 1023) + DMA_NBYTES_MAX = (CFG_TUSB_MCU == OPT_MCU_LPC11UXX || CFG_TUSB_MCU == OPT_MCU_LPC51UXX) ? 64 : 1023 }; enum { @@ -130,12 +141,12 @@ void dcd_init(uint8_t rhport) { (void) rhport; - LPC_USB->EPLISTSTART = (uint32_t) _dcd.ep; - LPC_USB->DATABUFSTART = SRAM_REGION; + DCD_REGS->EPLISTSTART = (uint32_t) _dcd.ep; + DCD_REGS->DATABUFSTART = SRAM_REGION; // 22-bit alignment - LPC_USB->INTSTAT = LPC_USB->INTSTAT; // clear all pending interrupt - LPC_USB->INTEN = INT_DEVICE_STATUS_MASK; - LPC_USB->DEVCMDSTAT |= CMDSTAT_DEVICE_ENABLE_MASK | CMDSTAT_DEVICE_CONNECT_MASK | + DCD_REGS->INTSTAT = DCD_REGS->INTSTAT; // clear all pending interrupt + DCD_REGS->INTEN = INT_DEVICE_STATUS_MASK; + DCD_REGS->DEVCMDSTAT |= CMDSTAT_DEVICE_ENABLE_MASK | CMDSTAT_DEVICE_CONNECT_MASK | CMDSTAT_RESET_CHANGE_MASK | CMDSTAT_CONNECT_CHANGE_MASK | CMDSTAT_SUSPEND_CHANGE_MASK; NVIC_ClearPendingIRQ(USB0_IRQn); @@ -158,8 +169,8 @@ void dcd_set_address(uint8_t rhport, uint8_t dev_addr) // Response with status first before changing device address dcd_edpt_xfer(rhport, tu_edpt_addr(0, TUSB_DIR_IN), NULL, 0); - LPC_USB->DEVCMDSTAT &= ~CMDSTAT_DEVICE_ADDR_MASK; - LPC_USB->DEVCMDSTAT |= dev_addr; + DCD_REGS->DEVCMDSTAT &= ~CMDSTAT_DEVICE_ADDR_MASK; + DCD_REGS->DEVCMDSTAT |= dev_addr; } void dcd_set_config(uint8_t rhport, uint8_t config_num) @@ -213,7 +224,7 @@ bool dcd_edpt_open(uint8_t rhport, tusb_desc_endpoint_t const * p_endpoint_desc) _dcd.ep[ep_id][0].is_iso = (p_endpoint_desc->bmAttributes.xfer == TUSB_XFER_ISOCHRONOUS); // Enable EP interrupt - LPC_USB->INTEN |= TU_BIT(ep_id); + DCD_REGS->INTEN |= TU_BIT(ep_id); return true; } @@ -258,13 +269,13 @@ static void bus_reset(void) _dcd.ep[0][1].buffer_offset = get_buf_offset(_dcd.setup_packet); - LPC_USB->EPINUSE = 0; - LPC_USB->EPBUFCFG = 0; - LPC_USB->EPSKIP = 0xFFFFFFFF; + DCD_REGS->EPINUSE = 0; + DCD_REGS->EPBUFCFG = 0; + DCD_REGS->EPSKIP = 0xFFFFFFFF; - LPC_USB->INTSTAT = LPC_USB->INTSTAT; // clear all pending interrupt - LPC_USB->DEVCMDSTAT |= CMDSTAT_SETUP_RECEIVED_MASK; // clear setup received interrupt - LPC_USB->INTEN = INT_DEVICE_STATUS_MASK | TU_BIT(0) | TU_BIT(1); // enable device status & control endpoints + DCD_REGS->INTSTAT = DCD_REGS->INTSTAT; // clear all pending interrupt + DCD_REGS->DEVCMDSTAT |= CMDSTAT_SETUP_RECEIVED_MASK; // clear setup received interrupt + DCD_REGS->INTEN = INT_DEVICE_STATUS_MASK | TU_BIT(0) | TU_BIT(1); // enable device status & control endpoints } static void process_xfer_isr(uint32_t int_status) @@ -297,19 +308,19 @@ static void process_xfer_isr(uint32_t int_status) } } -void USB_IRQHandler(void) +void DCD_IRQHandler(void) { - uint32_t const dev_cmd_stat = LPC_USB->DEVCMDSTAT; + uint32_t const dev_cmd_stat = DCD_REGS->DEVCMDSTAT; - uint32_t int_status = LPC_USB->INTSTAT & LPC_USB->INTEN; - LPC_USB->INTSTAT = int_status; // Acknowledge handled interrupt + uint32_t int_status = DCD_REGS->INTSTAT & DCD_REGS->INTEN; + DCD_REGS->INTSTAT = int_status; // Acknowledge handled interrupt if (int_status == 0) return; //------------- Device Status -------------// if ( int_status & INT_DEVICE_STATUS_MASK ) { - LPC_USB->DEVCMDSTAT |= CMDSTAT_RESET_CHANGE_MASK | CMDSTAT_CONNECT_CHANGE_MASK | CMDSTAT_SUSPEND_CHANGE_MASK; + DCD_REGS->DEVCMDSTAT |= CMDSTAT_RESET_CHANGE_MASK | CMDSTAT_CONNECT_CHANGE_MASK | CMDSTAT_SUSPEND_CHANGE_MASK; if ( dev_cmd_stat & CMDSTAT_RESET_CHANGE_MASK) // bus reset { bus_reset(); @@ -352,7 +363,7 @@ void USB_IRQHandler(void) _dcd.ep[0][0].active = _dcd.ep[1][0].active = 0; _dcd.ep[0][0].stall = _dcd.ep[1][0].stall = 0; - LPC_USB->DEVCMDSTAT |= CMDSTAT_SETUP_RECEIVED_MASK; + DCD_REGS->DEVCMDSTAT |= CMDSTAT_SETUP_RECEIVED_MASK; dcd_event_setup_received(0, _dcd.setup_packet, true);