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implement osal critical for none/freertos/pico-sdk

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This commit is contained in:
hathach
2025-05-19 22:51:40 +07:00
parent bffe5d97cc
commit bb1d348eb3
5 changed files with 69 additions and 29 deletions
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9
src/device/usbd.c
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@@ -1242,13 +1242,10 @@ TU_ATTR_FAST_FUNC void dcd_event_handler(dcd_event_t const* event, bool in_isr)
// USBD API For Class Driver
//--------------------------------------------------------------------+
void usbd_int_set(bool enabled)
{
if (enabled)
{
void usbd_int_set(bool enabled) {
if (enabled) {
dcd_int_enable(_usbd_rhport);
}else
{
} else {
dcd_int_disable(_usbd_rhport);
}
}

30
src/osal/osal_freertos.h
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@@ -102,38 +102,50 @@ TU_ATTR_ALWAYS_INLINE static inline void osal_task_delay(uint32_t msec) {
//--------------------------------------------------------------------+
// Critical API
//--------------------------------------------------------------------+
#define OSAL_CRITIAL_DEF(_name, _int_set) \
osal_critical_t _name
#if TUSB_MCU_VENDOR_ESPRESSIF
// Espressif critical take spinlock as argument
// Espressif critical take spinlock as argument and does not use in_isr
typedef portMUX_TYPE osal_critical_t;
TU_ATTR_ALWAYS_INLINE static inline void osal_critical_init(osal_critical_t *ctx) {
spinlock_initialize(ctx);
}
TU_ATTR_ALWAYS_INLINE static inline void osal_critical_enter(osal_critical_t *ctx) {
TU_ATTR_ALWAYS_INLINE static inline void osal_critical_enter(osal_critical_t *ctx, bool in_isr) {
(void) in_isr;
portENTER_CRITICAL(ctx);
}
TU_ATTR_ALWAYS_INLINE static inline void osal_critical_exit(osal_critical_t *ctx) {
TU_ATTR_ALWAYS_INLINE static inline void osal_critical_exit(osal_critical_t *ctx, bool in_isr) {
(void) in_isr;
portEXIT_CRITICAL(ctx);
}
#else
typedef uint8_t osal_critical_t; // not used
typedef UBaseType_t osal_critical_t;
TU_ATTR_ALWAYS_INLINE static inline void osal_critical_init(osal_critical_t *ctx) {
(void) ctx;
}
TU_ATTR_ALWAYS_INLINE static inline void osal_critical_enter(osal_critical_t *ctx) {
(void) ctx;
portENTER_CRITICAL();
TU_ATTR_ALWAYS_INLINE static inline void osal_critical_enter(osal_critical_t *ctx, bool in_isr) {
if (in_isr) {
*ctx = taskENTER_CRITICAL_FROM_ISR();
} else {
taskENTER_CRITICAL();
}
}
TU_ATTR_ALWAYS_INLINE static inline void osal_critical_exit(osal_critical_t *ctx) {
TU_ATTR_ALWAYS_INLINE static inline void osal_critical_exit(osal_critical_t *ctx, bool in_isr) {
(void) ctx;
portEXIT_CRITICAL();
if (in_isr) {
taskEXIT_CRITICAL_FROM_ISR(*ctx);
} else {
taskEXIT_CRITICAL();
}
}
#endif

19
src/osal/osal_none.h
View File

@@ -43,18 +43,27 @@ TU_ATTR_WEAK void osal_task_delay(uint32_t msec);
//--------------------------------------------------------------------+
// Critical API
//--------------------------------------------------------------------+
typedef uint8_t osal_critical_t; // not used
typedef struct {
void (* interrupt_set)(bool);
} osal_critical_t;
#define OSAL_CRITIAL_DEF(_name, _int_set) \
osal_critical_t _name = { .interrupt_set = _int_set }
TU_ATTR_ALWAYS_INLINE static inline void osal_critical_init(osal_critical_t *ctx) {
(void) ctx;
}
TU_ATTR_ALWAYS_INLINE static inline void osal_critical_enter(osal_critical_t *ctx) {
(void) ctx;
TU_ATTR_ALWAYS_INLINE static inline void osal_critical_enter(osal_critical_t *ctx, bool in_isr) {
if (!in_isr) {
ctx->interrupt_set(false);
}
}
TU_ATTR_ALWAYS_INLINE static inline void osal_critical_exit(osal_critical_t *ctx) {
(void) ctx;
TU_ATTR_ALWAYS_INLINE static inline void osal_critical_exit(osal_critical_t *ctx, bool in_isr) {
if (!in_isr) {
ctx->interrupt_set(true);
}
}
//--------------------------------------------------------------------+

21
src/osal/osal_pico.h
View File

@@ -43,6 +43,27 @@ TU_ATTR_ALWAYS_INLINE static inline void osal_task_delay(uint32_t msec) {
sleep_ms(msec);
}
//--------------------------------------------------------------------+
// Critical API
//--------------------------------------------------------------------+
typedef critical_section_t osal_critical_t;
#define OSAL_CRITIAL_DEF(_name, _int_set) \
osal_critical_t _name
TU_ATTR_ALWAYS_INLINE static inline void osal_critical_init(osal_critical_t *ctx) {
critical_section_init(ctx);
}
TU_ATTR_ALWAYS_INLINE static inline void osal_critical_enter(osal_critical_t *ctx, bool in_isr) {
(void) in_isr;
critical_section_enter_blocking(ctx);
}
TU_ATTR_ALWAYS_INLINE static inline void osal_critical_exit(osal_critical_t *ctx, bool in_isr) {
(void) in_isr;
critical_section_exit(ctx);
}
//--------------------------------------------------------------------+
// Binary Semaphore API
//--------------------------------------------------------------------+

19
src/portable/synopsys/dwc2/dcd_dwc2.c
View File

@@ -39,6 +39,7 @@
#define DWC2_DEBUG 2
#include "device/dcd.h"
#include "device/usbd_pvt.h"
#include "dwc2_common.h"
//--------------------------------------------------------------------+
@@ -56,7 +57,7 @@ typedef struct {
static xfer_ctl_t xfer_status[DWC2_EP_MAX][2];
#define XFER_CTL_BASE(_ep, _dir) (&xfer_status[_ep][_dir])
static osal_critical_t _dcd_critical;
static OSAL_CRITIAL_DEF(_dcd_critical, usbd_int_set);
typedef struct {
// EP0 transfers are limited to 1 packet - larger sizes has to be split
@@ -538,7 +539,7 @@ void dcd_edpt_close_all(uint8_t rhport) {
dwc2_regs_t* dwc2 = DWC2_REG(rhport);
uint8_t const ep_count = _dwc2_controller[rhport].ep_count;
osal_critical_enter(&_dcd_critical);
osal_critical_enter(&_dcd_critical, false);
_dcd_data.allocated_epin_count = 0;
@@ -559,7 +560,7 @@ void dcd_edpt_close_all(uint8_t rhport) {
dfifo_flush_rx(dwc2);
dfifo_device_init(rhport); // re-init dfifo
osal_critical_exit(&_dcd_critical);
osal_critical_exit(&_dcd_critical, false);
}
bool dcd_edpt_iso_alloc(uint8_t rhport, uint8_t ep_addr, uint16_t largest_packet_size) {
@@ -580,7 +581,7 @@ bool dcd_edpt_xfer(uint8_t rhport, uint8_t ep_addr, uint8_t* buffer, uint16_t to
xfer_ctl_t* xfer = XFER_CTL_BASE(epnum, dir);
bool ret;
osal_critical_enter(&_dcd_critical);
osal_critical_enter(&_dcd_critical, false);
if (xfer->max_size == 0) {
ret = false; // Endpoint is closed
@@ -599,7 +600,7 @@ bool dcd_edpt_xfer(uint8_t rhport, uint8_t ep_addr, uint8_t* buffer, uint16_t to
ret = true;
}
osal_critical_exit(&_dcd_critical);
osal_critical_exit(&_dcd_critical, false);
return ret;
}
@@ -617,7 +618,7 @@ bool dcd_edpt_xfer_fifo(uint8_t rhport, uint8_t ep_addr, tu_fifo_t* ff, uint16_t
xfer_ctl_t* xfer = XFER_CTL_BASE(epnum, dir);
bool ret;
osal_critical_enter(&_dcd_critical);
osal_critical_enter(&_dcd_critical, false);
if (xfer->max_size == 0) {
ret = false; // Endpoint is closed
@@ -632,7 +633,7 @@ bool dcd_edpt_xfer_fifo(uint8_t rhport, uint8_t ep_addr, tu_fifo_t* ff, uint16_t
ret = true;
}
osal_critical_exit(&_dcd_critical);
osal_critical_exit(&_dcd_critical, false);
return ret;
}
@@ -1020,14 +1021,14 @@ void dcd_int_handler(uint8_t rhport) {
if (gintsts & GINTSTS_USBRST) {
// USBRST is start of reset.
#if TUP_MCU_MULTIPLE_CORE
osal_critical_enter(&_dcd_critical);
osal_critical_enter(&_dcd_critical, true);
#endif
dwc2->gintsts = GINTSTS_USBRST;
handle_bus_reset(rhport);
#if TUP_MCU_MULTIPLE_CORE
osal_critical_exit(&_dcd_critical);
osal_critical_exit(&_dcd_critical, true);
#endif
}