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Merge pull request #2104 from hathach/g4-pd

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Initial support for USB PD stack
This commit is contained in:
Ha Thach
2023-06-12 23:14:48 +07:00
committed by GitHub
parent 39a64334aa 41801c2a6b
commit bbc76e7777
41 changed files with 2330 additions and 1700 deletions
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6
src/CMakeLists.txt
View File

@@ -32,6 +32,8 @@ function(add_tinyusb TARGET)
${CMAKE_CURRENT_FUNCTION_LIST_DIR}/class/hid/hid_host.c
${CMAKE_CURRENT_FUNCTION_LIST_DIR}/class/msc/msc_host.c
${CMAKE_CURRENT_FUNCTION_LIST_DIR}/class/vendor/vendor_host.c
# typec
${CMAKE_CURRENT_FUNCTION_LIST_DIR}/typec/utcd.c
)
target_include_directories(${TARGET} PUBLIC
${CMAKE_CURRENT_FUNCTION_LIST_DIR}
@@ -98,7 +100,3 @@ endif()
target_link_libraries(${TINYUSB_TARGET} PUBLIC
${TINYUSB_CONFIG_TARGET}
)
# export target name
# set(TINYUSB_TARGET ${TINYUSB_TARGET} PARENT_SCOPE)
# set(TINYUSB_CONFIG_TARGET ${TINYUSB_CONFIG_TARGET} PARENT_SCOPE)

7
src/common/tusb_mcu.h
View File

@@ -197,10 +197,17 @@
#define TUP_DCD_ENDPOINT_MAX 9
#elif TU_CHECK_MCU(OPT_MCU_STM32G4)
// Device controller
#define TUP_USBIP_FSDEV
#define TUP_USBIP_FSDEV_STM32
// TypeC controller
#define TUP_USBIP_TYPEC_STM32
#define TUP_DCD_ENDPOINT_MAX 8
#define TUP_TYPEC_RHPORTS_NUM 1
#elif TU_CHECK_MCU(OPT_MCU_STM32G0)
#define TUP_USBIP_FSDEV
#define TUP_USBIP_FSDEV_STM32

10
src/common/tusb_types.h
View File

@@ -232,6 +232,9 @@ enum {
#define TUSB_DESC_CONFIG_POWER_MA(x) ((x)/2)
//--------------------------------------------------------------------+
//
//--------------------------------------------------------------------+
typedef enum
{
XFER_RESULT_SUCCESS = 0,
@@ -474,9 +477,10 @@ typedef struct TU_ATTR_PACKED
uint16_t bcdDFUVersion;
} tusb_desc_dfu_functional_t;
/*------------------------------------------------------------------*/
/* Types
*------------------------------------------------------------------*/
//--------------------------------------------------------------------+
//
//--------------------------------------------------------------------+
typedef struct TU_ATTR_PACKED{
union {
struct TU_ATTR_PACKED {

1
src/device/dcd.h
View File

@@ -189,6 +189,7 @@ TU_ATTR_WEAK bool dcd_edpt_iso_alloc(uint8_t rhport, uint8_t ep_addr, uint16_t l
// Configure and enable an ISO endpoint according to descriptor
TU_ATTR_WEAK bool dcd_edpt_iso_activate(uint8_t rhport, tusb_desc_endpoint_t const * p_endpoint_desc);
//--------------------------------------------------------------------+
// Event API (implemented by stack)
//--------------------------------------------------------------------+

10
src/device/usbd.c
View File

@@ -252,9 +252,19 @@ static inline usbd_class_driver_t const * get_driver(uint8_t drvid)
drvid -= _app_driver_count;
}
// when there is no built-in drivers BUILTIN_DRIVER_COUNT = 0 will cause -Wtype-limits warning
#ifdef __GNUC__
#pragma GCC diagnostic push
#pragma GCC diagnostic ignored "-Wtype-limits"
#endif
// Built-in drivers
if (drvid < BUILTIN_DRIVER_COUNT) return &_usbd_driver[drvid];
#ifdef __GNUC__
#pragma GCC diagnostic pop
#endif
return NULL;
}

2
src/host/usbh.c
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@@ -724,7 +724,7 @@ uint8_t* usbh_get_enum_buf(void)
void usbh_int_set(bool enabled)
{
// TODO all host controller if multiple is used
// TODO all host controller if multiple are used since they shared the same event queue
if (enabled)
{
hcd_int_enable(_usbh_controller);

369
src/portable/st/typec/typec_stm32.c Normal file
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@@ -0,0 +1,369 @@
/*
* The MIT License (MIT)
*
* Copyright (c) 2023 Ha Thach (tinyusb.org)
*
* Permission is hereby granted, free of charge, to any person obtaining a copy
* of this software and associated documentation files (the "Software"), to deal
* in the Software without restriction, including without limitation the rights
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
* copies of the Software, and to permit persons to whom the Software is
* furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
* THE SOFTWARE.
*/
#include "tusb_option.h"
#include "typec/tcd.h"
#if CFG_TUC_ENABLED && defined(TUP_USBIP_TYPEC_STM32)
#include "common/tusb_common.h"
#if CFG_TUSB_MCU == OPT_MCU_STM32G4
#include "stm32g4xx.h"
#include "stm32g4xx_ll_dma.h" // for UCPD REQID
#else
#error "Unsupported STM32 family"
#endif
//--------------------------------------------------------------------+
//
//--------------------------------------------------------------------+
enum {
IMR_ATTACHED = UCPD_IMR_TXMSGDISCIE | UCPD_IMR_TXMSGSENTIE | UCPD_IMR_TXMSGABTIE | UCPD_IMR_TXUNDIE |
UCPD_IMR_RXHRSTDETIE | UCPD_IMR_RXOVRIE | UCPD_IMR_RXMSGENDIE | UCPD_IMR_RXORDDETIE |
UCPD_IMR_HRSTDISCIE | UCPD_IMR_HRSTSENTIE | UCPD_IMR_FRSEVTIE
};
#define PHY_SYNC1 0x18u
#define PHY_SYNC2 0x11u
#define PHY_SYNC3 0x06u
#define PHY_RST1 0x07u
#define PHY_RST2 0x19u
#define PHY_EOP 0x0Du
#define PHY_ORDERED_SET_SOP (PHY_SYNC1 | (PHY_SYNC1<<5u) | (PHY_SYNC1<<10u) | (PHY_SYNC2<<15u)) // SOP Ordered set coding
#define PHY_ORDERED_SET_SOP_P (PHY_SYNC1 | (PHY_SYNC1<<5u) | (PHY_SYNC3<<10u) | (PHY_SYNC3<<15u)) // SOP' Ordered set coding
#define PHY_ORDERED_SET_SOP_PP (PHY_SYNC1 | (PHY_SYNC3<<5u) | (PHY_SYNC1<<10u) | (PHY_SYNC3<<15u)) // SOP'' Ordered set coding
#define PHY_ORDERED_SET_HARD_RESET (PHY_RST1 | (PHY_RST1<<5u) | (PHY_RST1<<10u) | (PHY_RST2<<15u )) // Hard Reset Ordered set coding
#define PHY_ORDERED_SET_CABLE_RESET (PHY_RST1 | (PHY_SYNC1<<5u) | (PHY_RST1<<10u) | (PHY_SYNC3<<15u)) // Cable Reset Ordered set coding
#define PHY_ORDERED_SET_SOP_P_DEBUG (PHY_SYNC1 | (PHY_RST2<<5u) | (PHY_RST2<<10u) | (PHY_SYNC3<<15u)) // SOP' Debug Ordered set coding
#define PHY_ORDERED_SET_SOP_PP_DEBUG (PHY_SYNC1 | (PHY_RST2<<5u) | (PHY_SYNC3<<10u) | (PHY_SYNC2<<15u)) // SOP'' Debug Ordered set coding
static uint8_t const* _rx_buf;
static uint8_t const* _tx_pending_buf;
static uint16_t _tx_pending_bytes;
static uint16_t _tx_xferring_bytes;
static pd_header_t _good_crc = {
.msg_type = PD_CTRL_GOOD_CRC,
.data_role = 0, // UFP
.specs_rev = PD_REV_20,
.power_role = 0, // Sink
.msg_id = 0,
.n_data_obj = 0,
.extended = 0
};
// address of DMA channel rx, tx for each port
#define CFG_TUC_STM32_DMA { { DMA1_Channel1_BASE, DMA1_Channel2_BASE } }
//--------------------------------------------------------------------+
// DMA
//--------------------------------------------------------------------+
static const uint32_t _dma_addr_arr[TUP_TYPEC_RHPORTS_NUM][2] = CFG_TUC_STM32_DMA;
TU_ATTR_ALWAYS_INLINE static inline uint32_t dma_get_addr(uint8_t rhport, bool is_rx) {
return _dma_addr_arr[rhport][is_rx ? 0 : 1];
}
static void dma_init(uint8_t rhport, bool is_rx) {
uint32_t dma_addr = dma_get_addr(rhport, is_rx);
DMA_Channel_TypeDef* dma_ch = (DMA_Channel_TypeDef*) dma_addr;
uint32_t req_id;
if (is_rx) {
// Peripheral -> Memory, Memory inc, 8-bit, High priority
dma_ch->CCR = DMA_CCR_MINC | DMA_CCR_PL_1;
dma_ch->CPAR = (uint32_t) &UCPD1->RXDR;
req_id = LL_DMAMUX_REQ_UCPD1_RX;
} else {
// Memory -> Peripheral, Memory inc, 8-bit, High priority
dma_ch->CCR = DMA_CCR_MINC | DMA_CCR_PL_1 | DMA_CCR_DIR;
dma_ch->CPAR = (uint32_t) &UCPD1->TXDR;
req_id = LL_DMAMUX_REQ_UCPD1_TX;
}
// find and set up mux channel TODO support mcu with multiple DMAMUXs
enum {
CH_DIFF = DMA1_Channel2_BASE - DMA1_Channel1_BASE
};
uint32_t mux_ch_num;
#ifdef DMA2_BASE
if (dma_addr > DMA2_BASE) {
mux_ch_num = 8 * ((dma_addr - DMA2_Channel1_BASE) / CH_DIFF);
} else
#endif
{
mux_ch_num = (dma_addr - DMA1_Channel1_BASE) / CH_DIFF;
}
DMAMUX_Channel_TypeDef* mux_ch = DMAMUX1_Channel0 + mux_ch_num;
uint32_t mux_ccr = mux_ch->CCR & ~(DMAMUX_CxCR_DMAREQ_ID);
mux_ccr |= req_id;
mux_ch->CCR = mux_ccr;
}
TU_ATTR_ALWAYS_INLINE static inline void dma_start(uint8_t rhport, bool is_rx, void const* buf, uint16_t len) {
DMA_Channel_TypeDef* dma_ch = (DMA_Channel_TypeDef*) dma_get_addr(rhport, is_rx);
dma_ch->CMAR = (uint32_t) buf;
dma_ch->CNDTR = len;
dma_ch->CCR |= DMA_CCR_EN;
}
TU_ATTR_ALWAYS_INLINE static inline void dma_stop(uint8_t rhport, bool is_rx) {
DMA_Channel_TypeDef* dma_ch = (DMA_Channel_TypeDef*) dma_get_addr(rhport, is_rx);
dma_ch->CCR &= ~DMA_CCR_EN;
}
TU_ATTR_ALWAYS_INLINE static inline bool dma_enabled(uint8_t rhport, bool is_rx) {
DMA_Channel_TypeDef* dma_ch = (DMA_Channel_TypeDef*) dma_get_addr(rhport, is_rx);
return dma_ch->CCR & DMA_CCR_EN;
}
TU_ATTR_ALWAYS_INLINE static inline void dma_tx_start(uint8_t rhport, void const* buf, uint16_t len) {
UCPD1->TX_ORDSET = PHY_ORDERED_SET_SOP;
UCPD1->TX_PAYSZ = len;
dma_start(rhport, false, buf, len);
UCPD1->CR |= UCPD_CR_TXSEND;
}
TU_ATTR_ALWAYS_INLINE static inline void dma_tx_stop(uint8_t rhport) {
dma_stop(rhport, false);
}
//--------------------------------------------------------------------+
//
//--------------------------------------------------------------------+
bool tcd_init(uint8_t rhport, uint32_t port_type) {
(void) rhport;
// Init DMA for RX, TX
dma_init(rhport, true);
dma_init(rhport, false);
// Initialization phase: CFG1, detect all SOPs
UCPD1->CFG1 = (0x0d << UCPD_CFG1_HBITCLKDIV_Pos) | (0x10 << UCPD_CFG1_IFRGAP_Pos) | (0x07 << UCPD_CFG1_TRANSWIN_Pos) |
(0x01 << UCPD_CFG1_PSC_UCPDCLK_Pos) | (0x1f << UCPD_CFG1_RXORDSETEN_Pos);
UCPD1->CFG1 |= UCPD_CFG1_UCPDEN;
// General programming sequence (with UCPD configured then enabled)
if (port_type == TUSB_TYPEC_PORT_SNK) {
// Set analog mode enable both CC Phy
UCPD1->CR = (0x01 << UCPD_CR_ANAMODE_Pos) | (UCPD_CR_CCENABLE_0 | UCPD_CR_CCENABLE_1);
// Read Voltage State on CC1 & CC2 fore initial state
uint32_t v_cc[2];
v_cc[0] = (UCPD1->SR >> UCPD_SR_TYPEC_VSTATE_CC1_Pos) & 0x03;
v_cc[1] = (UCPD1->SR >> UCPD_SR_TYPEC_VSTATE_CC2_Pos) & 0x03;
TU_LOG1("Initial VState CC1 = %u, CC2 = %u\r\n", v_cc[0], v_cc[1]);
// Enable CC1 & CC2 Interrupt
UCPD1->IMR = UCPD_IMR_TYPECEVT1IE | UCPD_IMR_TYPECEVT2IE;
}
// Disable dead battery in PWR's CR3
PWR->CR3 |= PWR_CR3_UCPD_DBDIS;
return true;
}
// Enable interrupt
void tcd_int_enable (uint8_t rhport) {
(void) rhport;
NVIC_EnableIRQ(UCPD1_IRQn);
}
// Disable interrupt
void tcd_int_disable(uint8_t rhport) {
(void) rhport;
NVIC_DisableIRQ(UCPD1_IRQn);
}
bool tcd_msg_receive(uint8_t rhport, uint8_t* buffer, uint16_t total_bytes) {
_rx_buf = buffer;
dma_start(rhport, true, buffer, total_bytes);
return true;
}
bool tcd_msg_send(uint8_t rhport, uint8_t const* buffer, uint16_t total_bytes) {
(void) rhport;
if (dma_enabled(rhport, false)) {
// DMA is busy, probably sending GoodCRC, save as pending TX
_tx_pending_buf = buffer;
_tx_pending_bytes = total_bytes;
}else {
// DMA is free, start sending
_tx_pending_buf = NULL;
_tx_pending_bytes = 0;
_tx_xferring_bytes = total_bytes;
dma_tx_start(rhport, buffer, total_bytes);
}
return true;
}
void tcd_int_handler(uint8_t rhport) {
(void) rhport;
uint32_t sr = UCPD1->SR;
sr &= UCPD1->IMR;
if (sr & (UCPD_SR_TYPECEVT1 | UCPD_SR_TYPECEVT2)) {
uint32_t v_cc[2];
v_cc[0] = (UCPD1->SR >> UCPD_SR_TYPEC_VSTATE_CC1_Pos) & 0x03;
v_cc[1] = (UCPD1->SR >> UCPD_SR_TYPEC_VSTATE_CC2_Pos) & 0x03;
TU_LOG3("VState CC1 = %u, CC2 = %u\n", v_cc[0], v_cc[1]);
uint32_t cr = UCPD1->CR;
// TODO only support SNK for now, required highest voltage for now
// Enable PHY on active CC and disable Rd on other CC
// FIXME somehow CC2 is vstate is not correct, always 1 even not attached.
// on DPOW1 board, it is connected to PA10 (USBPD_DBCC2), we probably miss something.
if ((sr & UCPD_SR_TYPECEVT1) && (v_cc[0] == 3)) {
TU_LOG3("Attach CC1\n");
cr &= ~(UCPD_CR_PHYCCSEL | UCPD_CR_CCENABLE);
cr |= UCPD_CR_PHYRXEN | UCPD_CR_CCENABLE_0;
} else if ((sr & UCPD_SR_TYPECEVT2) && (v_cc[1] == 3)) {
TU_LOG3("Attach CC2\n");
cr &= ~UCPD_CR_CCENABLE;
cr |= (UCPD_CR_PHYCCSEL | UCPD_CR_PHYRXEN | UCPD_CR_CCENABLE_1);
} else {
TU_LOG3("Detach\n");
cr &= ~UCPD_CR_PHYRXEN;
cr |= UCPD_CR_CCENABLE_0 | UCPD_CR_CCENABLE_1;
}
if (cr & UCPD_CR_PHYRXEN) {
// Attached
UCPD1->IMR |= IMR_ATTACHED;
UCPD1->CFG1 |= UCPD_CFG1_RXDMAEN | UCPD_CFG1_TXDMAEN;
}else {
// Detached
UCPD1->CFG1 &= ~(UCPD_CFG1_RXDMAEN | UCPD_CFG1_TXDMAEN);
UCPD1->IMR &= ~IMR_ATTACHED;
}
// notify stack
tcd_event_cc_changed(rhport, v_cc[0], v_cc[1], true);
UCPD1->CR = cr;
// ack
UCPD1->ICR = UCPD_ICR_TYPECEVT1CF | UCPD_ICR_TYPECEVT2CF;
}
//------------- RX -------------//
if (sr & UCPD_SR_RXORDDET) {
// SOP: Start of Packet.
TU_LOG3("SOP\n");
// UCPD1->RX_ORDSET & UCPD_RX_ORDSET_RXORDSET_Msk;
// ack
UCPD1->ICR = UCPD_ICR_RXORDDETCF;
}
// Received full message
if (sr & UCPD_SR_RXMSGEND) {
TU_LOG3("RX MSG END\n");
// stop TX
dma_stop(rhport, true);
uint8_t result;
if (!(sr & UCPD_SR_RXERR)) {
// response with good crc
_good_crc.msg_id = ((pd_header_t const*) _rx_buf)->msg_id;
dma_tx_start(rhport, &_good_crc, 2);
result = XFER_RESULT_SUCCESS;
}else {
// CRC failed
result = XFER_RESULT_FAILED;
}
// notify stack
tcd_event_rx_complete(rhport, UCPD1->RX_PAYSZ, result, true);
// ack
UCPD1->ICR = UCPD_ICR_RXMSGENDCF;
}
if (sr & UCPD_SR_RXOVR) {
TU_LOG3("RXOVR\n");
// ack
UCPD1->ICR = UCPD_ICR_RXOVRCF;
}
//------------- TX -------------//
// All tx events: complete and error
if (sr & (UCPD_SR_TXMSGSENT | (UCPD_SR_TXMSGDISC | UCPD_SR_TXMSGABT | UCPD_SR_TXUND))) {
// force TX stop
dma_tx_stop(rhport);
uint16_t const xferred_bytes = _tx_xferring_bytes - UCPD1->TX_PAYSZ;
uint8_t result;
if ( sr & UCPD_SR_TXMSGSENT ) {
TU_LOG3("TX MSG SENT\n");
result = XFER_RESULT_SUCCESS;
// ack
UCPD1->ICR = UCPD_ICR_TXMSGSENTCF;
}else {
TU_LOG3("TX Error\n");
result = XFER_RESULT_FAILED;
// ack
UCPD1->ICR = UCPD_SR_TXMSGDISC | UCPD_SR_TXMSGABT | UCPD_SR_TXUND;
}
// start pending TX if any
if (_tx_pending_buf && _tx_pending_bytes ) {
// Start the pending TX
dma_tx_start(rhport, _tx_pending_buf, _tx_pending_bytes);
// clear pending
_tx_pending_buf = NULL;
_tx_pending_bytes = 0;
}
// notify stack
tcd_event_tx_complete(rhport, xferred_bytes, result, true);
}
}
#endif

5
src/tusb.h
View File

@@ -40,6 +40,11 @@
#include "class/hid/hid.h"
//------------- TypeC -------------//
#if CFG_TUC_ENABLED
#include "typec/utcd.h"
#endif
//------------- HOST -------------//
#if CFG_TUH_ENABLED
#include "host/usbh.h"

10
src/tusb_option.h
View File

@@ -483,6 +483,16 @@
#endif
//--------------------------------------------------------------------+
// TypeC Options (Default)
//--------------------------------------------------------------------+
#ifndef CFG_TUC_ENABLED
#define CFG_TUC_ENABLED 0
#define tuc_int_handler(_p)
#endif
//------------------------------------------------------------------
// Configuration Validation
//------------------------------------------------------------------

237
src/typec/pd_types.h Normal file
View File

@@ -0,0 +1,237 @@
/*
* The MIT License (MIT)
*
* Copyright (c) 2023 Ha Thach (tinyusb.org)
*
* Permission is hereby granted, free of charge, to any person obtaining a copy
* of this software and associated documentation files (the "Software"), to deal
* in the Software without restriction, including without limitation the rights
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
* copies of the Software, and to permit persons to whom the Software is
* furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
* THE SOFTWARE.
*
* This file is part of the TinyUSB stack.
*/
#ifndef _TUSB_PD_TYPES_H_
#define _TUSB_PD_TYPES_H_
#ifdef __cplusplus
extern "C" {
#endif
#include <stdbool.h>
#include <stdint.h>
#include "common/tusb_compiler.h"
// Start of all packed definitions for compiler without per-type packed
TU_ATTR_PACKED_BEGIN
TU_ATTR_BIT_FIELD_ORDER_BEGIN
//--------------------------------------------------------------------+
// TYPE-C
//--------------------------------------------------------------------+
typedef enum {
TUSB_TYPEC_PORT_SRC,
TUSB_TYPEC_PORT_SNK,
TUSB_TYPEC_PORT_DRP
} tusb_typec_port_type_t;
enum {
PD_CTRL_RESERVED = 0, // 0b00000: 0
PD_CTRL_GOOD_CRC, // 0b00001: 1
PD_CTRL_GO_TO_MIN, // 0b00010: 2
PD_CTRL_ACCEPT, // 0b00011: 3
PD_CTRL_REJECT, // 0b00100: 4
PD_CTRL_PING, // 0b00101: 5
PD_CTRL_PS_READY, // 0b00110: 6
PD_CTRL_GET_SOURCE_CAP, // 0b00111: 7
PD_CTRL_GET_SINK_CAP, // 0b01000: 8
PD_CTRL_DR_SWAP, // 0b01001: 9
PD_CTRL_PR_SWAP, // 0b01010: 10
PD_CTRL_VCONN_SWAP, // 0b01011: 11
PD_CTRL_WAIT, // 0b01100: 12
PD_CTRL_SOFT_RESET, // 0b01101: 13
PD_CTRL_DATA_RESET, // 0b01110: 14
PD_CTRL_DATA_RESET_COMPLETE, // 0b01111: 15
PD_CTRL_NOT_SUPPORTED, // 0b10000: 16
PD_CTRL_GET_SOURCE_CAP_EXTENDED, // 0b10001: 17
PD_CTRL_GET_STATUS, // 0b10010: 18
PD_CTRL_FR_SWAP, // 0b10011: 19
PD_CTRL_GET_PPS_STATUS, // 0b10100: 20
PD_CTRL_GET_COUNTRY_CODES, // 0b10101: 21
PD_CTRL_GET_SINK_CAP_EXTENDED, // 0b10110: 22
PD_CTRL_GET_SOURCE_INFO, // 0b10111: 23
PD_CTRL_REVISION, // 0b11000: 24
};
enum {
PD_DATA_RESERVED = 0, // 0b00000: 0
PD_DATA_SOURCE_CAP, // 0b00001: 1
PD_DATA_REQUEST, // 0b00010: 2
PD_DATA_BIST, // 0b00011: 3
PD_DATA_SINK_CAP, // 0b00100: 4
PD_DATA_BATTERY_STATUS, // 0b00101: 5
PD_DATA_ALERT, // 0b00110: 6
PD_DATA_GET_COUNTRY_INFO, // 0b00111: 7
PD_DATA_ENTER_USB, // 0b01000: 8
PD_DATA_EPR_REQUEST, // 0b01001: 9
PD_DATA_EPR_MODE, // 0b01010: 10
PD_DATA_SRC_INFO, // 0b01011: 11
PD_DATA_REVISION, // 0b01100: 12
PD_DATA_RESERVED_13, // 0b01101: 13
PD_DATA_RESERVED_14, // 0b01110: 14
PD_DATA_VENDOR_DEFINED, // 0b01111: 15
};
enum {
PD_REV_10 = 0x0,
PD_REV_20 = 0x1,
PD_REV_30 = 0x2,
};
enum {
PD_DATA_ROLE_UFP = 0x0,
PD_DATA_ROLE_DFP = 0x1,
};
enum {
PD_POWER_ROLE_SINK = 0x0,
PD_POWER_ROLE_SOURCE = 0x1,
};
typedef struct TU_ATTR_PACKED {
uint16_t msg_type : 5; // [0:4]
uint16_t data_role : 1; // [5] SOP only: 0 UFP, 1 DFP
uint16_t specs_rev : 2; // [6:7]
uint16_t power_role : 1; // [8] SOP only: 0 Sink, 1 Source
uint16_t msg_id : 3; // [9:11]
uint16_t n_data_obj : 3; // [12:14]
uint16_t extended : 1; // [15]
} pd_header_t;
TU_VERIFY_STATIC(sizeof(pd_header_t) == 2, "size is not correct");
typedef struct TU_ATTR_PACKED {
uint16_t data_size : 9; // [0:8]
uint16_t reserved : 1; // [9]
uint16_t request_chunk : 1; // [10]
uint16_t chunk_number : 4; // [11:14]
uint16_t chunked : 1; // [15]
} pd_header_extended_t;
TU_VERIFY_STATIC(sizeof(pd_header_extended_t) == 2, "size is not correct");
//--------------------------------------------------------------------+
// Source Capability
//--------------------------------------------------------------------+
// All table references are from USBPD Specification rev3.1 version 1.8
enum {
PD_PDO_TYPE_FIXED = 0, // Vmin = Vmax
PD_PDO_TYPE_BATTERY,
PD_PDO_TYPE_VARIABLE, // non-battery
PD_PDO_TYPE_APDO, // Augmented Power Data Object
};
// Fixed Power Data Object (PDO) table 6-9
typedef struct TU_ATTR_PACKED {
uint32_t current_max_10ma : 10; // [9..0] Max current in 10mA unit
uint32_t voltage_50mv : 10; // [19..10] Voltage in 50mV unit
uint32_t current_peak : 2; // [21..20] Peak current
uint32_t reserved : 1; // [22] Reserved
uint32_t epr_mode_capable : 1; // [23] epr_mode_capable
uint32_t unchunked_ext_msg_support : 1; // [24] UnChunked Extended Message Supported
uint32_t dual_role_data : 1; // [25] Dual Role Data
uint32_t usb_comm_capable : 1; // [26] USB Communications Capable
uint32_t unconstrained_power : 1; // [27] Unconstrained Power
uint32_t usb_suspend_supported : 1; // [28] USB Suspend Supported
uint32_t dual_role_power : 1; // [29] Dual Role Power
uint32_t type : 2; // [30] Fixed Supply type = PD_PDO_TYPE_FIXED
} pd_pdo_fixed_t;
TU_VERIFY_STATIC(sizeof(pd_pdo_fixed_t) == 4, "Invalid size");
// Battery Power Data Object (PDO) table 6-12
typedef struct TU_ATTR_PACKED {
uint32_t power_max_250mw : 10; // [9..0] Max allowable power in 250mW unit
uint32_t voltage_min_50mv : 10; // [19..10] Minimum voltage in 50mV unit
uint32_t voltage_max_50mv : 10; // [29..20] Maximum voltage in 50mV unit
uint32_t type : 2; // [31..30] Battery type = PD_PDO_TYPE_BATTERY
} pd_pdo_battery_t;
TU_VERIFY_STATIC(sizeof(pd_pdo_battery_t) == 4, "Invalid size");
// Variable Power Data Object (PDO) table 6-11
typedef struct TU_ATTR_PACKED {
uint32_t current_max_10ma : 10; // [9..0] Max current in 10mA unit
uint32_t voltage_min_50mv : 10; // [19..10] Minimum voltage in 50mV unit
uint32_t voltage_max_50mv : 10; // [29..20] Maximum voltage in 50mV unit
uint32_t type : 2; // [31..30] Variable Supply type = PD_PDO_TYPE_VARIABLE
} pd_pdo_variable_t;
TU_VERIFY_STATIC(sizeof(pd_pdo_variable_t) == 4, "Invalid size");
// Augmented Power Data Object (PDO) table 6-13
typedef struct TU_ATTR_PACKED {
uint32_t current_max_50ma : 7; // [6..0] Max current in 50mA unit
uint32_t reserved1 : 1; // [7] Reserved
uint32_t voltage_min_100mv : 8; // [15..8] Minimum Voltage in 100mV unit
uint32_t reserved2 : 1; // [16] Reserved
uint32_t voltage_max_100mv : 8; // [24..17] Maximum Voltage in 100mV unit
uint32_t reserved3 : 2; // [26..25] Reserved
uint32_t pps_power_limited : 1; // [27] PPS Power Limited
uint32_t spr_programmable : 2; // [29..28] SPR Programmable Power Supply
uint32_t type : 2; // [31..30] Augmented Power Data Object = PD_PDO_TYPE_APDO
} pd_pdo_apdo_t;
TU_VERIFY_STATIC(sizeof(pd_pdo_apdo_t) == 4, "Invalid size");
//--------------------------------------------------------------------+
// Request
//--------------------------------------------------------------------+
typedef struct TU_ATTR_PACKED {
uint32_t current_extremum_10ma : 10; // [9..0] Max (give back = 0) or Min (give back = 1) current in 10mA unit
uint32_t current_operate_10ma : 10; // [19..10] Operating current in 10mA unit
uint32_t reserved : 2; // [21..20] Reserved
uint32_t epr_mode_capable : 1; // [22] EPR mode capable
uint32_t unchunked_ext_msg_support : 1; // [23] UnChunked Extended Message Supported
uint32_t no_usb_suspend : 1; // [24] No USB Suspend
uint32_t usb_comm_capable : 1; // [25] USB Communications Capable
uint32_t capability_mismatch : 1; // [26] Capability Mismatch
uint32_t give_back_flag : 1; // [27] GiveBack Flag: 0 = Max, 1 = Min
uint32_t object_position : 4; // [31..28] Object Position
} pd_rdo_fixed_variable_t;
TU_VERIFY_STATIC(sizeof(pd_rdo_fixed_variable_t) == 4, "Invalid size");
typedef struct TU_ATTR_PACKED {
uint32_t power_extremum_250mw : 10; // [9..0] Max (give back = 0) or Min (give back = 1) operating power in 250mW unit
uint32_t power_operate_250mw : 10; // [19..10] Operating power in 250mW unit
uint32_t reserved : 2; // [21..20] Reserved
uint32_t epr_mode_capable : 1; // [22] EPR mode capable
uint32_t unchunked_ext_msg_support : 1; // [23] UnChunked Extended Message Supported
uint32_t no_usb_suspend : 1; // [24] No USB Suspend
uint32_t usb_comm_capable : 1; // [25] USB Communications Capable
uint32_t capability_mismatch : 1; // [26] Capability Mismatch
uint32_t give_back_flag : 1; // [27] GiveBack Flag: 0 = Max, 1 = Min
uint32_t object_position : 4; // [31..28] Object Position
} pd_rdo_battery_t;
TU_VERIFY_STATIC(sizeof(pd_rdo_battery_t) == 4, "Invalid size");
TU_ATTR_PACKED_END // End of all packed definitions
TU_ATTR_BIT_FIELD_ORDER_END
#ifdef __cplusplus
}
#endif
#endif

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/*
* The MIT License (MIT)
*
* Copyright (c) 2023 Ha Thach (thach@tinyusb.org) for Adafruit Industries
*
* Permission is hereby granted, free of charge, to any person obtaining a copy
* of this software and associated documentation files (the "Software"), to deal
* in the Software without restriction, including without limitation the rights
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
* copies of the Software, and to permit persons to whom the Software is
* furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
* THE SOFTWARE.
*
* This file is part of the TinyUSB stack.
*/
#ifndef _TUSB_TCD_H_
#define _TUSB_TCD_H_
#include "common/tusb_common.h"
#include "pd_types.h"
#include "osal/osal.h"
#include "common/tusb_fifo.h"
#ifdef __cplusplus
extern "C" {
#endif
//--------------------------------------------------------------------+
//
//--------------------------------------------------------------------+
enum {
TCD_EVENT_INVALID = 0,
TCD_EVENT_CC_CHANGED,
TCD_EVENT_RX_COMPLETE,
TCD_EVENT_TX_COMPLETE,
};
typedef struct TU_ATTR_PACKED {
uint8_t rhport;
uint8_t event_id;
union {
struct {
uint8_t cc_state[2];
} cc_changed;
struct TU_ATTR_PACKED {
uint16_t result : 2;
uint16_t xferred_bytes : 14;
} xfer_complete;
};
} tcd_event_t;;
//--------------------------------------------------------------------+
//
//--------------------------------------------------------------------+
// Initialize controller
bool tcd_init(uint8_t rhport, uint32_t port_type);
// Enable interrupt
void tcd_int_enable (uint8_t rhport);
// Disable interrupt
void tcd_int_disable(uint8_t rhport);
// Interrupt Handler
void tcd_int_handler(uint8_t rhport);
//--------------------------------------------------------------------+
//
//--------------------------------------------------------------------+
bool tcd_msg_receive(uint8_t rhport, uint8_t* buffer, uint16_t total_bytes);
bool tcd_msg_send(uint8_t rhport, uint8_t const* buffer, uint16_t total_bytes);
//--------------------------------------------------------------------+
// Event API (implemented by stack)
// Called by TCD to notify stack
//--------------------------------------------------------------------+
extern void tcd_event_handler(tcd_event_t const * event, bool in_isr);
TU_ATTR_ALWAYS_INLINE static inline
void tcd_event_cc_changed(uint8_t rhport, uint8_t cc1, uint8_t cc2, bool in_isr) {
tcd_event_t event = {
.rhport = rhport,
.event_id = TCD_EVENT_CC_CHANGED,
.cc_changed = {
.cc_state = {cc1, cc2 }
}
};
tcd_event_handler(&event, in_isr);
}
TU_ATTR_ALWAYS_INLINE static inline
void tcd_event_rx_complete(uint8_t rhport, uint16_t xferred_bytes, uint8_t result, bool in_isr) {
tcd_event_t event = {
.rhport = rhport,
.event_id = TCD_EVENT_RX_COMPLETE,
.xfer_complete = {
.xferred_bytes = xferred_bytes,
.result = result
}
};
tcd_event_handler(&event, in_isr);
}
TU_ATTR_ALWAYS_INLINE static inline
void tcd_event_tx_complete(uint8_t rhport, uint16_t xferred_bytes, uint8_t result, bool in_isr) {
tcd_event_t event = {
.rhport = rhport,
.event_id = TCD_EVENT_TX_COMPLETE,
.xfer_complete = {
.xferred_bytes = xferred_bytes,
.result = result
}
};
tcd_event_handler(&event, in_isr);
}
#ifdef __cplusplus
}
#endif
#endif

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/*
* The MIT License (MIT)
*
* Copyright (c) 2023 Ha Thach (thach@tinyusb.org)
*
* Permission is hereby granted, free of charge, to any person obtaining a copy
* of this software and associated documentation files (the "Software"), to deal
* in the Software without restriction, including without limitation the rights
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
* copies of the Software, and to permit persons to whom the Software is
* furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
* THE SOFTWARE.
*
* This file is part of the TinyUSB stack.
*/
#include "tusb_option.h"
#if CFG_TUC_ENABLED
#include "tcd.h"
#include "utcd.h"
//--------------------------------------------------------------------+
//
//--------------------------------------------------------------------+
// Debug level of USBD
#define UTCD_DEBUG 2
#define TU_LOG_UTCD(...) TU_LOG(UTCD_DEBUG, __VA_ARGS__)
// Event queue
// utcd_int_set() is used as mutex in OS NONE config
void utcd_int_set(bool enabled);
OSAL_QUEUE_DEF(utcd_int_set, _utcd_qdef, CFG_TUC_TASK_QUEUE_SZ, tcd_event_t);
tu_static osal_queue_t _utcd_q;
// if stack is initialized
static bool _utcd_inited = false;
// if port is initialized
static bool _port_inited[TUP_TYPEC_RHPORTS_NUM];
// Max possible PD size is 262 bytes
static uint8_t _rx_buf[64] TU_ATTR_ALIGNED(4);
static uint8_t _tx_buf[64] TU_ATTR_ALIGNED(4);
bool utcd_msg_send(uint8_t rhport, pd_header_t const* header, void const* data);
bool parse_msg_data(uint8_t rhport, pd_header_t const* header, uint8_t const* dobj, uint8_t const* p_end);
bool parse_msg_control(uint8_t rhport, pd_header_t const* header);
//--------------------------------------------------------------------+
//
//--------------------------------------------------------------------+
bool tuc_inited(uint8_t rhport) {
return _utcd_inited && _port_inited[rhport];
}
bool tuc_init(uint8_t rhport, uint32_t port_type) {
// Initialize stack
if (!_utcd_inited) {
tu_memclr(_port_inited, sizeof(_port_inited));
_utcd_q = osal_queue_create(&_utcd_qdef);
TU_ASSERT(_utcd_q != NULL);
_utcd_inited = true;
}
// skip if port already initialized
if ( _port_inited[rhport] ) {
return true;
}
TU_LOG_UTCD("UTCD init on port %u\r\n", rhport);
TU_LOG_INT(UTCD_DEBUG, sizeof(tcd_event_t));
TU_ASSERT(tcd_init(rhport, port_type));
tcd_int_enable(rhport);
_port_inited[rhport] = true;
return true;
}
void tuc_task_ext(uint32_t timeout_ms, bool in_isr) {
(void) in_isr; // not implemented yet
// Skip if stack is not initialized
if (!_utcd_inited) return;
// Loop until there is no more events in the queue
while (1) {
tcd_event_t event;
if (!osal_queue_receive(_utcd_q, &event, timeout_ms)) return;
switch (event.event_id) {
case TCD_EVENT_CC_CHANGED:
break;
case TCD_EVENT_RX_COMPLETE:
// TODO process message here in ISR, move to thread later
if (event.xfer_complete.result == XFER_RESULT_SUCCESS) {
pd_header_t const* header = (pd_header_t const*) _rx_buf;
if (header->n_data_obj == 0) {
parse_msg_control(event.rhport, header);
}else {
uint8_t const* p_end = _rx_buf + event.xfer_complete.xferred_bytes;
uint8_t const * dobj = _rx_buf + sizeof(pd_header_t);
parse_msg_data(event.rhport, header, dobj, p_end);
}
}
// prepare for next message
tcd_msg_receive(event.rhport, _rx_buf, sizeof(_rx_buf));
break;
case TCD_EVENT_TX_COMPLETE:
break;
default: break;
}
}
}
bool parse_msg_data(uint8_t rhport, pd_header_t const* header, uint8_t const* dobj, uint8_t const* p_end) {
if (tuc_pd_data_received_cb) {
tuc_pd_data_received_cb(rhport, header, dobj, p_end);
}
return true;
}
bool parse_msg_control(uint8_t rhport, pd_header_t const* header) {
if (tuc_pd_control_received_cb) {
tuc_pd_control_received_cb(rhport, header);
}
return true;
}
//--------------------------------------------------------------------+
//
//--------------------------------------------------------------------+
bool utcd_msg_send(uint8_t rhport, pd_header_t const* header, void const* data) {
// copy header
memcpy(_tx_buf, header, sizeof(pd_header_t));
// copy data objcet if available
uint16_t const n_data_obj = header->n_data_obj;
if (n_data_obj > 0) {
memcpy(_tx_buf + sizeof(pd_header_t), data, n_data_obj * 4);
}
return tcd_msg_send(rhport, _tx_buf, sizeof(pd_header_t) + n_data_obj * 4);
}
bool tuc_msg_request(uint8_t rhport, void const* rdo) {
pd_header_t const header = {
.msg_type = PD_DATA_REQUEST,
.data_role = PD_DATA_ROLE_UFP,
.specs_rev = PD_REV_30,
.power_role = PD_POWER_ROLE_SINK,
.msg_id = 0,
.n_data_obj = 1,
.extended = 0,
};
return utcd_msg_send(rhport, &header, rdo);
}
void tcd_event_handler(tcd_event_t const * event, bool in_isr) {
(void) in_isr;
switch(event->event_id) {
case TCD_EVENT_CC_CHANGED:
if (event->cc_changed.cc_state[0] || event->cc_changed.cc_state[1]) {
// Attach, start receiving
tcd_msg_receive(event->rhport, _rx_buf, sizeof(_rx_buf));
}else {
// Detach
}
break;
default: break;
}
osal_queue_send(_utcd_q, event, in_isr);
}
//--------------------------------------------------------------------+
//
//--------------------------------------------------------------------+
void utcd_int_set(bool enabled) {
// Disable all controllers since they shared the same event queue
for (uint8_t p = 0; p < TUP_TYPEC_RHPORTS_NUM; p++) {
if ( _port_inited[p] ) {
if (enabled) {
tcd_int_enable(p);
}else {
tcd_int_disable(p);
}
}
}
}
#endif

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/*
* The MIT License (MIT)
*
* Copyright (c) 2023 Ha Thach (tinyusb.org)
*
* Permission is hereby granted, free of charge, to any person obtaining a copy
* of this software and associated documentation files (the "Software"), to deal
* in the Software without restriction, including without limitation the rights
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
* copies of the Software, and to permit persons to whom the Software is
* furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
* THE SOFTWARE.
*
* This file is part of the TinyUSB stack.
*/
#ifndef _TUSB_UTCD_H_
#define _TUSB_UTCD_H_
#include "common/tusb_common.h"
#include "pd_types.h"
#ifdef __cplusplus
extern "C" {
#endif
//--------------------------------------------------------------------+
// TypeC Configuration
//--------------------------------------------------------------------+
#ifndef CFG_TUC_TASK_QUEUE_SZ
#define CFG_TUC_TASK_QUEUE_SZ 8
#endif
//--------------------------------------------------------------------+
// Application API
//--------------------------------------------------------------------+
// Init typec stack on a port
bool tuc_init(uint8_t rhport, uint32_t port_type);
// Check if typec port is initialized
bool tuc_inited(uint8_t rhport);
// Task function should be called in main/rtos loop, extended version of tud_task()
// - timeout_ms: millisecond to wait, zero = no wait, 0xFFFFFFFF = wait forever
// - in_isr: if function is called in ISR
void tuc_task_ext(uint32_t timeout_ms, bool in_isr);
// Task function should be called in main/rtos loop
TU_ATTR_ALWAYS_INLINE static inline
void tuc_task (void) {
tuc_task_ext(UINT32_MAX, false);
}
#ifndef _TUSB_TCD_H_
extern void tcd_int_handler(uint8_t rhport);
#endif
// Interrupt handler, name alias to TCD
#define tuc_int_handler tcd_int_handler
//--------------------------------------------------------------------+
// Callbacks
//--------------------------------------------------------------------+
TU_ATTR_WEAK bool tuc_pd_data_received_cb(uint8_t rhport, pd_header_t const* header, uint8_t const* dobj, uint8_t const* p_end);
TU_ATTR_WEAK bool tuc_pd_control_received_cb(uint8_t rhport, pd_header_t const* header);
//--------------------------------------------------------------------+
//
//--------------------------------------------------------------------+
bool tuc_msg_request(uint8_t rhport, void const* rdo);
#ifdef __cplusplus
}
#endif
#endif