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fsdev read/write packet use unaligned function

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This commit is contained in:
hathach
2024-07-23 19:53:41 +07:00
parent 5d26f5794e
commit c0f38ebf8d
3 changed files with 64 additions and 68 deletions
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11
hw/bsp/ch32v20x/family.c
View File

@@ -173,6 +173,17 @@ uint32_t board_button_read(void) {
return false; return false;
} }
size_t board_get_unique_id(uint8_t id[], size_t max_len) {
(void) max_len;
volatile uint32_t* ch32_uuid = ((volatile uint32_t*) 0x1FFFF7E8UL);
uint32_t* serial_32 = (uint32_t*) (uintptr_t) id;
serial_32[0] = ch32_uuid[0];
serial_32[1] = ch32_uuid[1];
serial_32[2] = ch32_uuid[2];
return 12;
}
int board_uart_read(uint8_t *buf, int len) { int board_uart_read(uint8_t *buf, int len) {
(void) buf; (void) buf;
(void) len; (void) len;

108
src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c
View File

@@ -426,6 +426,8 @@ static void dcd_ep_ctr_rx_handler(uint32_t wIstr)
dcd_read_packet_memory(userMemBuf, pcd_get_ep_rx_address(USB, EPindex), 8); dcd_read_packet_memory(userMemBuf, pcd_get_ep_rx_address(USB, EPindex), 8);
dcd_event_setup_received(0, (uint8_t *)userMemBuf, true); dcd_event_setup_received(0, (uint8_t *)userMemBuf, true);
#endif #endif
} else {
TU_BREAKPOINT();
} }
} else { } else {
// Clear RX CTR interrupt flag // Clear RX CTR interrupt flag
@@ -941,27 +943,26 @@ void dcd_edpt_clear_stall(uint8_t rhport, uint8_t ep_addr)
} }
#ifdef FSDEV_BUS_32BIT #ifdef FSDEV_BUS_32BIT
static bool dcd_write_packet_memory(uint16_t dst, const void *__restrict src, uint16_t wNBytes) static bool dcd_write_packet_memory(uint16_t dst, const void *__restrict src, uint16_t wNBytes) {
{ const uint8_t *src8 = src;
const uint8_t *srcVal = src;
volatile uint32_t *dst32 = (volatile uint32_t *)(USB_PMAADDR + dst); volatile uint32_t *dst32 = (volatile uint32_t *)(USB_PMAADDR + dst);
for (uint32_t n = wNBytes / 4; n > 0; --n) { for (uint32_t n = wNBytes / 4; n > 0; --n) {
*dst32++ = tu_unaligned_read32(srcVal); *dst32++ = tu_unaligned_read32(src8);
srcVal += 4; src8 += 4;
} }
wNBytes = wNBytes & 0x03; uint16_t odd = wNBytes & 0x03;
if (wNBytes) { if (odd) {
uint32_t wrVal = *srcVal; uint32_t wrVal = *src8;
wNBytes--; odd--;
if (wNBytes) { if (odd) {
wrVal |= *++srcVal << 8; wrVal |= *++src8 << 8;
wNBytes--; odd--;
if (wNBytes) { if (odd) {
wrVal |= *++srcVal << 16; wrVal |= *++src8 << 16;
} }
} }
@@ -974,39 +975,26 @@ static bool dcd_write_packet_memory(uint16_t dst, const void *__restrict src, ui
// Packet buffer access can only be 8- or 16-bit. // Packet buffer access can only be 8- or 16-bit.
/** /**
* @brief Copy a buffer from user memory area to packet memory area (PMA). * @brief Copy a buffer from user memory area to packet memory area (PMA).
* This uses byte-access for user memory (so support non-aligned buffers) * This uses un-aligned for user memory and 16-bit access for packet memory.
* and 16-bit access for packet memory.
* @param dst, byte address in PMA; must be 16-bit aligned * @param dst, byte address in PMA; must be 16-bit aligned
* @param src pointer to user memory area. * @param src pointer to user memory area.
* @param wPMABufAddr address into PMA. * @param wPMABufAddr address into PMA.
* @param wNBytes no. of bytes to be copied. * @param wNBytes no. of bytes to be copied.
* @retval None * @retval None
*/ */
static bool dcd_write_packet_memory(uint16_t dst, const void *__restrict src, uint16_t wNBytes) static bool dcd_write_packet_memory(uint16_t dst, const void *__restrict src, uint16_t wNBytes) {
{
uint32_t n = (uint32_t)wNBytes >> 1U; uint32_t n = (uint32_t)wNBytes >> 1U;
uint16_t temp1, temp2; const uint8_t *src8 = src;
const uint8_t *srcVal; volatile uint16_t *pdw16 = &pma[FSDEV_PMA_STRIDE * (dst >> 1)];
// The GCC optimizer will combine access to 32-bit sizes if we let it. Force
// it volatile so that it won't do that.
__IO uint16_t *pdwVal;
srcVal = src;
pdwVal = &pma[FSDEV_PMA_STRIDE * (dst >> 1)];
while (n--) { while (n--) {
temp1 = (uint16_t)*srcVal; *pdw16 = tu_unaligned_read16(src8);
srcVal++; src8 += 2;
temp2 = temp1 | ((uint16_t)(((uint16_t)(*srcVal)) << 8U)); pdw16 += FSDEV_PMA_STRIDE;
*pdwVal = temp2;
pdwVal += FSDEV_PMA_STRIDE;
srcVal++;
} }
if (wNBytes & 0x01) { if (wNBytes & 0x01) {
temp1 = (uint16_t) *srcVal; *pdw16 = (uint16_t) *src8;
*pdwVal = temp1;
} }
return true; return true;
@@ -1091,27 +1079,27 @@ static bool dcd_write_packet_memory_ff(tu_fifo_t *ff, uint16_t dst, uint16_t wNB
#ifdef FSDEV_BUS_32BIT #ifdef FSDEV_BUS_32BIT
static bool dcd_read_packet_memory(void *__restrict dst, uint16_t src, uint16_t wNBytes) static bool dcd_read_packet_memory(void *__restrict dst, uint16_t src, uint16_t wNBytes)
{ {
uint8_t *dstVal = dst; uint8_t *dst8 = dst;
volatile uint32_t *src32 = (volatile uint32_t *)(USB_PMAADDR + src); volatile uint32_t *src32 = (volatile uint32_t *)(USB_PMAADDR + src);
for (uint32_t n = wNBytes / 4; n > 0; --n) { for (uint32_t n = wNBytes / 4; n > 0; --n) {
tu_unaligned_write32(dstVal, *src32++); tu_unaligned_write32(dst8, *src32++);
dstVal += 4; dst8 += 4;
} }
wNBytes = wNBytes & 0x03; uint16_t odd = wNBytes & 0x03;
if (wNBytes) { if (odd) {
uint32_t rdVal = *src32; uint32_t rdVal = *src32;
*dstVal = tu_u32_byte0(rdVal); *dst8 = tu_u32_byte0(rdVal);
wNBytes--; odd--;
if (wNBytes) { if (odd) {
*++dstVal = tu_u32_byte1(rdVal); *++dst8 = tu_u32_byte1(rdVal);
wNBytes--; odd--;
if (wNBytes) { if (odd) {
*++dstVal = tu_u32_byte2(rdVal); *++dst8 = tu_u32_byte2(rdVal);
} }
} }
} }
@@ -1121,33 +1109,25 @@ static bool dcd_read_packet_memory(void *__restrict dst, uint16_t src, uint16_t
#else #else
/** /**
* @brief Copy a buffer from packet memory area (PMA) to user memory area. * @brief Copy a buffer from packet memory area (PMA) to user memory area.
* Uses byte-access of system memory and 16-bit access of packet memory * Uses unaligned for system memory and 16-bit access of packet memory
* @param wNBytes no. of bytes to be copied. * @param wNBytes no. of bytes to be copied.
* @retval None * @retval None
*/ */
static bool dcd_read_packet_memory(void *__restrict dst, uint16_t src, uint16_t wNBytes) static bool dcd_read_packet_memory(void *__restrict dst, uint16_t src, uint16_t wNBytes) {
{
uint32_t n = (uint32_t)wNBytes >> 1U; uint32_t n = (uint32_t)wNBytes >> 1U;
// The GCC optimizer will combine access to 32-bit sizes if we let it. Force volatile const uint16_t *pdw16 = &pma[FSDEV_PMA_STRIDE * (src >> 1)];
// it volatile so that it won't do that. uint8_t *dst8 = (uint8_t *)dst;
__IO const uint16_t *pdwVal;
uint32_t temp;
pdwVal = &pma[FSDEV_PMA_STRIDE * (src >> 1)];
uint8_t *dstVal = (uint8_t *)dst;
while (n--) { while (n--) {
temp = *pdwVal; tu_unaligned_write16(dst8, *pdw16);
pdwVal += FSDEV_PMA_STRIDE; dst8 += 2;
*dstVal++ = ((temp >> 0) & 0xFF); pdw16 += FSDEV_PMA_STRIDE;
*dstVal++ = ((temp >> 8) & 0xFF);
} }
if (wNBytes & 0x01) { if (wNBytes & 0x01) {
temp = *pdwVal; *dst8++ = tu_u16_low(*pdw16);
pdwVal += FSDEV_PMA_STRIDE;
*dstVal++ = ((temp >> 0) & 0xFF);
} }
return true; return true;
} }
#endif #endif

13
src/portable/st/stm32_fsdev/fsdev_common.h
View File

@@ -35,14 +35,19 @@
#include "stdint.h" #include "stdint.h"
// FSDEV_PMA_SIZE is PMA buffer size in bytes. // FSDEV_PMA_SIZE is PMA buffer size in bytes.
// On 512-byte devices, access with a stride of two words (use every other 16-bit address) // - 512-byte devices, access with a stride of two words (use every other 16-bit address)
// On 1024-byte devices, access with a stride of one word (use every 16-bit address) // - 1024-byte devices, access with a stride of one word (use every 16-bit address)
// - 2048-byte devices, access with 32-bit address
// For purposes of accessing the packet // For purposes of accessing the packet
#if ((FSDEV_PMA_SIZE) == 512u) #if FSDEV_PMA_SIZE == 512
#define FSDEV_PMA_STRIDE (2u) #define FSDEV_PMA_STRIDE (2u)
#elif ((FSDEV_PMA_SIZE) == 1024u) #elif FSDEV_PMA_SIZE == 1024
#define FSDEV_PMA_STRIDE (1u) #define FSDEV_PMA_STRIDE (1u)
#elif FSDEV_PMA_SIZE == 2048
#ifndef FSDEV_BUS_32BIT
#warning "FSDEV_PMA_SIZE is 2048, but FSDEV_BUS_32BIT is not defined"
#endif
#endif #endif
// The fsdev_bus_t type can be used for both register and PMA access necessities // The fsdev_bus_t type can be used for both register and PMA access necessities