initial support of CH34x CDC device
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								src/class/cdc/serial/ch34x.h
									
									
									
									
									
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								src/class/cdc/serial/ch34x.h
									
									
									
									
									
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/*
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 * The MIT License (MIT)
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 *
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 * Copyright (c) 2023 Heiko Kuester (tinyusb.org)
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 *
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 * Permission is hereby granted, free of charge, to any person obtaining a copy
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 * of this software and associated documentation files (the "Software"), to deal
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 * in the Software without restriction, including without limitation the rights
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 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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 * copies of the Software, and to permit persons to whom the Software is
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 * furnished to do so, subject to the following conditions:
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 *
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 * The above copyright notice and this permission notice shall be included in
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 * all copies or substantial portions of the Software.
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 *
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 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
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 * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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 * THE SOFTWARE.
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 *
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 * This file is part of the TinyUSB stack.
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 */
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#ifndef _CH34X_H_
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#define _CH34X_H_
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#include <stdint.h>
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#define BIT(nr) ( (uint32_t)1 << (nr) )
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#define CH34X_BUFFER_SIZE 2
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// The following defines have been taken over from Linux driver /drivers/usb/serial/ch341.c
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#define DEFAULT_BAUD_RATE 9600
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/* flags for IO-Bits */
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#define CH341_BIT_RTS (1 << 6)
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#define CH341_BIT_DTR (1 << 5)
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/******************************/
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/* interrupt pipe definitions */
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/******************************/
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/* always 4 interrupt bytes */
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/* first irq byte normally 0x08 */
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/* second irq byte base 0x7d + below */
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/* third irq byte base 0x94 + below */
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/* fourth irq byte normally 0xee */
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/* second interrupt byte */
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#define CH341_MULT_STAT 0x04 /* multiple status since last interrupt event */
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/* status returned in third interrupt answer byte, inverted in data
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   from irq */
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#define CH341_BIT_CTS 0x01
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#define CH341_BIT_DSR 0x02
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#define CH341_BIT_RI  0x04
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#define CH341_BIT_DCD 0x08
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#define CH341_BITS_MODEM_STAT 0x0f /* all bits */
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/* Break support - the information used to implement this was gleaned from
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 * the Net/FreeBSD uchcom.c driver by Takanori Watanabe.  Domo arigato.
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 */
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// USB requests
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#define CH341_REQ_READ_VERSION 0x5F // dec 95
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#define CH341_REQ_WRITE_REG    0x9A
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#define CH341_REQ_READ_REG     0x95
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#define CH341_REQ_SERIAL_INIT  0xA1
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#define CH341_REQ_MODEM_CTRL   0xA4
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// CH34x registers
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#define CH341_REG_BREAK        0x05
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#define CH341_REG_PRESCALER    0x12
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#define CH341_REG_DIVISOR      0x13
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#define CH341_REG_LCR          0x18
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#define CH341_REG_LCR2         0x25
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#define CH341_NBREAK_BITS      0x01
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// line control bits
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#define CH341_LCR_ENABLE_RX    0x80
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#define CH341_LCR_ENABLE_TX    0x40
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#define CH341_LCR_MARK_SPACE   0x20
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#define CH341_LCR_PAR_EVEN     0x10
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#define CH341_LCR_ENABLE_PAR   0x08
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#define CH341_LCR_STOP_BITS_2  0x04
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#define CH341_LCR_CS8          0x03
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#define CH341_LCR_CS7          0x02
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#define CH341_LCR_CS6          0x01
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#define CH341_LCR_CS5          0x00
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#define CH341_QUIRK_LIMITED_PRESCALER BIT(0)
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#define CH341_QUIRK_SIMULATE_BREAK  BIT(1)
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#define CH341_CLKRATE   48000000
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#define CH341_CLK_DIV(ps, fact) (1 << (12 - 3 * (ps) - (fact)))
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#define CH341_MIN_RATE(ps)  (CH341_CLKRATE / (CH341_CLK_DIV((ps), 1) * 512))
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/* Supported range is 46 to 3000000 bps. */
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#define CH341_MIN_BPS DIV_ROUND_UP(CH341_CLKRATE, CH341_CLK_DIV(0, 0) * 256)
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#define CH341_MAX_BPS (CH341_CLKRATE / (CH341_CLK_DIV(3, 0) * 2))
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#define DIV_ROUND_UP __KERNEL_DIV_ROUND_UP
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#define __KERNEL_DIV_ROUND_UP(n, d) (((n) + (d) - 1) / (d))
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// error codes
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#define EINVAL    22  /* Invalid argument */
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#endif /* _CH34X_H_ */
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