clean up
This commit is contained in:
		| @@ -50,6 +50,8 @@ void board_init(void) | ||||
|   // Leds Init | ||||
|   GPIO_SetDir(CFG_LED_PORT, BIT_(CFG_LED_PIN), 1); | ||||
|  | ||||
|   //------------- USB -------------// | ||||
|   PINSEL_ConfigPin( &(PINSEL_CFG_Type) { .Portnum = 2, .Pinnum = 9, .Funcnum = 1 } ); | ||||
|  | ||||
|   // lpcxpresso base board USB device : if base board J14 is inserted at 1-2, 1k5 resistor is controlled by P0_21 (active low) | ||||
|   GPIO_SetDir(0, BIT_(21), 1); | ||||
|   | ||||
| @@ -90,7 +90,6 @@ | ||||
| 			<storageModule moduleId="org.eclipse.cdt.internal.ui.text.commentOwnerProjectMappings"/> | ||||
| 			<storageModule moduleId="org.eclipse.cdt.core.language.mapping"/> | ||||
| 			<storageModule moduleId="org.eclipse.cdt.make.core.buildtargets"/> | ||||
| 			<storageModule moduleId="scannerConfiguration"/> | ||||
| 		</cconfiguration> | ||||
| 		<cconfiguration id="com.crt.advproject.config.exe.debug.856400198.534940316"> | ||||
| 			<storageModule buildSystemId="org.eclipse.cdt.managedbuilder.core.configurationDataProvider" id="com.crt.advproject.config.exe.debug.856400198.534940316" moduleId="org.eclipse.cdt.core.settings" name="Board rf1ghznode"> | ||||
| @@ -179,7 +178,6 @@ | ||||
| 			<storageModule moduleId="org.eclipse.cdt.internal.ui.text.commentOwnerProjectMappings"/> | ||||
| 			<storageModule moduleId="org.eclipse.cdt.core.language.mapping"/> | ||||
| 			<storageModule moduleId="org.eclipse.cdt.make.core.buildtargets"/> | ||||
| 			<storageModule moduleId="scannerConfiguration"/> | ||||
| 		</cconfiguration> | ||||
| 		<cconfiguration id="com.crt.advproject.config.exe.debug.856400198.1273868481"> | ||||
| 			<storageModule buildSystemId="org.eclipse.cdt.managedbuilder.core.configurationDataProvider" id="com.crt.advproject.config.exe.debug.856400198.1273868481" moduleId="org.eclipse.cdt.core.settings" name="Board EA4357"> | ||||
| @@ -273,7 +271,6 @@ | ||||
| 			<storageModule moduleId="org.eclipse.cdt.internal.ui.text.commentOwnerProjectMappings"/> | ||||
| 			<storageModule moduleId="org.eclipse.cdt.core.language.mapping"/> | ||||
| 			<storageModule moduleId="org.eclipse.cdt.make.core.buildtargets"/> | ||||
| 			<storageModule moduleId="scannerConfiguration"/> | ||||
| 		</cconfiguration> | ||||
| 		<cconfiguration id="com.crt.advproject.config.exe.debug.856400198.2062223128"> | ||||
| 			<storageModule buildSystemId="org.eclipse.cdt.managedbuilder.core.configurationDataProvider" id="com.crt.advproject.config.exe.debug.856400198.2062223128" moduleId="org.eclipse.cdt.core.settings" name="Board LPCXpresso1769"> | ||||
| @@ -362,7 +359,6 @@ | ||||
| 			<storageModule moduleId="org.eclipse.cdt.internal.ui.text.commentOwnerProjectMappings"/> | ||||
| 			<storageModule moduleId="org.eclipse.cdt.core.language.mapping"/> | ||||
| 			<storageModule moduleId="org.eclipse.cdt.make.core.buildtargets"/> | ||||
| 			<storageModule moduleId="scannerConfiguration"/> | ||||
| 		</cconfiguration> | ||||
| 	</storageModule> | ||||
| 	<storageModule moduleId="cdtBuildSystem" version="4.0.0"> | ||||
| @@ -371,8 +367,11 @@ | ||||
| 	<storageModule moduleId="com.crt.config"> | ||||
| 		<projectStorage><?xml version="1.0" encoding="UTF-8"?>
 | ||||
| <TargetConfig>
 | ||||
| <Properties property_0="" property_3="NXP" property_4="LPC1769" property_count="5" version="1"/>
 | ||||
| <infoList vendor="NXP"><info chip="LPC1769" match_id="0x26113F37" name="LPC1769" package="lpc17_lqfp100.xml"><chip><name>LPC1769</name>
 | ||||
| <Properties property_0="" property_2="LPC175x_6x_512.cfx" property_3="NXP" property_4="LPC1769" property_count="5" version="60000"/>
 | ||||
| <infoList vendor="NXP">
 | ||||
| <info chip="LPC1769" flash_driver="LPC175x_6x_512.cfx" match_id="0x26113F37" name="LPC1769" package="lpc17_lqfp100.xml" stub="crt_emu_cm3_nxp">
 | ||||
| <chip>
 | ||||
| <name>LPC1769</name>
 | ||||
| <family>LPC17xx</family>
 | ||||
| <vendor>NXP (formerly Philips)</vendor>
 | ||||
| <reset board="None" core="Real" sys="Real"/>
 | ||||
| @@ -380,61 +379,62 @@ | ||||
| <memory can_program="true" id="Flash" is_ro="true" type="Flash"/>
 | ||||
| <memory id="RAM" type="RAM"/>
 | ||||
| <memory id="Periph" is_volatile="true" type="Peripheral"/>
 | ||||
| <memoryInstance derived_from="Flash" id="MFlash512" location="0x0" size="0x80000"/>
 | ||||
| <memoryInstance derived_from="Flash" id="MFlash512" location="0x00000000" size="0x80000"/>
 | ||||
| <memoryInstance derived_from="RAM" id="RamLoc32" location="0x10000000" size="0x8000"/>
 | ||||
| <memoryInstance derived_from="RAM" id="RamAHB32" location="0x2007c000" size="0x8000"/>
 | ||||
| <prog_flash blocksz="0x1000" location="0" maxprgbuff="0x1000" progwithcode="TRUE" size="0x10000"/>
 | ||||
| <prog_flash blocksz="0x8000" location="0x10000" maxprgbuff="0x1000" progwithcode="TRUE" size="0x70000"/>
 | ||||
| <peripheralInstance derived_from="LPC17_NVIC" id="NVIC" location="0xE000E000"/>
 | ||||
| <peripheralInstance derived_from="TIMER" enable="SYSCTL.PCONP.PCTIM0&amp;0x1" id="TIMER0" location="0x40004000"/>
 | ||||
| <peripheralInstance derived_from="TIMER" enable="SYSCTL.PCONP.PCTIM1&amp;0x1" id="TIMER1" location="0x40008000"/>
 | ||||
| <peripheralInstance derived_from="TIMER" enable="SYSCTL.PCONP.PCTIM2&amp;0x1" id="TIMER2" location="0x40090000"/>
 | ||||
| <peripheralInstance derived_from="TIMER" enable="SYSCTL.PCONP.PCTIM3&amp;0x1" id="TIMER3" location="0x40094000"/>
 | ||||
| <peripheralInstance derived_from="LPC17_RIT" enable="SYSCTL.PCONP.PCRIT&amp;0x1" id="RIT" location="0x400B0000"/>
 | ||||
| <peripheralInstance derived_from="FGPIO" enable="SYSCTL.PCONP.PCGPIO&amp;0x1" id="GPIO0" location="0x2009C000"/>
 | ||||
| <peripheralInstance derived_from="FGPIO" enable="SYSCTL.PCONP.PCGPIO&amp;0x1" id="GPIO1" location="0x2009C020"/>
 | ||||
| <peripheralInstance derived_from="FGPIO" enable="SYSCTL.PCONP.PCGPIO&amp;0x1" id="GPIO2" location="0x2009C040"/>
 | ||||
| <peripheralInstance derived_from="FGPIO" enable="SYSCTL.PCONP.PCGPIO&amp;0x1" id="GPIO3" location="0x2009C060"/>
 | ||||
| <peripheralInstance derived_from="FGPIO" enable="SYSCTL.PCONP.PCGPIO&amp;0x1" id="GPIO4" location="0x2009C080"/>
 | ||||
| <peripheralInstance derived_from="LPC17_I2S" enable="SYSCTL.PCONP&amp;0x08000000" id="I2S" location="0x400A8000"/>
 | ||||
| <peripheralInstance derived_from="LPC17_SYSCTL" id="SYSCTL" location="0x400FC000"/>
 | ||||
| <peripheralInstance derived_from="LPC17_DAC" enable="PCB.PINSEL1.P0_26&amp;0x2=2" id="DAC" location="0x4008C000"/>
 | ||||
| <peripheralInstance derived_from="LPC17xx_UART" enable="SYSCTL.PCONP.PCUART0&amp;0x1" id="UART0" location="0x4000C000"/>
 | ||||
| <peripheralInstance derived_from="LPC17xx_UART_MODEM" enable="SYSCTL.PCONP.PCUART1&amp;0x1" id="UART1" location="0x40010000"/>
 | ||||
| <peripheralInstance derived_from="LPC17xx_UART" enable="SYSCTL.PCONP.PCUART2&amp;0x1" id="UART2" location="0x40098000"/>
 | ||||
| <peripheralInstance derived_from="LPC17xx_UART" enable="SYSCTL.PCONP.PCUART3&amp;0x1" id="UART3" location="0x4009C000"/>
 | ||||
| <peripheralInstance derived_from="SPI" enable="SYSCTL.PCONP.PCSPI&amp;0x1" id="SPI" location="0x40020000"/>
 | ||||
| <peripheralInstance derived_from="LPC17_SSP" enable="SYSCTL.PCONP.PCSSP0&amp;0x1" id="SSP0" location="0x40088000"/>
 | ||||
| <peripheralInstance derived_from="LPC17_SSP" enable="SYSCTL.PCONP.PCSSP1&amp;0x1" id="SSP1" location="0x40030000"/>
 | ||||
| <peripheralInstance derived_from="LPC17_ADC" enable="SYSCTL.PCONP.PCAD&amp;0x1" id="ADC" location="0x40034000"/>
 | ||||
| <peripheralInstance derived_from="LPC17_USBINTST" enable="USBCLKCTL.USBClkCtrl&amp;0x12" id="USBINTSTAT" location="0x400fc1c0"/>
 | ||||
| <peripheralInstance derived_from="LPC17_USB_CLK_CTL" id="USBCLKCTL" location="0x5000cff4"/>
 | ||||
| <peripheralInstance derived_from="LPC17_USBDEV" enable="USBCLKCTL.USBClkSt&amp;0x12=0x12" id="USBDEV" location="0x5000C200"/>
 | ||||
| <peripheralInstance derived_from="LPC17_PWM" enable="SYSCTL.PCONP.PWM1&amp;0x1" id="PWM" location="0x40018000"/>
 | ||||
| <peripheralInstance derived_from="LPC17_I2C" enable="SYSCTL.PCONP.PCI2C0&amp;0x1" id="I2C0" location="0x4001C000"/>
 | ||||
| <peripheralInstance derived_from="LPC17_I2C" enable="SYSCTL.PCONP.PCI2C1&amp;0x1" id="I2C1" location="0x4005C000"/>
 | ||||
| <peripheralInstance derived_from="LPC17_I2C" enable="SYSCTL.PCONP.PCI2C2&amp;0x1" id="I2C2" location="0x400A0000"/>
 | ||||
| <peripheralInstance derived_from="LPC17_DMA" enable="SYSCTL.PCONP.PCGPDMA&amp;0x1" id="DMA" location="0x50004000"/>
 | ||||
| <peripheralInstance derived_from="LPC17_ENET" enable="SYSCTL.PCONP.PCENET&amp;0x1" id="ENET" location="0x50000000"/>
 | ||||
| <peripheralInstance derived_from="CM3_DCR" id="DCR" location="0xE000EDF0"/>
 | ||||
| <peripheralInstance derived_from="LPC17_PCB" id="PCB" location="0x4002c000"/>
 | ||||
| <peripheralInstance derived_from="LPC17_QEI" enable="SYSCTL.PCONP.PCQEI&amp;0x1" id="QEI" location="0x400bc000"/>
 | ||||
| <peripheralInstance derived_from="LPC17_USBHOST" enable="USBCLKCTL.USBClkSt&amp;0x11=0x11" id="USBHOST" location="0x5000C000"/>
 | ||||
| <peripheralInstance derived_from="LPC17_USBOTG" enable="USBCLKCTL.USBClkSt&amp;0x1c=0x1c" id="USBOTG" location="0x5000C000"/>
 | ||||
| <peripheralInstance derived_from="LPC17_RTC" enable="SYSCTL.PCONP.PCRTC&amp;0x1" id="RTC" location="0x40024000"/>
 | ||||
| <peripheralInstance derived_from="MPU" id="MPU" location="0xE000ED90"/>
 | ||||
| <peripheralInstance derived_from="LPC1x_WDT" id="WDT" location="0x40000000"/>
 | ||||
| <peripheralInstance derived_from="LPC17_FLASHCFG" id="FLASHACCEL" location="0x400FC000"/>
 | ||||
| <peripheralInstance derived_from="GPIO_INT" id="GPIOINTMAP" location="0x40028080"/>
 | ||||
| <peripheralInstance derived_from="LPC17_CANAFR" enable="SYSCTL.PCONP.PCCAN1&amp;0x1|SYSCTL.PCONP.PCCAN2&amp;0x1" id="CANAFR" location="0x4003C000"/>
 | ||||
| <peripheralInstance derived_from="LPC17_CANCEN" enable="SYSCTL.PCONP.PCCAN1&amp;0x1|SYSCTL.PCONP.PCCAN2&amp;0x1" id="CANCEN" location="0x40040000"/>
 | ||||
| <peripheralInstance derived_from="LPC17_CANWAKESLEEP" id="CANWAKESLEEP" location="0x400FC110"/>
 | ||||
| <peripheralInstance derived_from="LPC17_CANCON" enable="SYSCTL.PCONP.PCCAN1&amp;0x1" id="CANCON1" location="0x40044000"/>
 | ||||
| <peripheralInstance derived_from="LPC17_CANCON" enable="SYSCTL.PCONP.PCCAN2&amp;0x1" id="CANCON2" location="0x40048000"/>
 | ||||
| <peripheralInstance derived_from="LPC17_MCPWM" enable="SYSCTL.PCONP.PCMCPWM&amp;0x1" id="MCPWM" location="0x400B8000"/>
 | ||||
| <peripheralInstance derived_from="LPC17_FMC" id="FMC" location="0x40084000"/>
 | ||||
| <peripheralInstance derived_from="LPC17_NVIC" determined="infoFile" id="NVIC" location="0xE000E000"/>
 | ||||
| <peripheralInstance derived_from="TIMER" determined="infoFile" enable="SYSCTL.PCONP.PCTIM0&amp;0x1" id="TIMER0" location="0x40004000"/>
 | ||||
| <peripheralInstance derived_from="TIMER" determined="infoFile" enable="SYSCTL.PCONP.PCTIM1&amp;0x1" id="TIMER1" location="0x40008000"/>
 | ||||
| <peripheralInstance derived_from="TIMER" determined="infoFile" enable="SYSCTL.PCONP.PCTIM2&amp;0x1" id="TIMER2" location="0x40090000"/>
 | ||||
| <peripheralInstance derived_from="TIMER" determined="infoFile" enable="SYSCTL.PCONP.PCTIM3&amp;0x1" id="TIMER3" location="0x40094000"/>
 | ||||
| <peripheralInstance derived_from="LPC17_RIT" determined="infoFile" enable="SYSCTL.PCONP.PCRIT&amp;0x1" id="RIT" location="0x400B0000"/>
 | ||||
| <peripheralInstance derived_from="FGPIO" determined="infoFile" enable="SYSCTL.PCONP.PCGPIO&amp;0x1" id="GPIO0" location="0x2009C000"/>
 | ||||
| <peripheralInstance derived_from="FGPIO" determined="infoFile" enable="SYSCTL.PCONP.PCGPIO&amp;0x1" id="GPIO1" location="0x2009C020"/>
 | ||||
| <peripheralInstance derived_from="FGPIO" determined="infoFile" enable="SYSCTL.PCONP.PCGPIO&amp;0x1" id="GPIO2" location="0x2009C040"/>
 | ||||
| <peripheralInstance derived_from="FGPIO" determined="infoFile" enable="SYSCTL.PCONP.PCGPIO&amp;0x1" id="GPIO3" location="0x2009C060"/>
 | ||||
| <peripheralInstance derived_from="FGPIO" determined="infoFile" enable="SYSCTL.PCONP.PCGPIO&amp;0x1" id="GPIO4" location="0x2009C080"/>
 | ||||
| <peripheralInstance derived_from="LPC17_I2S" determined="infoFile" enable="SYSCTL.PCONP&amp;0x08000000" id="I2S" location="0x400A8000"/>
 | ||||
| <peripheralInstance derived_from="LPC17_SYSCTL" determined="infoFile" id="SYSCTL" location="0x400FC000"/>
 | ||||
| <peripheralInstance derived_from="LPC17_DAC" determined="infoFile" enable="PCB.PINSEL1.P0_26&amp;0x2=2" id="DAC" location="0x4008C000"/>
 | ||||
| <peripheralInstance derived_from="LPC17xx_UART" determined="infoFile" enable="SYSCTL.PCONP.PCUART0&amp;0x1" id="UART0" location="0x4000C000"/>
 | ||||
| <peripheralInstance derived_from="LPC17xx_UART_MODEM" determined="infoFile" enable="SYSCTL.PCONP.PCUART1&amp;0x1" id="UART1" location="0x40010000"/>
 | ||||
| <peripheralInstance derived_from="LPC17xx_UART" determined="infoFile" enable="SYSCTL.PCONP.PCUART2&amp;0x1" id="UART2" location="0x40098000"/>
 | ||||
| <peripheralInstance derived_from="LPC17xx_UART" determined="infoFile" enable="SYSCTL.PCONP.PCUART3&amp;0x1" id="UART3" location="0x4009C000"/>
 | ||||
| <peripheralInstance derived_from="SPI" determined="infoFile" enable="SYSCTL.PCONP.PCSPI&amp;0x1" id="SPI" location="0x40020000"/>
 | ||||
| <peripheralInstance derived_from="LPC17_SSP" determined="infoFile" enable="SYSCTL.PCONP.PCSSP0&amp;0x1" id="SSP0" location="0x40088000"/>
 | ||||
| <peripheralInstance derived_from="LPC17_SSP" determined="infoFile" enable="SYSCTL.PCONP.PCSSP1&amp;0x1" id="SSP1" location="0x40030000"/>
 | ||||
| <peripheralInstance derived_from="LPC17_ADC" determined="infoFile" enable="SYSCTL.PCONP.PCAD&amp;0x1" id="ADC" location="0x40034000"/>
 | ||||
| <peripheralInstance derived_from="LPC17_USBINTST" determined="infoFile" enable="USBCLKCTL.USBClkCtrl&amp;0x12" id="USBINTSTAT" location="0x400fc1c0"/>
 | ||||
| <peripheralInstance derived_from="LPC17_USB_CLK_CTL" determined="infoFile" id="USBCLKCTL" location="0x5000cff4"/>
 | ||||
| <peripheralInstance derived_from="LPC17_USBDEV" determined="infoFile" enable="USBCLKCTL.USBClkSt&amp;0x12=0x12" id="USBDEV" location="0x5000C200"/>
 | ||||
| <peripheralInstance derived_from="LPC17_PWM" determined="infoFile" enable="SYSCTL.PCONP.PWM1&amp;0x1" id="PWM" location="0x40018000"/>
 | ||||
| <peripheralInstance derived_from="LPC17_I2C" determined="infoFile" enable="SYSCTL.PCONP.PCI2C0&amp;0x1" id="I2C0" location="0x4001C000"/>
 | ||||
| <peripheralInstance derived_from="LPC17_I2C" determined="infoFile" enable="SYSCTL.PCONP.PCI2C1&amp;0x1" id="I2C1" location="0x4005C000"/>
 | ||||
| <peripheralInstance derived_from="LPC17_I2C" determined="infoFile" enable="SYSCTL.PCONP.PCI2C2&amp;0x1" id="I2C2" location="0x400A0000"/>
 | ||||
| <peripheralInstance derived_from="LPC17_DMA" determined="infoFile" enable="SYSCTL.PCONP.PCGPDMA&amp;0x1" id="DMA" location="0x50004000"/>
 | ||||
| <peripheralInstance derived_from="LPC17_ENET" determined="infoFile" enable="SYSCTL.PCONP.PCENET&amp;0x1" id="ENET" location="0x50000000"/>
 | ||||
| <peripheralInstance derived_from="CM3_DCR" determined="infoFile" id="DCR" location="0xE000EDF0"/>
 | ||||
| <peripheralInstance derived_from="LPC17_PCB" determined="infoFile" id="PCB" location="0x4002c000"/>
 | ||||
| <peripheralInstance derived_from="LPC17_QEI" determined="infoFile" enable="SYSCTL.PCONP.PCQEI&amp;0x1" id="QEI" location="0x400bc000"/>
 | ||||
| <peripheralInstance derived_from="LPC17_USBHOST" determined="infoFile" enable="USBCLKCTL.USBClkSt&amp;0x11=0x11" id="USBHOST" location="0x5000C000"/>
 | ||||
| <peripheralInstance derived_from="LPC17_USBOTG" determined="infoFile" enable="USBCLKCTL.USBClkSt&amp;0x1c=0x1c" id="USBOTG" location="0x5000C000"/>
 | ||||
| <peripheralInstance derived_from="LPC17_RTC" determined="infoFile" enable="SYSCTL.PCONP.PCRTC&amp;0x1" id="RTC" location="0x40024000"/>
 | ||||
| <peripheralInstance derived_from="MPU" determined="infoFile" id="MPU" location="0xE000ED90"/>
 | ||||
| <peripheralInstance derived_from="LPC1x_WDT" determined="infoFile" id="WDT" location="0x40000000"/>
 | ||||
| <peripheralInstance derived_from="LPC17_FLASHCFG" determined="infoFile" id="FLASHACCEL" location="0x400FC000"/>
 | ||||
| <peripheralInstance derived_from="GPIO_INT" determined="infoFile" id="GPIOINTMAP" location="0x40028080"/>
 | ||||
| <peripheralInstance derived_from="LPC17_CANAFR" determined="infoFile" enable="SYSCTL.PCONP.PCCAN1&amp;0x1|SYSCTL.PCONP.PCCAN2&amp;0x1" id="CANAFR" location="0x4003C000"/>
 | ||||
| <peripheralInstance derived_from="LPC17_CANCEN" determined="infoFile" enable="SYSCTL.PCONP.PCCAN1&amp;0x1|SYSCTL.PCONP.PCCAN2&amp;0x1" id="CANCEN" location="0x40040000"/>
 | ||||
| <peripheralInstance derived_from="LPC17_CANWAKESLEEP" determined="infoFile" id="CANWAKESLEEP" location="0x400FC110"/>
 | ||||
| <peripheralInstance derived_from="LPC17_CANCON" determined="infoFile" enable="SYSCTL.PCONP.PCCAN1&amp;0x1" id="CANCON1" location="0x40044000"/>
 | ||||
| <peripheralInstance derived_from="LPC17_CANCON" determined="infoFile" enable="SYSCTL.PCONP.PCCAN2&amp;0x1" id="CANCON2" location="0x40048000"/>
 | ||||
| <peripheralInstance derived_from="LPC17_MCPWM" determined="infoFile" enable="SYSCTL.PCONP.PCMCPWM&amp;0x1" id="MCPWM" location="0x400B8000"/>
 | ||||
| <peripheralInstance derived_from="LPC17_FMC" determined="infoFile" id="FMC" location="0x40084000"/>
 | ||||
| </chip>
 | ||||
| <processor><name gcc_name="cortex-m3">Cortex-M3</name>
 | ||||
| <processor>
 | ||||
| <name gcc_name="cortex-m3">Cortex-M3</name>
 | ||||
| <family>Cortex-M</family>
 | ||||
| </processor>
 | ||||
| <link href="nxp_lpcxxxx_peripheral.xme" show="embed" type="simple"/>
 | ||||
|   | ||||
| @@ -123,7 +123,7 @@ OSAL_TASK_FUNCTION( cdcd_serial_app_task ) (void* p_task_para) | ||||
|  | ||||
|   osal_semaphore_wait(sem_hdl, OSAL_TIMEOUT_WAIT_FOREVER, &error); | ||||
|  | ||||
|   if ( tusbd_cdc_is_configured(0) ) | ||||
|   if ( tusbd_is_configured(0) ) | ||||
|   { | ||||
|     // echo back data in the fifo | ||||
|     if ( !tusbd_cdc_is_busy(0, CDC_PIPE_DATA_IN) ) | ||||
|   | ||||
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