@@ -26,7 +26,7 @@
|
||||
|
||||
#include "tusb_option.h"
|
||||
|
||||
#if CFG_TUD_ENABLED && defined(MCU_ATTR_CONTROLLER_CHIPIDEA_HS)
|
||||
#if CFG_TUD_ENABLED && defined(TUP_USBIP_CHIPIDEA_HS)
|
||||
|
||||
//--------------------------------------------------------------------+
|
||||
// INCLUDE
|
||||
@@ -151,8 +151,8 @@ typedef struct {
|
||||
// Must be at 2K alignment
|
||||
// Each endpoint with direction (IN/OUT) occupies a queue head
|
||||
// for portability, TinyUSB only queue 1 TD for each Qhd
|
||||
dcd_qhd_t qhd[DCD_ATTR_ENDPOINT_MAX][2] TU_ATTR_ALIGNED(64);
|
||||
dcd_qtd_t qtd[DCD_ATTR_ENDPOINT_MAX][2] TU_ATTR_ALIGNED(32);
|
||||
dcd_qhd_t qhd[TUP_DCD_ENDPOINT_MAX][2] TU_ATTR_ALIGNED(64);
|
||||
dcd_qtd_t qtd[TUP_DCD_ENDPOINT_MAX][2] TU_ATTR_ALIGNED(32);
|
||||
}dcd_data_t;
|
||||
|
||||
CFG_TUSB_MEM_SECTION TU_ATTR_ALIGNED(2048)
|
||||
@@ -619,7 +619,7 @@ void dcd_int_handler(uint8_t rhport)
|
||||
|
||||
if ( edpt_complete )
|
||||
{
|
||||
for(uint8_t epnum = 0; epnum < DCD_ATTR_ENDPOINT_MAX; epnum++)
|
||||
for(uint8_t epnum = 0; epnum < TUP_DCD_ENDPOINT_MAX; epnum++)
|
||||
{
|
||||
if ( tu_bit_test(edpt_complete, epnum) ) process_edpt_complete_isr(rhport, epnum, TUSB_DIR_OUT);
|
||||
if ( tu_bit_test(edpt_complete, epnum+16) ) process_edpt_complete_isr(rhport, epnum, TUSB_DIR_IN);
|
||||
|
||||
@@ -26,7 +26,7 @@
|
||||
|
||||
#include "tusb_option.h"
|
||||
|
||||
#if CFG_TUH_ENABLED && defined(HCD_ATTR_EHCI)
|
||||
#if CFG_TUH_ENABLED && defined(TUP_USBIP_EHCI)
|
||||
|
||||
//--------------------------------------------------------------------+
|
||||
// INCLUDE
|
||||
@@ -45,7 +45,7 @@
|
||||
#define EHCI_DBG 2
|
||||
|
||||
// Framelist size as small as possible to save SRAM
|
||||
#ifdef MCU_ATTR_CONTROLLER_CHIPIDEA_HS
|
||||
#ifdef TUP_USBIP_CHIPIDEA_HS
|
||||
// NXP Transdimension: 8 elements
|
||||
#define FRAMELIST_SIZE_BIT_VALUE 7u
|
||||
#define FRAMELIST_SIZE_USBCMD_VALUE (((FRAMELIST_SIZE_BIT_VALUE & 3) << EHCI_USBCMD_POS_FRAMELIST_SIZE) | \
|
||||
|
||||
@@ -170,13 +170,13 @@ static inline void print_block_list(free_block_t const *blk, unsigned num)
|
||||
|
||||
static unsigned find_free_memory(uint_fast16_t size_in_log2_minus3)
|
||||
{
|
||||
free_block_t free_blocks[2 * (DCD_ATTR_ENDPOINT_MAX - 1)];
|
||||
free_block_t free_blocks[2 * (TUP_DCD_ENDPOINT_MAX - 1)];
|
||||
unsigned num_blocks = 1;
|
||||
|
||||
/* Initialize free memory block list */
|
||||
free_blocks[0].beg = 64 / 8;
|
||||
free_blocks[0].end = (4 << 10) / 8; /* 4KiB / 8 bytes */
|
||||
for (int i = 1; i < DCD_ATTR_ENDPOINT_MAX; ++i) {
|
||||
for (int i = 1; i < TUP_DCD_ENDPOINT_MAX; ++i) {
|
||||
uint_fast16_t addr;
|
||||
int num;
|
||||
USB0->EPIDX = i;
|
||||
@@ -575,7 +575,7 @@ static void process_bus_reset(uint8_t rhport)
|
||||
USB0->RXIE = 0;
|
||||
|
||||
/* Clear FIFO settings */
|
||||
for (unsigned i = 1; i < DCD_ATTR_ENDPOINT_MAX; ++i) {
|
||||
for (unsigned i = 1; i < TUP_DCD_ENDPOINT_MAX; ++i) {
|
||||
USB0->EPIDX = i;
|
||||
USB0->TXFIFOSZ = 0;
|
||||
USB0->TXFIFOADD = 0;
|
||||
@@ -663,7 +663,7 @@ bool dcd_edpt_open(uint8_t rhport, tusb_desc_endpoint_t const * ep_desc)
|
||||
const unsigned xfer = ep_desc->bmAttributes.xfer;
|
||||
const unsigned mps = tu_edpt_packet_size(ep_desc);
|
||||
|
||||
TU_ASSERT(epn < DCD_ATTR_ENDPOINT_MAX);
|
||||
TU_ASSERT(epn < TUP_DCD_ENDPOINT_MAX);
|
||||
|
||||
pipe_state_t *pipe = &_dcd.pipe[dir_in][epn - 1];
|
||||
pipe->buf = NULL;
|
||||
@@ -715,7 +715,7 @@ void dcd_edpt_close_all(uint8_t rhport)
|
||||
NVIC_DisableIRQ(USB0_IRQn);
|
||||
USB0->TXIE = 1; /* Enable only EP0 */
|
||||
USB0->RXIE = 0;
|
||||
for (unsigned i = 1; i < DCD_ATTR_ENDPOINT_MAX; ++i) {
|
||||
for (unsigned i = 1; i < TUP_DCD_ENDPOINT_MAX; ++i) {
|
||||
regs->TXMAXP = 0;
|
||||
regs->TXCSRH = 0;
|
||||
if (regs->TXCSRL & USB_TXCSRL1_TXRDY)
|
||||
|
||||
@@ -179,8 +179,8 @@ typedef struct {
|
||||
// Must be at 2K alignment
|
||||
// Each endpoint with direction (IN/OUT) occupies a queue head
|
||||
// for portability, TinyUSB only queue 1 TD for each Qhd
|
||||
dcd_qhd_t qhd[DCD_ATTR_ENDPOINT_MAX][2] TU_ATTR_ALIGNED(64);
|
||||
dcd_qtd_t qtd[DCD_ATTR_ENDPOINT_MAX][2] TU_ATTR_ALIGNED(32);
|
||||
dcd_qhd_t qhd[TUP_DCD_ENDPOINT_MAX][2] TU_ATTR_ALIGNED(64);
|
||||
dcd_qtd_t qtd[TUP_DCD_ENDPOINT_MAX][2] TU_ATTR_ALIGNED(32);
|
||||
}dcd_data_t;
|
||||
|
||||
CFG_TUSB_MEM_SECTION TU_ATTR_ALIGNED(2048)
|
||||
@@ -647,7 +647,7 @@ void dcd_int_handler(uint8_t rhport)
|
||||
|
||||
if ( edpt_complete )
|
||||
{
|
||||
for(uint8_t epnum = 0; epnum < DCD_ATTR_ENDPOINT_MAX; epnum++)
|
||||
for(uint8_t epnum = 0; epnum < TUP_DCD_ENDPOINT_MAX; epnum++)
|
||||
{
|
||||
if ( tu_bit_test(edpt_complete, epnum) ) process_edpt_complete_isr(rhport, epnum, TUSB_DIR_OUT);
|
||||
if ( tu_bit_test(edpt_complete, epnum+16) ) process_edpt_complete_isr(rhport, epnum, TUSB_DIR_IN);
|
||||
|
||||
@@ -26,7 +26,7 @@
|
||||
|
||||
#include "tusb_option.h"
|
||||
|
||||
#if CFG_TUH_ENABLED && defined(HCD_ATTR_OHCI)
|
||||
#if CFG_TUH_ENABLED && defined(TUP_USBIP_OHCI)
|
||||
|
||||
//--------------------------------------------------------------------+
|
||||
// INCLUDE
|
||||
|
||||
@@ -426,7 +426,7 @@ static inline void print_block_list(free_block_t const *blk, unsigned num)
|
||||
|
||||
static unsigned find_free_memory(uint_fast16_t size_in_log2_minus3)
|
||||
{
|
||||
free_block_t free_blocks[2 * (DCD_ATTR_ENDPOINT_MAX - 1)];
|
||||
free_block_t free_blocks[2 * (TUP_DCD_ENDPOINT_MAX - 1)];
|
||||
unsigned num_blocks = 1;
|
||||
/* Backup current EP to restore later */
|
||||
u8 backup_ep = USBC_GetActiveEp();
|
||||
@@ -434,7 +434,7 @@ static unsigned find_free_memory(uint_fast16_t size_in_log2_minus3)
|
||||
/* Initialize free memory block list */
|
||||
free_blocks[0].beg = 64 / 8;
|
||||
free_blocks[0].end = (USB_FIFO_SIZE_KB << 10) / 8; /* 2KiB / 8 bytes */
|
||||
for (int i = 1; i < DCD_ATTR_ENDPOINT_MAX; ++i) {
|
||||
for (int i = 1; i < TUP_DCD_ENDPOINT_MAX; ++i) {
|
||||
uint_fast16_t addr;
|
||||
int num;
|
||||
USBC_SelectActiveEp(i);
|
||||
@@ -974,7 +974,7 @@ bool dcd_edpt_open(uint8_t rhport, tusb_desc_endpoint_t const * ep_desc)
|
||||
const unsigned xfer = ep_desc->bmAttributes.xfer;
|
||||
const unsigned mps = tu_edpt_packet_size(ep_desc);
|
||||
|
||||
TU_ASSERT(epn < DCD_ATTR_ENDPOINT_MAX);
|
||||
TU_ASSERT(epn < TUP_DCD_ENDPOINT_MAX);
|
||||
|
||||
pipe_state_t *pipe = &_dcd.pipe[dir_in][epn - 1];
|
||||
pipe->buf = NULL;
|
||||
@@ -1033,7 +1033,7 @@ void dcd_edpt_close_all(uint8_t rhport)
|
||||
musb_int_mask();
|
||||
USBC_Writew(1, USBC_REG_INTTxE(USBC0_BASE)); /* Enable only EP0 */
|
||||
USBC_Writew(0, USBC_REG_INTRxE(USBC0_BASE));
|
||||
for (unsigned i = 1; i < DCD_ATTR_ENDPOINT_MAX; ++i) {
|
||||
for (unsigned i = 1; i < TUP_DCD_ENDPOINT_MAX; ++i) {
|
||||
USBC_SelectActiveEp(i);
|
||||
USBC_Writew(0, USBC_REG_TXMAXP(USBC0_BASE));
|
||||
USBC_Writew((1 << USBC_BP_TXCSR_D_MODE) | (1 << USBC_BP_TXCSR_D_CLEAR_DATA_TOGGLE) | (1 << USBC_BP_TXCSR_D_FLUSH_FIFO),
|
||||
|
||||
@@ -29,16 +29,12 @@
|
||||
|
||||
#include "tusb_option.h"
|
||||
|
||||
#if CFG_TUD_ENABLED && \
|
||||
( defined(DCD_ATTR_DWC2_STM32) || \
|
||||
TU_CHECK_MCU(OPT_MCU_ESP32S2, OPT_MCU_ESP32S3, OPT_MCU_GD32VF103) || \
|
||||
TU_CHECK_MCU(OPT_MCU_EFM32GG, OPT_MCU_BCM2711, OPT_MCU_BCM2835) || \
|
||||
TU_CHECK_MCU(OPT_MCU_BCM2837, OPT_MCU_XMC4000) )
|
||||
#if CFG_TUD_ENABLED && defined(TUP_USBIP_DWC2)
|
||||
|
||||
#include "device/dcd.h"
|
||||
#include "dwc2_type.h"
|
||||
|
||||
#if defined(DCD_ATTR_DWC2_STM32)
|
||||
#if defined(TUP_USBIP_DWC2_STM32)
|
||||
#include "dwc2_stm32.h"
|
||||
#elif TU_CHECK_MCU(OPT_MCU_ESP32S2, OPT_MCU_ESP32S3)
|
||||
#include "dwc2_esp32.h"
|
||||
|
||||
Reference in New Issue
Block a user