FSDEV: go to NAK when unstalling; on reset, set EP0 to NAK, prioritize reset interrupt, fix small typos.
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		@@ -331,7 +331,9 @@ static const tusb_desc_endpoint_t ep0IN_desc =
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    .bEndpointAddress = 0x80
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};
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#if defined(__GNUC__) && (__GNUC__ >= 7)
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#pragma GCC diagnostic pop
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#endif
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static void dcd_handle_bus_reset(void)
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{
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@@ -349,7 +351,6 @@ static void dcd_handle_bus_reset(void)
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  dcd_edpt_open (0, &ep0IN_desc);
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  newDADDR = 0u;
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  USB->DADDR = USB_DADDR_EF; // Set enable flag, and leaving the device address as zero.
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  pcd_set_ep_rx_status(USB, 0, USB_EP_RX_VALID); // And start accepting SETUP on EP0
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}
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// FIXME: Defined to return uint16 so that ASSERT can be used, even though a return value is not needed.
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@@ -518,8 +519,22 @@ static uint16_t dcd_ep_ctr_handler(void)
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static void dcd_fs_irqHandler(void) {
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  uint16_t int_status = USB->ISTR;
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 // unused IRQs: (USB_ISTR_PMAOVR | USB_ISTR_ERR | USB_ISTR_WKUP | USB_ISTR_SUSP | USB_ISTR_ESOF | USB_ISTR_L1REQ )
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  uint32_t int_status = USB->ISTR;
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  //const uint32_t handled_ints = USB_ISTR_CTR | USB_ISTR_RESET | USB_ISTR_WKUP
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  //    | USB_ISTR_SUSP | USB_ISTR_SOF | USB_ISTR_ESOF;
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  // unused IRQs: (USB_ISTR_PMAOVR | USB_ISTR_ERR | USB_ISTR_L1REQ )
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  // The ST driver loops here on the CTR bit, but that loop has been moved into the
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  // dcd_ep_ctr_handler(), so less need to loop here. The other interrupts shouldn't
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  // be triggered repeatedly.
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  if(int_status & USB_ISTR_RESET) {
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    // USBRST is start of reset.
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    reg16_clear_bits(&USB->ISTR, USB_ISTR_RESET);
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    dcd_handle_bus_reset();
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    dcd_event_bus_signal(0, DCD_EVENT_BUS_RESET, true);
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    return; // Don't do the rest of the things here; perhaps they've been cleared?
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  }
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  if (int_status & USB_ISTR_CTR)
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  {
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@@ -528,12 +543,7 @@ static void dcd_fs_irqHandler(void) {
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    dcd_ep_ctr_handler();
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    reg16_clear_bits(&USB->ISTR, USB_ISTR_CTR);
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  }
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  if(int_status & USB_ISTR_RESET) {
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    // USBRST is start of reset.
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    reg16_clear_bits(&USB->ISTR, USB_ISTR_RESET);
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    dcd_handle_bus_reset();
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    dcd_event_bus_signal(0, DCD_EVENT_BUS_RESET, true);
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  }
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  if (int_status & USB_ISTR_WKUP)
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  {
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    reg16_clear_bits(&USB->CNTR, USB_CNTR_LPMODE);
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@@ -544,6 +554,9 @@ static void dcd_fs_irqHandler(void) {
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  if (int_status & USB_ISTR_SUSP)
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  {
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    /* Suspend is asserted for both suspend and unplug events. without Vbus monitoring,
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     * these events cannot be differentiated, so we only trigger suspend. */
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    /* Force low-power mode in the macrocell */
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    USB->CNTR |= USB_CNTR_FSUSP;
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    USB->CNTR |= USB_CNTR_LPMODE;
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@@ -696,25 +709,19 @@ void dcd_edpt_stall (uint8_t rhport, uint8_t ep_addr)
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{
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  (void)rhport;
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  if (ep_addr == 0) { // CTRL EP0 (OUT for setup)
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    pcd_set_ep_tx_status(USB,ep_addr, USB_EP_TX_STALL);
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  if (ep_addr & 0x80)
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  { // IN
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    pcd_set_ep_tx_status(USB, ep_addr & 0x7F, USB_EP_TX_STALL);
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  }
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  if (ep_addr & 0x80) { // IN
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    ep_addr &= 0x7F;
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    pcd_set_ep_tx_status(USB,ep_addr, USB_EP_TX_STALL);
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  } else { // OUT
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    pcd_set_ep_rx_status(USB,ep_addr, USB_EP_RX_STALL);
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  else
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  { // OUT
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    pcd_set_ep_rx_status(USB, ep_addr, USB_EP_RX_STALL);
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  }
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}
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void dcd_edpt_clear_stall (uint8_t rhport, uint8_t ep_addr)
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{
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  (void)rhport;
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  if (ep_addr == 0)
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  {
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    pcd_set_ep_tx_status(USB,ep_addr, USB_EP_TX_NAK);
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  }
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  if (ep_addr & 0x80)
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  { // IN
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@@ -730,7 +737,7 @@ void dcd_edpt_clear_stall (uint8_t rhport, uint8_t ep_addr)
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    /* Reset to DATA0 if clearing stall condition. */
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    pcd_clear_rx_dtog(USB,ep_addr);
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    pcd_set_ep_rx_status(USB,ep_addr, USB_EP_RX_VALID);
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    pcd_set_ep_rx_status(USB,ep_addr, USB_EP_RX_NAK);
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  }
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}
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