Update F3 BSP and create F070RB BSP. Both are untested (but compile).
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		@@ -99,9 +99,7 @@
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#undef USE_HAL_DRIVER
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#include "device/dcd.h"
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#include "stm32f0xx.h"
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#include "portable/st/stm32_fsdev/dcd_stm32_fsdev_pvt_st.h"
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#include "uart_util.h"
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/*****************************************************
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@@ -120,7 +118,7 @@
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#endif
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#ifndef DCD_STM32_BTABLE_LENGTH
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#  define DCD_STM32_BTABLE_LENGTH (DCD_STM32_BTABLE_LENGTH - DCD_STM32_BTABLE_BASE)
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#  define DCD_STM32_BTABLE_LENGTH (PMA_LENGTH - DCD_STM32_BTABLE_BASE)
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#endif
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/***************************************************
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@@ -131,7 +129,7 @@
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#  error Only 8 endpoints supported on the hardware
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#endif
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#if ((BTABLE_BASE + BTABLE_LENGTH)>PMA_LENGTH)
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#if ((DCD_STM32_BTABLE_BASE + DCD_STM32_BTABLE_LENGTH)>PMA_LENGTH)
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#  error BTABLE does not fit in PMA RAM
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#endif
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@@ -157,10 +155,11 @@ static uint8_t newDADDR; // Used to set the new device address during the CTR IR
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// EP Buffers assigned from end of memory location, to minimize their chance of crashing
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// into the stack.
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static uint16_t ep_buf_ptr;
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static void dcd_handle_bus_reset();
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static void dcd_handle_bus_reset(void);
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static void dcd_write_packet_memory(uint16_t dst, const void *__restrict src, size_t wNBytes);
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static void dcd_read_packet_memory(void *__restrict dst, uint16_t src, size_t wNBytes);
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static void dcd_transmit_packet(xfer_ctl_t * xfer, uint16_t ep_ix);
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static uint16_t dcd_ep_ctr_handler(void);
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void dcd_init (uint8_t rhport)
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{
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@@ -218,15 +217,35 @@ void dcd_init (uint8_t rhport)
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void dcd_int_enable (uint8_t rhport)
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{
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  (void)rhport;
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#if defined(STM32F0)
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  NVIC_SetPriority(USB_IRQn, 0);
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  NVIC_EnableIRQ(USB_IRQn);
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#elif defined(STM32F3)
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#warning need to check these since the F3 can have its USB interrupts remapped.
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  NVIC_SetPriority(USB_HP_CAN_TX_IRQn, 0);
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  NVIC_SetPriority(USB_LP_CAN_RX0_IRQn, 0);
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  NVIC_SetPriority(USBWakeUp_IRQn, 0);
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  NVIC_EnableIRQ(USB_HP_CAN_TX_IRQn);
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  NVIC_EnableIRQ(USB_LP_CAN_RX0_IRQn);
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  NVIC_EnableIRQ(USBWakeUp_IRQn);
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#endif
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}
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// Disable device interrupt
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void dcd_int_disable(uint8_t rhport)
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{
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  (void)rhport;
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#if defined(STM32F0)
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  NVIC_DisableIRQ(USB_IRQn);
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#elif defined(STM32F3)
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#warning need to check these since the F3 can have its USB interrupts remapped.
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  NVIC_DisableIRQ(USB_HP_CAN_TX_IRQn);
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  NVIC_DisableIRQ(USB_LP_CAN_RX0_IRQn);
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  NVIC_DisableIRQ(USBWakeUp_IRQn);
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#else
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#error Unknown arch in USB driver
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#endif
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}
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// Receive Set Address request, mcu port must also include status IN response
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@@ -277,7 +296,7 @@ static const tusb_desc_endpoint_t ep0IN_desc =
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#pragma GCC diagnostic pop
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static void dcd_handle_bus_reset()
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static void dcd_handle_bus_reset(void)
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{
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  //__IO uint16_t * const epreg = &(EPREG(0));
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  USB->DADDR = 0u; // disable USB peripheral by clearing the EF flag
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@@ -297,7 +316,7 @@ static void dcd_handle_bus_reset()
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}
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// FIXME: Defined to return uint16 so that ASSERT can be used, even though a return value is not needed.
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static uint16_t dcd_ep_ctr_handler()
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static uint16_t dcd_ep_ctr_handler(void)
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{
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  uint16_t count=0U;
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  uint8_t EPindex;
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@@ -35,6 +35,21 @@
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// This file contains source copied from ST's HAL, and thus should have their copyright statement.
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// PMA_LENGTH is PMA buffer size in bytes.
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#if defined(STM32F070xB) | defined(STM32F070x6)
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#include "stm32f0xx.h"
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#define PMA_LENGTH 1024
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#elif defined(STM32F303xB) | defined(STM32F303xC)
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#warning STM32F3 platform is untested.
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#include "stm32f3xx.h"
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#define PMA_LENGTH 512
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#else
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#error You are using an untested or unimplemented STM32 variant
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#endif
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#ifndef PORTABLE_ST_STM32F0_DCD_STM32F0_FSDEV_PVT_ST_H_
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#define PORTABLE_ST_STM32F0_DCD_STM32F0_FSDEV_PVT_ST_H_
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@@ -217,16 +232,14 @@
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#define EPREG(n) (((__IO uint16_t*)USB_BASE)[n*2])
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#define USB_ISTR_ALL_EVENTS (USB_ISTR_PMAOVR | USB_ISTR_ERR | USB_ISTR_WKUP | USB_ISTR_SUSP | \
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     USB_ISTR_RESET | USB_ISTR_SOF | USB_ISTR_ESOF | USB_ISTR_L1REQ )
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// PMA_LENGTH is PMA buffer size in bytes.
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#if defined(STM32F070xB) | defined(STM32F070x6)
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#define PMA_LENGTH 1024
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#if defined(USB_ISTR_L1REQ)
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#define USB_ISTR_L1REQ_FORCED USB_ISTR_L1REQ
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#else
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#error You are using an untested or unimplemented STM32 variant
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#define USB_ISTR_L1REQ_FORCED ((uint16_t)0x0000U)
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#endif
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#define USB_ISTR_ALL_EVENTS (USB_ISTR_PMAOVR | USB_ISTR_ERR | USB_ISTR_WKUP | USB_ISTR_SUSP | \
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     USB_ISTR_RESET | USB_ISTR_SOF | USB_ISTR_ESOF | USB_ISTR_L1REQ_FORCED )
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#endif /* PORTABLE_ST_STM32F0_DCD_STM32F0_FSDEV_PVT_ST_H_ */
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