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fix pre-commmit

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This commit is contained in:
hathach
2025-04-29 21:41:34 +07:00
parent 538684ac62
commit d221d55b08
8 changed files with 8 additions and 11 deletions
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2
hw/bsp/lpc51/family.mk
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@@ -40,7 +40,7 @@ INC += \
$(TOP)/$(SDK_DIR)/drivers/flexcomm/usart \
$(TOP)/$(SDK_DIR)/drivers/lpc_iocon \
$(TOP)/$(SDK_DIR)/drivers/lpc_gpio
SRC_S += $(MCU_DIR)/gcc/startup_$(MCU).S
LIBS += $(TOP)/$(MCU_DIR)/gcc/libpower.a

2
hw/bsp/lpc55/family.mk
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@@ -62,5 +62,3 @@ INC += \
$(TOP)/$(SDK_DIR)/drivers/sctimer
SRC_S += $(MCU_DIR)/gcc/startup_$(MCU_CORE).S

2
hw/bsp/mcx/boards/frdm_mcxa153/clock_config.h
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@@ -4,7 +4,7 @@
*
* SPDX-License-Identifier: BSD-3-Clause
*/
/***********************************************************************************************************************
* This file was generated by the MCUXpresso Config Tools. Any manual edits made to this file
* will be overwritten if the respective MCUXpresso Config Tools is used to update this file.

2
hw/bsp/mcx/boards/frdm_mcxa153/pin_mux.c
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@@ -67,7 +67,7 @@ void BOARD_InitPins(void)
/* PORT3 peripheral is released from reset */
RESET_ReleasePeripheralReset(kPORT3_RST_SHIFT_RSTn);
/* Write to PORT0: Peripheral clock is enabled */
CLOCK_EnableClock(kCLOCK_GatePORT0);
/* LPUART0 peripheral is released from reset */

3
hw/bsp/mcx/boards/frdm_mcxa156/clock_config.h
View File

@@ -3,7 +3,7 @@
*
* SPDX-License-Identifier: BSD-3-Clause
*/
/***********************************************************************************************************************
* This file was generated by the MCUXpresso Config Tools. Any manual edits made to this file
* will be overwritten if the respective MCUXpresso Config Tools is used to update this file.
@@ -167,4 +167,3 @@ void BOARD_BootClockFRO96M(void);
#endif /* __cplusplus*/
#endif /* _CLOCK_CONFIG_H_ */

2
hw/bsp/mcx/boards/frdm_mcxa156/pin_mux.c
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@@ -81,7 +81,7 @@ void BOARD_InitPins(void)
RESET_ReleasePeripheralReset(kGPIO0_RST_SHIFT_RSTn);
/* PORT3 peripheral is released from reset */
RESET_ReleasePeripheralReset(kPORT0_RST_SHIFT_RSTn);
/* PORT0: Peripheral clock is enabled */
CLOCK_EnableClock(kCLOCK_GatePORT0);
/* LPUART0 peripheral is released from reset */

4
hw/bsp/mcx/drivers/spc/fsl_spc.c
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@@ -454,9 +454,9 @@ status_t SPC_EnableLowPowerModeCoreLowVoltageDetect(SPC_Type *base, bool enable)
*
* This function selects the system VDD low-voltage level. Changing system VDD low-voltage level
* must be done after disabling the System VDD low voltage reset and interrupt.
*
*
* @deprecated In latest RM, reserved for all devices, will removed in next release.
*
*
* param base SPC peripheral base address.
* param level System VDD Low-Voltage level selection. See @ref spc_low_voltage_level_select_t for details.
*/

2
hw/bsp/mcx/drivers/spc/fsl_spc.h
View File

@@ -206,7 +206,7 @@ typedef enum _spc_dcdc_drive_strength
{
kSPC_DCDC_PulseRefreshMode = 0x0U, /*!< DCDC_CORE Regulator Drive Strength set to Pulse Refresh Mode,
* This enum member is only useful for Low Power Mode config, please
* note that pluse refresh mode is invalid in SLEEP mode.
* note that pulse refresh mode is invalid in SLEEP mode.
*/
kSPC_DCDC_LowDriveStrength = 0x1U, /*!< DCDC_CORE regulator Drive Strength set to low. */
kSPC_DCDC_NormalDriveStrength = 0x2U, /*!< DCDC_CORE regulator Drive Strength set to Normal. */