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Merge branch 'master' into fork/HiFiPhile/h7rs

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This commit is contained in:
hathach
2025-06-11 16:23:54 +07:00
parent 6346fbec16 8e25220369
commit d3d505e8f7
133 changed files with 6375 additions and 2644 deletions
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3
hw/bsp/espressif/boards/adafruit_feather_esp32c6/board.cmake Normal file
View File

@@ -0,0 +1,3 @@
# Apply board specific content here
set(IDF_TARGET "esp32c6")
set(MAX3421_HOST 1)

56
hw/bsp/espressif/boards/adafruit_feather_esp32c6/board.h Normal file
View File

@@ -0,0 +1,56 @@
/*
* The MIT License (MIT)
*
* Copyright (c) 2020, Ha Thach (tinyusb.org)
*
* Permission is hereby granted, free of charge, to any person obtaining a copy
* of this software and associated documentation files (the "Software"), to deal
* in the Software without restriction, including without limitation the rights
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
* copies of the Software, and to permit persons to whom the Software is
* furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
* THE SOFTWARE.
*
* This file is part of the TinyUSB stack.
*/
/* metadata:
name: Adafruit Feather EPS32-C6
url: https://www.adafruit.com/product/5933
*/
#ifndef BOARD_H_
#define BOARD_H_
#ifdef __cplusplus
extern "C" {
#endif
#define NEOPIXEL_PIN 15
#define BUTTON_PIN 9
#define BUTTON_STATE_ACTIVE 0
// SPI for USB host shield
#define MAX3421_SPI_HOST SPI2_HOST
#define MAX3421_SCK_PIN 21
#define MAX3421_MOSI_PIN 22
#define MAX3421_MISO_PIN 23
#define MAX3421_CS_PIN 8
#define MAX3421_INTR_PIN 7
#ifdef __cplusplus
}
#endif
#endif /* BOARD_H_ */

2
hw/bsp/espressif/boards/family.c
View File

@@ -49,7 +49,9 @@ static led_strip_handle_t led_strip;
static void max3421_init(void);
#endif
#if TU_CHECK_MCU(OPT_MCU_ESP32S2, OPT_MCU_ESP32S3, OPT_MCU_ESP32P4)
static bool usb_init(void);
#endif
//--------------------------------------------------------------------+
// Implementation

2
hw/bsp/espressif/family.cmake
View File

@@ -32,8 +32,6 @@ endif ()
# Add example src and bsp directories
set(EXTRA_COMPONENT_DIRS "src" "${CMAKE_CURRENT_LIST_DIR}/boards" "${CMAKE_CURRENT_LIST_DIR}/components")
# set SDKCONFIG for each IDF Target
set(SDKCONFIG ${CMAKE_BINARY_DIR}/sdkconfig)
include($ENV{IDF_PATH}/tools/cmake/project.cmake)

21
hw/bsp/family_support.cmake
View File

@@ -38,6 +38,11 @@ if (NOT DEFINED TOOLCHAIN)
set(TOOLCHAIN gcc)
endif ()
# Optimization
if (NOT DEFINED CMAKE_BUILD_TYPE OR CMAKE_BUILD_TYPE STREQUAL "")
set(CMAKE_BUILD_TYPE MinSizeRel CACHE STRING "Build type" FORCE)
endif ()
#-------------------------------------------------------------
# FAMILY and BOARD
#-------------------------------------------------------------
@@ -483,7 +488,7 @@ function(family_flash_openocd TARGET)
# note skip verify since it has issue with rp2040
add_custom_target(${TARGET}-openocd
DEPENDS ${TARGET}
COMMAND ${OPENOCD} -c "tcl_port disabled" -c "gdb_port disabled" ${OPTION_LIST} -c init -c halt -c "program $<TARGET_FILE:${TARGET}>" -c reset ${OPTION_LIST2} -c exit
COMMAND ${OPENOCD} -c "tcl_port disabled; gdb_port disabled" ${OPTION_LIST} -c "init; halt; program $<TARGET_FILE:${TARGET}>" -c reset ${OPTION_LIST2} -c exit
VERBATIM
)
endfunction()
@@ -503,10 +508,16 @@ endfunction()
# Add flash openocd adi (Analog Devices) target
# included with msdk or compiled from release branch of https://github.com/analogdevicesinc/openocd
function(family_flash_openocd_adi TARGET)
if (DEFINED $ENV{MAXIM_PATH})
# use openocd from msdk
set(OPENOCD ENV{MAXIM_PATH}/Tools/OpenOCD/openocd)
set(OPENOCD_OPTION2 "-s ENV{MAXIM_PATH}/Tools/OpenOCD/scripts")
if (DEFINED MAXIM_PATH)
# use openocd from msdk with MAXIM_PATH cmake variable first if the user specified it
set(OPENOCD ${MAXIM_PATH}/Tools/OpenOCD/openocd)
set(OPENOCD_OPTION2 "-s ${MAXIM_PATH}/Tools/OpenOCD/scripts")
elseif (DEFINED ENV{MAXIM_PATH})
# use openocd from msdk with MAXIM_PATH environment variable. Normalize
# since msdk can be Windows (MinGW) or Linux
file(TO_CMAKE_PATH "$ENV{MAXIM_PATH}" MAXIM_PATH_NORM)
set(OPENOCD ${MAXIM_PATH_NORM}/Tools/OpenOCD/openocd)
set(OPENOCD_OPTION2 "-s ${MAXIM_PATH_NORM}/Tools/OpenOCD/scripts")
else()
# compiled from source
if (NOT DEFINED OPENOCD_ADI_PATH)

2
hw/bsp/lpc51/family.cmake
View File

@@ -36,7 +36,7 @@ function(add_board_target BOARD_TARGET)
# driver
${SDK_DIR}/drivers/lpc_gpio/fsl_gpio.c
${SDK_DIR}/drivers/flexcomm/fsl_flexcomm.c
${SDK_DIR}/drivers/flexcomm/fsl_usart.c
${SDK_DIR}/drivers/flexcomm/usart/fsl_usart.c
# mcu
${SDK_DIR}/devices/${MCU_VARIANT}/system_${MCU_VARIANT}.c
${SDK_DIR}/devices/${MCU_VARIANT}/drivers/fsl_clock.c

7
hw/bsp/lpc51/family.mk
View File

@@ -28,15 +28,16 @@ SRC_C += \
$(MCU_DIR)/drivers/fsl_reset.c \
$(SDK_DIR)/drivers/lpc_gpio/fsl_gpio.c \
$(SDK_DIR)/drivers/flexcomm/fsl_flexcomm.c \
$(SDK_DIR)/drivers/flexcomm/fsl_usart.c
$(SDK_DIR)/drivers/flexcomm/usart/fsl_usart.c
INC += \
$(TOP)/$(BOARD_PATH) \
$(TOP)/lib/CMSIS_5/CMSIS/Core/Include \
$(TOP)/$(BOARD_PATH) \
$(TOP)/lib/CMSIS_5/CMSIS/Core/Include \
$(TOP)/$(MCU_DIR) \
$(TOP)/$(MCU_DIR)/drivers \
$(TOP)/$(SDK_DIR)/drivers/common \
$(TOP)/$(SDK_DIR)/drivers/flexcomm \
$(TOP)/$(SDK_DIR)/drivers/flexcomm/usart \
$(TOP)/$(SDK_DIR)/drivers/lpc_iocon \
$(TOP)/$(SDK_DIR)/drivers/lpc_gpio

3
hw/bsp/lpc54/family.cmake
View File

@@ -44,7 +44,7 @@ function(add_board_target BOARD_TARGET)
${SDK_DIR}/drivers/lpc_gpio/fsl_gpio.c
${SDK_DIR}/drivers/common/fsl_common_arm.c
${SDK_DIR}/drivers/flexcomm/fsl_flexcomm.c
${SDK_DIR}/drivers/flexcomm/fsl_usart.c
${SDK_DIR}/drivers/flexcomm/usart/fsl_usart.c
# mcu
${SDK_DIR}/devices/${MCU_VARIANT}/system_${MCU_CORE}.c
${SDK_DIR}/devices/${MCU_VARIANT}/drivers/fsl_clock.c
@@ -56,6 +56,7 @@ function(add_board_target BOARD_TARGET)
# driver
${SDK_DIR}/drivers/common
${SDK_DIR}/drivers/flexcomm
${SDK_DIR}/drivers/flexcomm/usart
${SDK_DIR}/drivers/lpc_iocon
${SDK_DIR}/drivers/lpc_gpio
${SDK_DIR}/drivers/lpuart

3
hw/bsp/lpc54/family.mk
View File

@@ -36,7 +36,7 @@ SRC_C += \
$(MCU_DIR)/drivers/fsl_reset.c \
$(SDK_DIR)/drivers/lpc_gpio/fsl_gpio.c \
$(SDK_DIR)/drivers/flexcomm/fsl_flexcomm.c \
$(SDK_DIR)/drivers/flexcomm/fsl_usart.c \
$(SDK_DIR)/drivers/flexcomm/usart/fsl_usart.c \
$(SDK_DIR)/drivers/common/fsl_common_arm.c
INC += \
@@ -46,6 +46,7 @@ INC += \
$(TOP)/$(MCU_DIR)/drivers \
$(TOP)/$(SDK_DIR)/drivers/common \
$(TOP)/$(SDK_DIR)/drivers/flexcomm \
$(TOP)/$(SDK_DIR)/drivers/flexcomm/usart \
$(TOP)/$(SDK_DIR)/drivers/lpc_iocon \
$(TOP)/$(SDK_DIR)/drivers/lpc_gpio

4
hw/bsp/lpc55/family.cmake
View File

@@ -44,7 +44,7 @@ function(add_board_target BOARD_TARGET)
${SDK_DIR}/drivers/lpc_gpio/fsl_gpio.c
${SDK_DIR}/drivers/common/fsl_common_arm.c
${SDK_DIR}/drivers/flexcomm/fsl_flexcomm.c
${SDK_DIR}/drivers/flexcomm/fsl_usart.c
${SDK_DIR}/drivers/flexcomm/usart/fsl_usart.c
# mcu
${SDK_DIR}/devices/${MCU_VARIANT}/system_${MCU_CORE}.c
${SDK_DIR}/devices/${MCU_VARIANT}/drivers/fsl_clock.c
@@ -56,9 +56,9 @@ function(add_board_target BOARD_TARGET)
# driver
${SDK_DIR}/drivers/common
${SDK_DIR}/drivers/flexcomm
${SDK_DIR}/drivers/flexcomm/usart
${SDK_DIR}/drivers/lpc_iocon
${SDK_DIR}/drivers/lpc_gpio
${SDK_DIR}/drivers/lpuart
${SDK_DIR}/drivers/sctimer
# mcu
${SDK_DIR}/devices/${MCU_VARIANT}

7
hw/bsp/lpc55/family.mk
View File

@@ -45,7 +45,7 @@ SRC_C += \
$(SDK_DIR)/drivers/lpc_gpio/fsl_gpio.c \
$(SDK_DIR)/drivers/common/fsl_common_arm.c \
$(SDK_DIR)/drivers/flexcomm/fsl_flexcomm.c \
$(SDK_DIR)/drivers/flexcomm/fsl_usart.c \
$(SDK_DIR)/drivers/flexcomm/usart/fsl_usart.c \
lib/sct_neopixel/sct_neopixel.c
INC += \
@@ -55,11 +55,10 @@ INC += \
$(TOP)/$(MCU_DIR) \
$(TOP)/$(MCU_DIR)/drivers \
$(TOP)/$(SDK_DIR)/drivers/common \
$(TOP)/$(SDK_DIR)/drivers/flexcomm \
$(TOP)/$(SDK_DIR)/drivers/flexcomm/usart \
$(TOP)/$(SDK_DIR)/drivers/flexcomm/ \
$(TOP)/$(SDK_DIR)/drivers/lpc_iocon \
$(TOP)/$(SDK_DIR)/drivers/lpc_gpio \
$(TOP)/$(SDK_DIR)/drivers/sctimer
SRC_S += $(MCU_DIR)/gcc/startup_$(MCU_CORE).S
LIBS += $(TOP)/$(MCU_DIR)/gcc/libpower_hardabi.a

46
hw/bsp/max32650/README.md
View File

@@ -1,46 +0,0 @@
# Analog Devices MAX32650/1/2
This BSP is for working with the Analog Devices
[MAX32650](https://www.analog.com/en/products/max32650.html),
[MAX32651](https://www.analog.com/en/products/max32651.html) and
[MAX32652](https://www.analog.com/en/products/max32652.html)
microcontrollers. The following boards are supported:
* [MAX32650EVKIT](https://www.analog.com/en/resources/evaluation-hardware-and-software/evaluation-boards-kits/max32650-evkit.html)
* [MAX32650FTHR](https://www.analog.com/en/resources/evaluation-hardware-and-software/evaluation-boards-kits/max32650fthr.html)
* [MAX32651EVKIT](https://www.analog.com/en/resources/evaluation-hardware-and-software/evaluation-boards-kits/max32651-evkit.html) (Secure Bootloader)
This part family leverages the Maxim Microcontrollers SDK (MSDK) for the device
interfaces and hardware abstraction layers. This source code package is fetched
as part of the get-deps script.
The microcontrollers utilize the standard GNU ARM toolchain. If this toolchain
is not already available on your build machine, it can be installed by using the
bundled MSDK installation. Details on downloading and installing can be found
in the [User's Guide](https://analogdevicesinc.github.io/msdk//USERGUIDE/).
## Flashing
### MAX32650 and MAX32652
The default flashing behavior in this BSP for the MAX32650 and MAX32652 is to
utilize JLink. This can be done by running the `flash` or `flash-jlink` rule
for Makefiles, or the `<target>-jlink` target for CMake.
Both the Evaluation Kit and Feather boards are shipped with a CMSIS-DAP
compatible debug probe. However, at the time of writing, the necessary flashing
algorithms for OpenOCD have not yet been incorporated into the OpenOCD master
branch. To utilize the provided debug probes, please install the bundled MSDK
package which includes the appropriate OpenOCD modifications. To leverage this
OpenOCD instance, run the `flash-msdk` Makefile rule, or `<target>-msdk` CMake
target.
### MAX32651
The MAX32651 features an integrated secure bootloader which requires the
application image be signed prior to flashing. Both the Makefile and CMake
scripts account for this signing automatically when building for the
MAX32651EVKIT.
To flash the signed image, the MSDK's OpenOCD variant must be used. To flash
the MAX32651EVKIT please install the bundled MSDK, and utilize the `flash-msdk`
and `<target>-msdk` rule and target.

10
hw/bsp/max32650/boards/max32650evkit/board.cmake
View File

@@ -1,10 +0,0 @@
# Use the standard, non-secure linker file
set(LD_FILE_GNU ${CMAKE_CURRENT_LIST_DIR}/max32650.ld)
function(update_board_extras TARGET)
#No extra arguments
endfunction()
function(prepare_image TARGET_IN)
#No signing required
endfunction()

2
hw/bsp/max32650/boards/max32650evkit/board.mk
View File

@@ -1,2 +0,0 @@
# Use the standard, non-secure linker file
LD_FILE = $(BOARD_PATH)/max32650.ld

10
hw/bsp/max32650/boards/max32650fthr/board.cmake
View File

@@ -1,10 +0,0 @@
# Use the standard, non-secure linker file
set(LD_FILE_GNU ${CMAKE_CURRENT_LIST_DIR}/max32650.ld)
function(update_board_extras TARGET)
#No extra arguments
endfunction()
function(prepare_image TARGET_IN)
#No signing required
endfunction()

2
hw/bsp/max32650/boards/max32650fthr/board.mk
View File

@@ -1,2 +0,0 @@
# Use the standard, non-secure linker file
LD_FILE = $(BOARD_PATH)/max32650.ld

119
hw/bsp/max32650/boards/max32650fthr/max32650.ld
View File

@@ -1,119 +0,0 @@
MEMORY {
ROM (rx) : ORIGIN = 0x00000000, LENGTH = 0x00010000 /* 64kB ROM */
FLASH (rx) : ORIGIN = 0x10000000, LENGTH = 0x00300000 /* 3MB flash */
SRAM (rwx) : ORIGIN = 0x20000000, LENGTH = 0x00100000 /* 1MB SRAM */
}
SECTIONS {
.text :
{
_text = .;
KEEP(*(.isr_vector))
*(.text*) /* program code */
*(.rodata*) /* read-only data: "const" */
KEEP(*(.init))
KEEP(*(.fini))
/* .ctors */
*crtbegin.o(.ctors)
*crtbegin?.o(.ctors)
*(EXCLUDE_FILE(*crtend?.o *crtend.o) .ctors)
*(SORT(.ctors.*))
*(.ctors)
/* .dtors */
*crtbegin.o(.dtors)
*crtbegin?.o(.dtors)
*(EXCLUDE_FILE(*crtend?.o *crtend.o) .dtors)
*(SORT(.dtors.*))
*(.dtors)
/* C++ Exception handling */
KEEP(*(.eh_frame*))
_etext = .;
} > FLASH
.ARM.extab :
{
*(.ARM.extab* .gnu.linkonce.armextab.*)
} > FLASH
/* it's used for C++ exception handling */
/* we need to keep this to avoid overlapping */
.ARM.exidx :
{
__exidx_start = .;
*(.ARM.exidx* .gnu.linkonce.armexidx.*)
__exidx_end = .;
} > FLASH
.data :
{
_data = ALIGN(., 4);
*(vtable)
*(.data*) /*read-write initialized data: initialized global variable*/
*(.spix_config*) /* SPIX configuration functions need to be run from SRAM */
*(.flashprog*) /* Flash program */
/* These array sections are used by __libc_init_array to call static C++ constructors */
. = ALIGN(4);
/* preinit data */
PROVIDE_HIDDEN (__preinit_array_start = .);
KEEP(*(.preinit_array))
PROVIDE_HIDDEN (__preinit_array_end = .);
. = ALIGN(4);
/* init data */
PROVIDE_HIDDEN (__init_array_start = .);
KEEP(*(SORT(.init_array.*)))
KEEP(*(.init_array))
PROVIDE_HIDDEN (__init_array_end = .);
. = ALIGN(4);
/* finit data */
PROVIDE_HIDDEN (__fini_array_start = .);
KEEP(*(SORT(.fini_array.*)))
KEEP(*(.fini_array))
PROVIDE_HIDDEN (__fini_array_end = .);
_edata = ALIGN(., 4);
} > SRAM AT>FLASH
__load_data = LOADADDR(.data);
.bss :
{
. = ALIGN(4);
_bss = .;
*(.bss*) /*read-write zero initialized data: uninitialized global variable*/
*(COMMON)
_ebss = ALIGN(., 4);
} > SRAM
/* Set stack top to end of RAM, and stack limit move down by
* size of stack_dummy section */
__StackTop = ORIGIN(SRAM) + LENGTH(SRAM);
__StackLimit = __StackTop - SIZEOF(.stack_dummy);
/* .stack_dummy section doesn't contains any symbols. It is only
* used for linker to calculate size of stack sections, and assign
* values to stack symbols later */
.stack_dummy (COPY):
{
*(.stack*)
} > SRAM
.heap (COPY):
{
. = ALIGN(4);
PROVIDE ( end = . );
PROVIDE ( _end = . );
*(.heap*)
__HeapLimit = ABSOLUTE(__StackLimit);
} > SRAM
PROVIDE(__stack = __StackTop);
/* Check if data + heap + stack exceeds RAM limit */
ASSERT(__StackLimit >= _ebss, "region RAM overflowed with stack")
}

177
hw/bsp/max32650/family.c
View File

@@ -1,177 +0,0 @@
/*
* The MIT License (MIT)
*
* Copyright (c) 2024 Brent Kowal (Analog Devices, Inc)
*
* Permission is hereby granted, free of charge, to any person obtaining a copy
* of this software and associated documentation files (the "Software"), to deal
* in the Software without restriction, including without limitation the rights
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
* copies of the Software, and to permit persons to whom the Software is
* furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
* THE SOFTWARE.
*
* This file is part of the TinyUSB stack.
*/
/* metadata:
manufacturer: Analog Devices
*/
#ifdef __GNUC__
#pragma GCC diagnostic push
#pragma GCC diagnostic ignored "-Wstrict-prototypes" // _mxc_crit_get_state()
#endif
#include "gpio.h"
#include "mxc_sys.h"
#include "mxc_device.h"
#include "uart.h"
#ifdef __GNUC__
#pragma GCC diagnostic pop
#endif
#include "board.h"
#include "bsp/board_api.h"
//--------------------------------------------------------------------+
// Forward USB interrupt events to TinyUSB IRQ Handler
//--------------------------------------------------------------------+
void USB_IRQHandler(void) {
tud_int_handler(0);
}
//--------------------------------------------------------------------+
// MACRO TYPEDEF CONSTANT ENUM
//--------------------------------------------------------------------+
mxc_uart_regs_t *ConsoleUart = MXC_UART_GET_UART(UART_NUM);
void board_init(void) {
#if CFG_TUSB_OS == OPT_OS_NONE
// 1ms tick timer
SysTick_Config(SystemCoreClock / 1000);
#elif CFG_TUSB_OS == OPT_OS_FREERTOS
// If freeRTOS is used, IRQ priority is limit by max syscall ( smaller is higher )
NVIC_SetPriority(USB_IRQn, configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY);
#endif
mxc_gpio_cfg_t gpioConfig;
// LED
gpioConfig.drvstr = MXC_GPIO_DRVSTR_0;
gpioConfig.func = MXC_GPIO_FUNC_OUT;
gpioConfig.mask = LED_PIN;
gpioConfig.pad = MXC_GPIO_PAD_NONE;
gpioConfig.port = LED_PORT;
gpioConfig.vssel = LED_VDDIO;
MXC_GPIO_Config(&gpioConfig);
board_led_write(false);
// Button
gpioConfig.drvstr = MXC_GPIO_DRVSTR_0;
gpioConfig.func = MXC_GPIO_FUNC_IN;
gpioConfig.mask = BUTTON_PIN;
gpioConfig.pad = BUTTON_PULL;
gpioConfig.port = BUTTON_PORT;
gpioConfig.vssel = MXC_GPIO_VSSEL_VDDIO;
MXC_GPIO_Config(&gpioConfig);
// UART
MXC_UART_Init(ConsoleUart, CFG_BOARD_UART_BAUDRATE);
//USB
// Startup the HIRC96M clock if it's not on already
if (!(MXC_GCR->clk_ctrl & MXC_F_GCR_CLK_CTRL_HIRC96_EN)) {
MXC_GCR->clk_ctrl |= MXC_F_GCR_CLK_CTRL_HIRC96_EN;
MXC_SYS_Clock_Timeout(MXC_F_GCR_CLK_CTRL_HIRC96_RDY);
}
MXC_SYS_ClockEnable(MXC_SYS_PERIPH_CLOCK_USB);
MXC_SYS_Reset_Periph(MXC_SYS_RESET_USB);
}
//--------------------------------------------------------------------+
// Board porting API
//--------------------------------------------------------------------+
void board_led_write(bool state) {
#if LED_STATE_ON
state = !state;
#endif
if (state) {
MXC_GPIO_OutClr(LED_PORT, LED_PIN);
} else {
MXC_GPIO_OutSet(LED_PORT, LED_PIN);
}
}
uint32_t board_button_read(void) {
uint32_t state = MXC_GPIO_InGet(BUTTON_PORT, BUTTON_PIN) ? 1 : 0;
return BUTTON_STATE_ACTIVE == state;
}
size_t board_get_unique_id(uint8_t id[], size_t max_len) {
uint8_t hw_id[13];//USN Buffer
MXC_SYS_GetUSN(hw_id, 13);
size_t act_len = TU_MIN(max_len, 13);
memcpy(id, hw_id, act_len);
return act_len;
}
int board_uart_read(uint8_t *buf, int len) {
int uart_val;
int act_len = 0;
while (act_len < len) {
if ((uart_val = MXC_UART_ReadCharacterRaw(ConsoleUart)) == E_UNDERFLOW) {
break;
} else {
*buf++ = (uint8_t) uart_val;
act_len++;
}
}
return act_len;
}
int board_uart_write(void const *buf, int len) {
int act_len = 0;
const uint8_t *ch_ptr = (const uint8_t *) buf;
while (act_len < len) {
MXC_UART_WriteCharacter(ConsoleUart, *ch_ptr++);
act_len++;
}
return len;
}
#if CFG_TUSB_OS == OPT_OS_NONE
volatile uint32_t system_ticks = 0;
void SysTick_Handler(void) {
system_ticks++;
}
uint32_t board_millis(void) {
return system_ticks;
}
#endif
void HardFault_Handler(void) {
__asm("BKPT #0\n");
}
// Required by __libc_init_array in startup code if we are compiling using
// -nostdlib/-nostartfiles.
void _init(void) {
}

169
hw/bsp/max32650/family.cmake
View File

@@ -1,169 +0,0 @@
include_guard()
set(MAX32_PERIPH ${TOP}/hw/mcu/analog/max32/Libraries/PeriphDrivers)
set(MAX32_CMSIS ${TOP}/hw/mcu/analog/max32/Libraries/CMSIS)
set(CMSIS_5 ${TOP}/lib/CMSIS_5)
# include board specific information and functions
include(${CMAKE_CURRENT_LIST_DIR}/boards/${BOARD}/board.cmake)
# Get the linker file
set(LD_FILE_Clang ${LD_FILE_GNU})
# toolchain set up
set(CMAKE_SYSTEM_CPU cortex-m4 CACHE INTERNAL "System Processor")
set(CMAKE_TOOLCHAIN_FILE ${TOP}/examples/build_system/cmake/toolchain/arm_${TOOLCHAIN}.cmake)
set(JLINK_DEVICE max32650)
set(OPENOCD_OPTION "-f interface/cmsis-dap.cfg -f target/max32650.cfg")
set(FAMILY_MCUS MAX32650 CACHE INTERNAL "")
function(update_board TARGET)
target_compile_definitions(${TARGET} PUBLIC
TARGET=MAX32650
TARGET_REV=0x4131
MXC_ASSERT_ENABLE
MAX32650
IAR_PRAGMAS=0
CFG_TUSB_MCU=OPT_MCU_MAX32650
BOARD_TUD_MAX_SPEED=OPT_MODE_HIGH_SPEED
)
# Run any board specific updates
update_board_extras(${TARGET})
endfunction()
#------------------------------------
# BOARD_TARGET
#------------------------------------
# only need to be built ONCE for all examples
function(add_board_target BOARD_TARGET)
if (TARGET ${BOARD_TARGET})
return()
endif ()
# Startup & Linker script
set(STARTUP_FILE_GNU ${MAX32_CMSIS}/Device/Maxim/MAX32650/Source/GCC/startup_max32650.S)
set(STARTUP_FILE_Clang ${STARTUP_FILE_GNU})
set(PERIPH_SRC ${MAX32_PERIPH}/Source)
add_library(${BOARD_TARGET} STATIC
${MAX32_CMSIS}/Device/Maxim/MAX32650/Source/heap.c
${MAX32_CMSIS}/Device/Maxim/MAX32650/Source/header_MAX32650.c
${MAX32_CMSIS}/Device/Maxim/MAX32650/Source/system_max32650.c
${PERIPH_SRC}/SYS/mxc_assert.c
${PERIPH_SRC}/SYS/mxc_delay.c
${PERIPH_SRC}/SYS/mxc_lock.c
${PERIPH_SRC}/SYS/nvic_table.c
${PERIPH_SRC}/SYS/pins_me10.c
${PERIPH_SRC}/SYS/sys_me10.c
${PERIPH_SRC}/TPU/tpu_me10.c
${PERIPH_SRC}/TPU/tpu_reva.c
${PERIPH_SRC}/FLC/flc_common.c
${PERIPH_SRC}/FLC/flc_me10.c
${PERIPH_SRC}/FLC/flc_reva.c
${PERIPH_SRC}/GPIO/gpio_common.c
${PERIPH_SRC}/GPIO/gpio_me10.c
${PERIPH_SRC}/GPIO/gpio_reva.c
${PERIPH_SRC}/ICC/icc_me10.c
${PERIPH_SRC}/ICC/icc_reva.c
${PERIPH_SRC}/ICC/icc_common.c
${PERIPH_SRC}/UART/uart_common.c
${PERIPH_SRC}/UART/uart_me10.c
${PERIPH_SRC}/UART/uart_reva.c
${STARTUP_FILE_${CMAKE_C_COMPILER_ID}}
)
target_include_directories(${BOARD_TARGET} PUBLIC
${CMAKE_CURRENT_FUNCTION_LIST_DIR}
${MAX32_CMSIS}/Include
${MAX32_CMSIS}/Device/Maxim/MAX32650/Include
${MAX32_PERIPH}/Include/MAX32650
${PERIPH_SRC}/SYS
${PERIPH_SRC}/GPIO
${PERIPH_SRC}/TPU
${PERIPH_SRC}/ICC
${PERIPH_SRC}/FLC
${PERIPH_SRC}/UART
)
target_compile_options(${BOARD_TARGET} PRIVATE
-Wno-error=strict-prototypes
)
update_board(${BOARD_TARGET})
if (CMAKE_C_COMPILER_ID STREQUAL "GNU")
target_link_options(${BOARD_TARGET} PUBLIC
"LINKER:--script=${LD_FILE_GNU}"
-nostartfiles
--specs=nosys.specs --specs=nano.specs
-u sb_header #Needed when linking libraries to not lose the Signing header
)
elseif (CMAKE_C_COMPILER_ID STREQUAL "Clang")
target_link_options(${BOARD_TARGET} PUBLIC
"LINKER:--script=${LD_FILE_Clang}"
)
endif ()
endfunction()
#------------------------------------
# Functions
#------------------------------------
function(family_configure_example TARGET RTOS)
family_configure_common(${TARGET} ${RTOS})
# Board target
add_board_target(board_${BOARD})
#---------- Port Specific ----------
# These files are built for each example since it depends on example's tusb_config.h
target_sources(${TARGET} PUBLIC
# BSP
${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c
${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../board.c
)
target_include_directories(${TARGET} PUBLIC
# family, hw, board
${CMAKE_CURRENT_FUNCTION_LIST_DIR}
${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../../
${CMAKE_CURRENT_FUNCTION_LIST_DIR}/boards/${BOARD}
)
# Add TinyUSB target and port source
family_add_tinyusb(${TARGET} OPT_MCU_MAX32650)
target_sources(${TARGET} PUBLIC
${TOP}/src/portable/mentor/musb/dcd_musb.c
)
target_compile_options(${TARGET} PRIVATE
-Wno-error=strict-prototypes
)
target_link_libraries(${TARGET} PUBLIC board_${BOARD})
target_compile_options(${TARGET} PRIVATE
-Wno-error=strict-prototypes
)
# Flashing
family_add_bin_hex(${TARGET})
family_flash_jlink(${TARGET})
family_flash_openocd_adi(${TARGET})
# Add the optional MSDK OpenOCD flashing
family_flash_msdk(${TARGET})
endfunction()
function(family_flash_msdk TARGET)
# Prepare the image (signed) if the board requires it
prepare_image(${TARGET})
set(MAXIM_PATH "$ENV{MAXIM_PATH}")
add_custom_target(${TARGET}-msdk
DEPENDS ${TARGET}
COMMAND ${MAXIM_PATH}/Tools/OpenOCD/openocd -s ${MAXIM_PATH}/Tools/OpenOCD/scripts
-f interface/cmsis-dap.cfg -f target/max32650.cfg
-c "program $<TARGET_FILE:${TARGET}> verify; init; reset; exit"
VERBATIM
)
endfunction()

140
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@@ -1,140 +0,0 @@
DEPS_SUBMODULES += lib/CMSIS_5 hw/mcu/analog/max32
# Important locations in the hw support for MCU
MAX32_CMSIS = hw/mcu/analog/max32/Libraries/CMSIS
MAX32_PERIPH = hw/mcu/analog/max32/Libraries/PeriphDrivers
# Add any board specific make rules
include $(TOP)/$(BOARD_PATH)/board.mk
CPU_CORE ?= cortex-m4
PORT ?= 0
# GCC
SRC_S_GCC += $(MAX32_CMSIS)/Device/Maxim/MAX32650/Source/GCC/startup_max32650.S
# --------------
# Compiler Flags
# --------------
# Flags for the MAX32650/1/2 SDK
CFLAGS += -DTARGET=MAX32650 \
-DTARGET_REV=0x4131 \
-DMXC_ASSERT_ENABLE \
-DMAX32650 \
-DIAR_PRAGMAS=0
# Flags for TUSB features
CFLAGS += \
-DCFG_TUSB_MCU=OPT_MCU_MAX32650 \
-DBOARD_TUD_MAX_SPEED=OPT_MODE_HIGH_SPEED
# mcu driver cause following warnings
CFLAGS += -Wno-error=strict-prototypes \
-Wno-error=unused-parameter \
-Wno-error=cast-align \
-Wno-error=cast-qual \
-Wno-error=sign-compare
LDFLAGS_GCC += -nostartfiles --specs=nosys.specs --specs=nano.specs
# Configure the flash rule. By default, use JLink.
SIGNED_BUILD ?= 0
DEFAULT_FLASH = flash-jlink
# If the applications needs to be signed (for the MAX32651), sign it first and
# then need to use MSDK's OpenOCD to flash it
# Also need to include the __SLA_FWK__ define to enable the signed header into
# memory
ifeq ($(SIGNED_BUILD), 1)
# Extra definitions to build for the secure part
CFLAGS += -D__SLA_FWK__
DEFAULT_FLASH := sign-build flash-msdk
endif
# For flash-jlink target
JLINK_DEVICE = max32650
# Configure the flash rule
flash: $(DEFAULT_FLASH)
# -----------------
# Sources & Include
# -----------------
PERIPH_SRC = $(TOP)/$(MAX32_PERIPH)/Source
SRC_C += \
src/portable/mentor/musb/dcd_musb.c \
$(MAX32_CMSIS)/Device/Maxim/MAX32650/Source/heap.c \
$(MAX32_CMSIS)/Device/Maxim/MAX32650/Source/system_max32650.c \
$(MAX32_CMSIS)/Device/Maxim/MAX32650/Source/header_MAX32650.c \
$(PERIPH_SRC)/SYS/mxc_assert.c \
$(PERIPH_SRC)/SYS/mxc_delay.c \
$(PERIPH_SRC)/SYS/mxc_lock.c \
$(PERIPH_SRC)/SYS/nvic_table.c \
$(PERIPH_SRC)/SYS/pins_me10.c \
$(PERIPH_SRC)/SYS/sys_me10.c \
$(PERIPH_SRC)/FLC/flc_common.c \
$(PERIPH_SRC)/FLC/flc_me10.c \
$(PERIPH_SRC)/FLC/flc_reva.c \
$(PERIPH_SRC)/GPIO/gpio_common.c \
$(PERIPH_SRC)/GPIO/gpio_me10.c \
$(PERIPH_SRC)/GPIO/gpio_reva.c \
$(PERIPH_SRC)/ICC/icc_me10.c \
$(PERIPH_SRC)/ICC/icc_reva.c \
$(PERIPH_SRC)/ICC/icc_common.c \
$(PERIPH_SRC)/TPU/tpu_me10.c \
$(PERIPH_SRC)/TPU/tpu_reva.c \
$(PERIPH_SRC)/UART/uart_common.c \
$(PERIPH_SRC)/UART/uart_me10.c \
$(PERIPH_SRC)/UART/uart_reva.c \
INC += \
$(TOP)/$(BOARD_PATH) \
$(TOP)/$(MAX32_CMSIS)/Include \
$(TOP)/$(MAX32_CMSIS)/Device/Maxim/MAX32650/Include \
$(TOP)/$(MAX32_PERIPH)/Include/MAX32650 \
$(PERIPH_SRC)/SYS \
$(PERIPH_SRC)/GPIO \
$(PERIPH_SRC)/ICC \
$(PERIPH_SRC)/FLC \
$(PERIPH_SRC)/TPU \
$(PERIPH_SRC)/UART
# The MAX32651EVKIT is pin for pin identical to the MAX32650EVKIT, however the
# MAX32651 has a secure bootloader which requires the image to be signed before
# loading into flash. All MAX32651EVKIT's have the same key for evaluation
# purposes, so create a special flash rule to sign the binary and flash using
# the MSDK.
MCU_PATH = $(TOP)/hw/mcu/analog/max32/
# Assume no extension for sign utility
SIGN_EXE = sign_app
ifeq ($(OS), Windows_NT)
# Must use .exe extension on Windows, since the binaries
# for Linux may live in the same place.
SIGN_EXE := sign_app.exe
else
UNAME = $(shell uname -s)
ifneq ($(findstring MSYS_NT,$(UNAME)),)
# Must also use .exe extension for MSYS2
SIGN_EXE := sign_app.exe
endif
endif
# Rule to sign the build. This will in-place modify the existing .elf file
# an populate the .sig section with the signature value
sign-build: $(BUILD)/$(PROJECT).elf
$(OBJCOPY) $(BUILD)/$(PROJECT).elf -R .sig -O binary $(BUILD)/$(PROJECT).bin
$(MCU_PATH)/Tools/SBT/bin/$(SIGN_EXE) -c MAX32651 \
key_file="$(MCU_PATH)/Tools/SBT/devices/MAX32651/keys/maximtestcrk.key" \
ca=$(BUILD)/$(PROJECT).bin sca=$(BUILD)/$(PROJECT).sbin
$(OBJCOPY) $(BUILD)/$(PROJECT).elf --update-section .sig=$(BUILD)/$(PROJECT).sig
# Optional flash option when running within an installed MSDK to use OpenOCD
# Mainline OpenOCD does not yet have the MAX32's flash algorithm integrated.
# If the MSDK is installed, flash-msdk can be run to utilize the the modified
# openocd with the algorithms
MAXIM_PATH := $(subst \,/,$(MAXIM_PATH))
flash-msdk: $(BUILD)/$(PROJECT).elf
$(MAXIM_PATH)/Tools/OpenOCD/openocd -s $(MAXIM_PATH)/Tools/OpenOCD/scripts \
-f interface/cmsis-dap.cfg -f target/max32650.cfg \
-c "program $(BUILD)/$(PROJECT).elf verify; init; reset; exit"

149
hw/bsp/max32666/FreeRTOSConfig/FreeRTOSConfig.h
View File

@@ -1,149 +0,0 @@
/*
* FreeRTOS Kernel V10.0.0
* Copyright (C) 2017 Amazon.com, Inc. or its affiliates. All Rights Reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a copy of
* this software and associated documentation files (the "Software"), to deal in
* the Software without restriction, including without limitation the rights to
* use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
* the Software, and to permit persons to whom the Software is furnished to do so,
* subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in all
* copies or substantial portions of the Software. If you wish to use our Amazon
* FreeRTOS name, please do so in a fair use way that does not cause confusion.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
* FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
* COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
* IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
*
* http://www.FreeRTOS.org
* http://aws.amazon.com/freertos
*
* 1 tab == 4 spaces!
*/
#ifndef FREERTOS_CONFIG_H
#define FREERTOS_CONFIG_H
/*-----------------------------------------------------------
* Application specific definitions.
*
* These definitions should be adjusted for your particular hardware and
* application requirements.
*
* THESE PARAMETERS ARE DESCRIBED WITHIN THE 'CONFIGURATION' SECTION OF THE
* FreeRTOS API DOCUMENTATION AVAILABLE ON THE FreeRTOS.org WEB SITE.
*
* See http://www.freertos.org/a00110.html.
*----------------------------------------------------------*/
// skip if included from IAR assembler
#ifndef __IASMARM__
#include "mxc_device.h"
#endif
/* Cortex M23/M33 port configuration. */
#define configENABLE_MPU 0
#define configENABLE_FPU 1
#define configENABLE_TRUSTZONE 0
#define configMINIMAL_SECURE_STACK_SIZE (1024)
#define configUSE_PREEMPTION 1
#define configUSE_PORT_OPTIMISED_TASK_SELECTION 0
#define configCPU_CLOCK_HZ SystemCoreClock
#define configTICK_RATE_HZ ( 1000 )
#define configMAX_PRIORITIES ( 5 )
#define configMINIMAL_STACK_SIZE ( 128 )
#define configTOTAL_HEAP_SIZE ( configSUPPORT_DYNAMIC_ALLOCATION*4*1024 )
#define configMAX_TASK_NAME_LEN 16
#define configUSE_16_BIT_TICKS 0
#define configIDLE_SHOULD_YIELD 1
#define configUSE_MUTEXES 1
#define configUSE_RECURSIVE_MUTEXES 1
#define configUSE_COUNTING_SEMAPHORES 1
#define configQUEUE_REGISTRY_SIZE 4
#define configUSE_QUEUE_SETS 0
#define configUSE_TIME_SLICING 0
#define configUSE_NEWLIB_REENTRANT 0
#define configENABLE_BACKWARD_COMPATIBILITY 1
#define configSTACK_ALLOCATION_FROM_SEPARATE_HEAP 0
#define configSUPPORT_STATIC_ALLOCATION 1
#define configSUPPORT_DYNAMIC_ALLOCATION 0
/* Hook function related definitions. */
#define configUSE_IDLE_HOOK 0
#define configUSE_TICK_HOOK 0
#define configUSE_MALLOC_FAILED_HOOK 0 // cause nested extern warning
#define configCHECK_FOR_STACK_OVERFLOW 2
#define configCHECK_HANDLER_INSTALLATION 0
/* Run time and task stats gathering related definitions. */
#define configGENERATE_RUN_TIME_STATS 0
#define configRECORD_STACK_HIGH_ADDRESS 1
#define configUSE_TRACE_FACILITY 1 // legacy trace
#define configUSE_STATS_FORMATTING_FUNCTIONS 0
/* Co-routine definitions. */
#define configUSE_CO_ROUTINES 0
#define configMAX_CO_ROUTINE_PRIORITIES 2
/* Software timer related definitions. */
#define configUSE_TIMERS 1
#define configTIMER_TASK_PRIORITY (configMAX_PRIORITIES-2)
#define configTIMER_QUEUE_LENGTH 32
#define configTIMER_TASK_STACK_DEPTH configMINIMAL_STACK_SIZE
/* Optional functions - most linkers will remove unused functions anyway. */
#define INCLUDE_vTaskPrioritySet 0
#define INCLUDE_uxTaskPriorityGet 0
#define INCLUDE_vTaskDelete 0
#define INCLUDE_vTaskSuspend 1 // required for queue, semaphore, mutex to be blocked indefinitely with portMAX_DELAY
#define INCLUDE_xResumeFromISR 0
#define INCLUDE_vTaskDelayUntil 1
#define INCLUDE_vTaskDelay 1
#define INCLUDE_xTaskGetSchedulerState 0
#define INCLUDE_xTaskGetCurrentTaskHandle 1
#define INCLUDE_uxTaskGetStackHighWaterMark 0
#define INCLUDE_xTaskGetIdleTaskHandle 0
#define INCLUDE_xTimerGetTimerDaemonTaskHandle 0
#define INCLUDE_pcTaskGetTaskName 0
#define INCLUDE_eTaskGetState 0
#define INCLUDE_xEventGroupSetBitFromISR 0
#define INCLUDE_xTimerPendFunctionCall 0
/* FreeRTOS hooks to NVIC vectors */
#define xPortPendSVHandler PendSV_Handler
#define xPortSysTickHandler SysTick_Handler
#define vPortSVCHandler SVC_Handler
//--------------------------------------------------------------------+
// Interrupt nesting behavior configuration.
//--------------------------------------------------------------------+
// For Cortex-M specific: __NVIC_PRIO_BITS is defined in mcu header
#define configPRIO_BITS __NVIC_PRIO_BITS
/* The lowest interrupt priority that can be used in a call to a "set priority" function. */
#define configLIBRARY_LOWEST_INTERRUPT_PRIORITY ((1<<configPRIO_BITS) - 1)
/* The highest interrupt priority that can be used by any interrupt service
routine that makes calls to interrupt safe FreeRTOS API functions. DO NOT CALL
INTERRUPT SAFE FREERTOS API FUNCTIONS FROM ANY INTERRUPT THAT HAS A HIGHER
PRIORITY THAN THIS! (higher priorities are lower numeric values. */
#define configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY 2
/* Interrupt priorities used by the kernel port layer itself. These are generic
to all Cortex-M ports, and do not rely on any particular library functions. */
#define configKERNEL_INTERRUPT_PRIORITY ( configLIBRARY_LOWEST_INTERRUPT_PRIORITY << (8 - configPRIO_BITS) )
/* !!!! configMAX_SYSCALL_INTERRUPT_PRIORITY must not be set to zero !!!!
See http://www.FreeRTOS.org/RTOS-Cortex-M3-M4.html. */
#define configMAX_SYSCALL_INTERRUPT_PRIORITY ( configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY << (8 - configPRIO_BITS) )
#endif

32
hw/bsp/max32666/README.md
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@@ -1,32 +0,0 @@
# Analog Devices MAX32665/6
This BSP is for working with the Analog Devices
[MAX32665](https://www.analog.com/en/products/max32665.html) and
[MAX32666](https://www.analog.com/en/products/max32666.html) microcontrollers.
The following boards are supported:
* [MAX32666EVKIT](https://www.analog.com/en/resources/evaluation-hardware-and-software/evaluation-boards-kits/max32666evkit.html)
* [MAX32666FTHR](https://www.analog.com/en/resources/evaluation-hardware-and-software/evaluation-boards-kits/max32666fthr.html)
This part family leverages the Maxim Microcontrollers SDK (MSDK) for the device
interfaces and hardware abstraction layers. This source code package is fetched
as part of the get-deps script.
The microcontrollers utilize the standard GNU ARM toolchain. If this toolchain
is not already available on your build machine, it can be installed by using the
bundled MSDK installation. Details on downloading and installing can be found
in the [User's Guide](https://analogdevicesinc.github.io/msdk//USERGUIDE/).
## Flashing
The default flashing behavior in this BSP is to utilize JLink. This can be done
by running the `flash` or `flash-jlink` rule for Makefiles, or the
`<target>-jlink` target for CMake.
Both the Evaluation Kit and Feather boards are shipped with a CMSIS-DAP
compatible debug probe. However, at the time of writing, the necessary flashing
algorithms for OpenOCD have not yet been incorporated into the OpenOCD master
branch. To utilize the provided debug probes, please install the bundled MSDK
package which includes the appropriate OpenOCD modifications. To leverage this
OpenOCD instance, run the `flash-msdk` Makefile rule, or `<target>-msdk` CMake
target.

1
hw/bsp/max32666/boards/max32666evkit/board.cmake
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@@ -1 +0,0 @@
# Nothing to be done at the board level

1
hw/bsp/max32666/boards/max32666evkit/board.mk
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@@ -1 +0,0 @@
# No specific build requirements for the board.

1
hw/bsp/max32666/boards/max32666fthr/board.cmake
View File

@@ -1 +0,0 @@
# Nothing to be done at the board level

1
hw/bsp/max32666/boards/max32666fthr/board.mk
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@@ -1 +0,0 @@
# No specific build requirements for the board.

147
hw/bsp/max32666/family.cmake
View File

@@ -1,147 +0,0 @@
include_guard()
set(MAX32_PERIPH ${TOP}/hw/mcu/analog/max32/Libraries/PeriphDrivers)
set(MAX32_CMSIS ${TOP}/hw/mcu/analog/max32/Libraries/CMSIS)
set(CMSIS_5 ${TOP}/lib/CMSIS_5)
# include board specific
include(${CMAKE_CURRENT_LIST_DIR}/boards/${BOARD}/board.cmake)
# Get the linker file from current location (family)
set(LD_FILE_GNU ${CMAKE_CURRENT_LIST_DIR}/max32666.ld)
set(LD_FILE_Clang ${LD_FILE_GNU})
# toolchain set up
set(CMAKE_SYSTEM_CPU cortex-m4 CACHE INTERNAL "System Processor")
set(CMAKE_TOOLCHAIN_FILE ${TOP}/examples/build_system/cmake/toolchain/arm_${TOOLCHAIN}.cmake)
set(JLINK_DEVICE max32666)
set(OPENOCD_OPTION "-f interface/cmsis-dap.cfg -f target/max32665.cfg")
set(FAMILY_MCUS MAX32666 CACHE INTERNAL "")
function(update_board TARGET)
target_compile_definitions(${TARGET} PUBLIC
TARGET=MAX32665
TARGET_REV=0x4131
MXC_ASSERT_ENABLE
MAX32665
IAR_PRAGMAS=0
CFG_TUSB_MCU=OPT_MCU_MAX32666
BOARD_TUD_MAX_SPEED=OPT_MODE_HIGH_SPEED
)
endfunction()
#------------------------------------
# BOARD_TARGET
#------------------------------------
# only need to be built ONCE for all examples
function(add_board_target BOARD_TARGET)
if (TARGET ${BOARD_TARGET})
return()
endif ()
# Startup & Linker script
set(STARTUP_FILE_GNU ${MAX32_CMSIS}/Device/Maxim/MAX32665/Source/GCC/startup_max32665.S)
set(STARTUP_FILE_Clang ${STARTUP_FILE_GNU})
set(PERIPH_SRC ${MAX32_PERIPH}/Source)
add_library(${BOARD_TARGET} STATIC
${MAX32_CMSIS}/Device/Maxim/MAX32665/Source/heap.c
${MAX32_CMSIS}/Device/Maxim/MAX32665/Source/system_max32665.c
${PERIPH_SRC}/SYS/mxc_assert.c
${PERIPH_SRC}/SYS/mxc_delay.c
${PERIPH_SRC}/SYS/mxc_lock.c
${PERIPH_SRC}/SYS/nvic_table.c
${PERIPH_SRC}/SYS/pins_me14.c
${PERIPH_SRC}/SYS/sys_me14.c
${PERIPH_SRC}/TPU/tpu_me14.c
${PERIPH_SRC}/TPU/tpu_reva.c
${PERIPH_SRC}/FLC/flc_common.c
${PERIPH_SRC}/FLC/flc_me14.c
${PERIPH_SRC}/FLC/flc_reva.c
${PERIPH_SRC}/GPIO/gpio_common.c
${PERIPH_SRC}/GPIO/gpio_me14.c
${PERIPH_SRC}/GPIO/gpio_reva.c
${PERIPH_SRC}/ICC/icc_me14.c
${PERIPH_SRC}/ICC/icc_reva.c
${PERIPH_SRC}/UART/uart_common.c
${PERIPH_SRC}/UART/uart_me14.c
${PERIPH_SRC}/UART/uart_reva.c
${STARTUP_FILE_${CMAKE_C_COMPILER_ID}}
)
target_include_directories(${BOARD_TARGET} PUBLIC
${CMAKE_CURRENT_FUNCTION_LIST_DIR}
${MAX32_CMSIS}/Include
${MAX32_CMSIS}/Device/Maxim/MAX32665/Include
${MAX32_PERIPH}/Include/MAX32665
${PERIPH_SRC}/SYS
${PERIPH_SRC}/GPIO
${PERIPH_SRC}/TPU
${PERIPH_SRC}/ICC
${PERIPH_SRC}/FLC
${PERIPH_SRC}/UART
)
target_compile_options(${BOARD_TARGET} PRIVATE
-Wno-error=strict-prototypes
)
update_board(${BOARD_TARGET})
if (CMAKE_C_COMPILER_ID STREQUAL "GNU")
target_link_options(${BOARD_TARGET} PUBLIC
"LINKER:--script=${LD_FILE_GNU}"
-nostartfiles
--specs=nosys.specs --specs=nano.specs
)
elseif (CMAKE_C_COMPILER_ID STREQUAL "Clang")
target_link_options(${BOARD_TARGET} PUBLIC
"LINKER:--script=${LD_FILE_Clang}"
)
endif ()
endfunction()
#------------------------------------
# Functions
#------------------------------------
function(family_configure_example TARGET RTOS)
family_configure_common(${TARGET} ${RTOS})
# Board target
add_board_target(board_${BOARD})
#---------- Port Specific ----------
# These files are built for each example since it depends on example's tusb_config.h
target_sources(${TARGET} PUBLIC
# BSP
${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c
${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../board.c
)
target_include_directories(${TARGET} PUBLIC
# family, hw, board
${CMAKE_CURRENT_FUNCTION_LIST_DIR}
${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../../
${CMAKE_CURRENT_FUNCTION_LIST_DIR}/boards/${BOARD}
)
# Add TinyUSB target and port source
family_add_tinyusb(${TARGET} OPT_MCU_MAX32666)
target_sources(${TARGET} PUBLIC
${TOP}/src/portable/mentor/musb/dcd_musb.c
)
target_compile_options(${TARGET} PRIVATE
-Wno-error=strict-prototypes
)
target_link_libraries(${TARGET} PUBLIC board_${BOARD})
target_compile_options(${TARGET} PRIVATE
-Wno-error=strict-prototypes
)
# Flashing
family_add_bin_hex(${TARGET})
family_flash_jlink(${TARGET})
family_flash_openocd_adi(${TARGET})
endfunction()

93
hw/bsp/max32666/family.mk
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@@ -1,93 +0,0 @@
DEPS_SUBMODULES += lib/CMSIS_5 hw/mcu/analog/max32
# Important locations in the hw support for MCU
MAX32_CMSIS = hw/mcu/analog/max32/Libraries/CMSIS
MAX32_PERIPH = hw/mcu/analog/max32/Libraries/PeriphDrivers
# Add any board specific make rules
include $(TOP)/$(BOARD_PATH)/board.mk
CPU_CORE ?= cortex-m4
PORT ?= 0
# GCC
SRC_S_GCC += $(MAX32_CMSIS)/Device/Maxim/MAX32665/Source/GCC/startup_max32665.S
LD_FILE = $(FAMILY_PATH)/max32666.ld
# --------------
# Compiler Flags
# --------------
# Flags for the MAX32665/6 SDK
CFLAGS += -DTARGET=MAX32665 \
-DTARGET_REV=0x4131 \
-DMXC_ASSERT_ENABLE \
-DMAX32665 \
-DIAR_PRAGMAS=0
# Flags for TUSB features
CFLAGS += \
-DCFG_TUSB_MCU=OPT_MCU_MAX32666 \
-DBOARD_TUD_MAX_SPEED=OPT_MODE_HIGH_SPEED
# mcu driver cause following warnings
CFLAGS += -Wno-error=strict-prototypes \
-Wno-error=unused-parameter \
-Wno-error=cast-align \
-Wno-error=cast-qual
LDFLAGS_GCC += -nostartfiles --specs=nosys.specs --specs=nano.specs
# For flash-jlink target
JLINK_DEVICE = max32666
# flash target using Jlink by default
flash: flash-jlink
# Optional flash option when running within an installed MSDK to use OpenOCD
# Mainline OpenOCD does not yet have the MAX32's flash algorithm integrated.
# If the MSDK is installed, flash-msdk can be run to utilize the the modified
# openocd with the algorithms
MAXIM_PATH := $(subst \,/,$(MAXIM_PATH))
flash-msdk: $(BUILD)/$(PROJECT).elf
$(MAXIM_PATH)/Tools/OpenOCD/openocd -s $(MAXIM_PATH)/Tools/OpenOCD/scripts \
-f interface/cmsis-dap.cfg -f target/max32665.cfg \
-c "program $(BUILD)/$(PROJECT).elf verify; init; reset; exit"
# -----------------
# Sources & Include
# -----------------
PERIPH_SRC = $(TOP)/$(MAX32_PERIPH)/Source
SRC_C += \
src/portable/mentor/musb/dcd_musb.c \
$(MAX32_CMSIS)/Device/Maxim/MAX32665/Source/heap.c \
$(MAX32_CMSIS)/Device/Maxim/MAX32665/Source/system_max32665.c \
$(PERIPH_SRC)/SYS/mxc_assert.c \
$(PERIPH_SRC)/SYS/mxc_delay.c \
$(PERIPH_SRC)/SYS/mxc_lock.c \
$(PERIPH_SRC)/SYS/nvic_table.c \
$(PERIPH_SRC)/SYS/pins_me14.c \
$(PERIPH_SRC)/SYS/sys_me14.c \
$(PERIPH_SRC)/FLC/flc_common.c \
$(PERIPH_SRC)/FLC/flc_me14.c \
$(PERIPH_SRC)/FLC/flc_reva.c \
$(PERIPH_SRC)/GPIO/gpio_common.c \
$(PERIPH_SRC)/GPIO/gpio_me14.c \
$(PERIPH_SRC)/GPIO/gpio_reva.c \
$(PERIPH_SRC)/ICC/icc_me14.c \
$(PERIPH_SRC)/ICC/icc_reva.c \
$(PERIPH_SRC)/TPU/tpu_me14.c \
$(PERIPH_SRC)/TPU/tpu_reva.c \
$(PERIPH_SRC)/UART/uart_common.c \
$(PERIPH_SRC)/UART/uart_me14.c \
$(PERIPH_SRC)/UART/uart_reva.c \
INC += \
$(TOP)/$(BOARD_PATH) \
$(TOP)/$(MAX32_CMSIS)/Include \
$(TOP)/$(MAX32_CMSIS)/Device/Maxim/MAX32665/Include \
$(TOP)/$(MAX32_PERIPH)/Include/MAX32665 \
$(PERIPH_SRC)/SYS \
$(PERIPH_SRC)/GPIO \
$(PERIPH_SRC)/ICC \
$(PERIPH_SRC)/FLC \
$(PERIPH_SRC)/TPU \
$(PERIPH_SRC)/UART

149
hw/bsp/max32690/FreeRTOSConfig/FreeRTOSConfig.h
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@@ -1,149 +0,0 @@
/*
* FreeRTOS Kernel V10.0.0
* Copyright (C) 2017 Amazon.com, Inc. or its affiliates. All Rights Reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a copy of
* this software and associated documentation files (the "Software"), to deal in
* the Software without restriction, including without limitation the rights to
* use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
* the Software, and to permit persons to whom the Software is furnished to do so,
* subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in all
* copies or substantial portions of the Software. If you wish to use our Amazon
* FreeRTOS name, please do so in a fair use way that does not cause confusion.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
* FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
* COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
* IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
*
* http://www.FreeRTOS.org
* http://aws.amazon.com/freertos
*
* 1 tab == 4 spaces!
*/
#ifndef FREERTOS_CONFIG_H
#define FREERTOS_CONFIG_H
/*-----------------------------------------------------------
* Application specific definitions.
*
* These definitions should be adjusted for your particular hardware and
* application requirements.
*
* THESE PARAMETERS ARE DESCRIBED WITHIN THE 'CONFIGURATION' SECTION OF THE
* FreeRTOS API DOCUMENTATION AVAILABLE ON THE FreeRTOS.org WEB SITE.
*
* See http://www.freertos.org/a00110.html.
*----------------------------------------------------------*/
// skip if included from IAR assembler
#ifndef __IASMARM__
#include "mxc_device.h"
#endif
/* Cortex M23/M33 port configuration. */
#define configENABLE_MPU 0
#define configENABLE_FPU 1
#define configENABLE_TRUSTZONE 0
#define configMINIMAL_SECURE_STACK_SIZE (1024)
#define configUSE_PREEMPTION 1
#define configUSE_PORT_OPTIMISED_TASK_SELECTION 0
#define configCPU_CLOCK_HZ SystemCoreClock
#define configTICK_RATE_HZ ( 1000 )
#define configMAX_PRIORITIES ( 5 )
#define configMINIMAL_STACK_SIZE ( 128 )
#define configTOTAL_HEAP_SIZE ( configSUPPORT_DYNAMIC_ALLOCATION*4*1024 )
#define configMAX_TASK_NAME_LEN 16
#define configUSE_16_BIT_TICKS 0
#define configIDLE_SHOULD_YIELD 1
#define configUSE_MUTEXES 1
#define configUSE_RECURSIVE_MUTEXES 1
#define configUSE_COUNTING_SEMAPHORES 1
#define configQUEUE_REGISTRY_SIZE 4
#define configUSE_QUEUE_SETS 0
#define configUSE_TIME_SLICING 0
#define configUSE_NEWLIB_REENTRANT 0
#define configENABLE_BACKWARD_COMPATIBILITY 1
#define configSTACK_ALLOCATION_FROM_SEPARATE_HEAP 0
#define configSUPPORT_STATIC_ALLOCATION 1
#define configSUPPORT_DYNAMIC_ALLOCATION 0
/* Hook function related definitions. */
#define configUSE_IDLE_HOOK 0
#define configUSE_TICK_HOOK 0
#define configUSE_MALLOC_FAILED_HOOK 0 // cause nested extern warning
#define configCHECK_FOR_STACK_OVERFLOW 2
#define configCHECK_HANDLER_INSTALLATION 0
/* Run time and task stats gathering related definitions. */
#define configGENERATE_RUN_TIME_STATS 0
#define configRECORD_STACK_HIGH_ADDRESS 1
#define configUSE_TRACE_FACILITY 1 // legacy trace
#define configUSE_STATS_FORMATTING_FUNCTIONS 0
/* Co-routine definitions. */
#define configUSE_CO_ROUTINES 0
#define configMAX_CO_ROUTINE_PRIORITIES 2
/* Software timer related definitions. */
#define configUSE_TIMERS 1
#define configTIMER_TASK_PRIORITY (configMAX_PRIORITIES-2)
#define configTIMER_QUEUE_LENGTH 32
#define configTIMER_TASK_STACK_DEPTH configMINIMAL_STACK_SIZE
/* Optional functions - most linkers will remove unused functions anyway. */
#define INCLUDE_vTaskPrioritySet 0
#define INCLUDE_uxTaskPriorityGet 0
#define INCLUDE_vTaskDelete 0
#define INCLUDE_vTaskSuspend 1 // required for queue, semaphore, mutex to be blocked indefinitely with portMAX_DELAY
#define INCLUDE_xResumeFromISR 0
#define INCLUDE_vTaskDelayUntil 1
#define INCLUDE_vTaskDelay 1
#define INCLUDE_xTaskGetSchedulerState 0
#define INCLUDE_xTaskGetCurrentTaskHandle 1
#define INCLUDE_uxTaskGetStackHighWaterMark 0
#define INCLUDE_xTaskGetIdleTaskHandle 0
#define INCLUDE_xTimerGetTimerDaemonTaskHandle 0
#define INCLUDE_pcTaskGetTaskName 0
#define INCLUDE_eTaskGetState 0
#define INCLUDE_xEventGroupSetBitFromISR 0
#define INCLUDE_xTimerPendFunctionCall 0
/* FreeRTOS hooks to NVIC vectors */
#define xPortPendSVHandler PendSV_Handler
#define xPortSysTickHandler SysTick_Handler
#define vPortSVCHandler SVC_Handler
//--------------------------------------------------------------------+
// Interrupt nesting behavior configuration.
//--------------------------------------------------------------------+
// For Cortex-M specific: __NVIC_PRIO_BITS is defined in mcu header
#define configPRIO_BITS __NVIC_PRIO_BITS
/* The lowest interrupt priority that can be used in a call to a "set priority" function. */
#define configLIBRARY_LOWEST_INTERRUPT_PRIORITY ((1<<configPRIO_BITS) - 1)
/* The highest interrupt priority that can be used by any interrupt service
routine that makes calls to interrupt safe FreeRTOS API functions. DO NOT CALL
INTERRUPT SAFE FREERTOS API FUNCTIONS FROM ANY INTERRUPT THAT HAS A HIGHER
PRIORITY THAN THIS! (higher priorities are lower numeric values. */
#define configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY 2
/* Interrupt priorities used by the kernel port layer itself. These are generic
to all Cortex-M ports, and do not rely on any particular library functions. */
#define configKERNEL_INTERRUPT_PRIORITY ( configLIBRARY_LOWEST_INTERRUPT_PRIORITY << (8 - configPRIO_BITS) )
/* !!!! configMAX_SYSCALL_INTERRUPT_PRIORITY must not be set to zero !!!!
See http://www.FreeRTOS.org/RTOS-Cortex-M3-M4.html. */
#define configMAX_SYSCALL_INTERRUPT_PRIORITY ( configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY << (8 - configPRIO_BITS) )
#endif

31
hw/bsp/max32690/README.md
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@@ -1,31 +0,0 @@
# Analog Devices MAX32690
This BSP is for working with the Analog Devices
[MAX32690](https://www.analog.com/en/products/max32690.html) microcontroller.
The following boards are supported:
* [MAX32690EVKIT](https://www.analog.com/en/resources/evaluation-hardware-and-software/evaluation-boards-kits/max32690evkit.html)
* [AD-APARD32690-SL](https://www.analog.com/en/resources/evaluation-hardware-and-software/evaluation-boards-kits/ad-apard32690-sl.html)
This part family leverages the Maxim Microcontrollers SDK (MSDK) for the device
interfaces and hardware abstraction layers. This source code package is fetched
as part of the get-deps script.
The microcontroller utilizes the standard GNU ARM toolchain. If this toolchain
is not already available on your build machine, it can be installed by using the
bundled MSDK installation. Details on downloading and installing can be found
in the [User's Guide](https://analogdevicesinc.github.io/msdk//USERGUIDE/).
## Flashing
The default flashing behavior in this BSP is to utilize JLink. This can be done
by running the `flash` or `flash-jlink` rule for Makefiles, or the
`<target>-jlink` target for CMake.
Both the Evaluation Kit and APARD boards are shipped with a CMSIS-DAP
compatible debug probe. However, at the time of writing, the necessary flashing
algorithms for OpenOCD have not yet been incorporated into the OpenOCD master
branch. To utilize the provided debug probes, please install the bundled MSDK
package which includes the appropriate OpenOCD modifications. To leverage this
OpenOCD instance, run the `flash-msdk` Makefile rule, or `<target>-msdk` CMake
target.

1
hw/bsp/max32690/boards/apard32690/board.cmake
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# Nothing to be done at the board level

1
hw/bsp/max32690/boards/apard32690/board.mk
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@@ -1 +0,0 @@
# No specific build requirements for the board.

1
hw/bsp/max32690/boards/max32690evkit/board.cmake
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@@ -1 +0,0 @@
# Nothing to be done at the board level

1
hw/bsp/max32690/boards/max32690evkit/board.mk
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# No specific build requirements for the board.

175
hw/bsp/max32690/family.c
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@@ -1,175 +0,0 @@
/*
* The MIT License (MIT)
*
* Copyright (c) 2024 Brent Kowal (Analog Devices, Inc)
*
* Permission is hereby granted, free of charge, to any person obtaining a copy
* of this software and associated documentation files (the "Software"), to deal
* in the Software without restriction, including without limitation the rights
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
* copies of the Software, and to permit persons to whom the Software is
* furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
* THE SOFTWARE.
*
* This file is part of the TinyUSB stack.
*/
/* metadata:
manufacturer: Analog Devices
*/
#ifdef __GNUC__
#pragma GCC diagnostic push
#pragma GCC diagnostic ignored "-Wstrict-prototypes" // _mxc_crit_get_state()
#endif
#include "gpio.h"
#include "mxc_sys.h"
#include "mcr_regs.h"
#include "mxc_device.h"
#include "uart.h"
#ifdef __GNUC__
#pragma GCC diagnostic pop
#endif
#include "board.h"
#include "bsp/board_api.h"
//--------------------------------------------------------------------+
// Forward USB interrupt events to TinyUSB IRQ Handler
//--------------------------------------------------------------------+
void USB_IRQHandler(void) {
tud_int_handler(0);
}
//--------------------------------------------------------------------+
// MACRO TYPEDEF CONSTANT ENUM
//--------------------------------------------------------------------+
mxc_uart_regs_t *ConsoleUart = MXC_UART_GET_UART(UART_NUM);
void board_init(void) {
#if CFG_TUSB_OS == OPT_OS_NONE
// 1ms tick timer
SysTick_Config(SystemCoreClock / 1000);
#elif CFG_TUSB_OS == OPT_OS_FREERTOS
// If freeRTOS is used, IRQ priority is limit by max syscall ( smaller is higher )
NVIC_SetPriority(USB_IRQn, configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY);
#endif
mxc_gpio_cfg_t gpioConfig;
// LED
gpioConfig.drvstr = MXC_GPIO_DRVSTR_0;
gpioConfig.func = MXC_GPIO_FUNC_OUT;
gpioConfig.mask = LED_PIN;
gpioConfig.pad = MXC_GPIO_PAD_NONE;
gpioConfig.port = LED_PORT;
gpioConfig.vssel = LED_VDDIO;
MXC_GPIO_Config(&gpioConfig);
board_led_write(false);
// Button
gpioConfig.drvstr = MXC_GPIO_DRVSTR_0;
gpioConfig.func = MXC_GPIO_FUNC_IN;
gpioConfig.mask = BUTTON_PIN;
gpioConfig.pad = BUTTON_PULL;
gpioConfig.port = BUTTON_PORT;
gpioConfig.vssel = MXC_GPIO_VSSEL_VDDIO;
MXC_GPIO_Config(&gpioConfig);
// UART
MXC_UART_Init(ConsoleUart, CFG_BOARD_UART_BAUDRATE, MXC_UART_IBRO_CLK);
//USB
MXC_SYS_ClockSourceEnable(MXC_SYS_CLOCK_IPO);
MXC_MCR->ldoctrl |= MXC_F_MCR_LDOCTRL_0P9EN;
MXC_SYS_ClockEnable(MXC_SYS_PERIPH_CLOCK_USB);
MXC_SYS_Reset_Periph(MXC_SYS_RESET0_USB);
}
//--------------------------------------------------------------------+
// Board porting API
//--------------------------------------------------------------------+
void board_led_write(bool state) {
#if LED_STATE_ON
state = !state;
#endif
if (state) {
MXC_GPIO_OutClr(LED_PORT, LED_PIN);
} else {
MXC_GPIO_OutSet(LED_PORT, LED_PIN);
}
}
uint32_t board_button_read(void) {
uint32_t state = MXC_GPIO_InGet(BUTTON_PORT, BUTTON_PIN) ? 1 : 0;
return BUTTON_STATE_ACTIVE == state;
}
size_t board_get_unique_id(uint8_t id[], size_t max_len) {
uint8_t hw_id[MXC_SYS_USN_CHECKSUM_LEN];//USN Buffer
/* All other 2nd parameter is optional checksum buffer */
MXC_SYS_GetUSN(hw_id, NULL);
size_t act_len = TU_MIN(max_len, MXC_SYS_USN_LEN);
memcpy(id, hw_id, act_len);
return act_len;
}
int board_uart_read(uint8_t *buf, int len) {
int uart_val;
int act_len = 0;
while (act_len < len) {
if ((uart_val = MXC_UART_ReadCharacterRaw(ConsoleUart)) == E_UNDERFLOW) {
break;
} else {
*buf++ = (uint8_t) uart_val;
act_len++;
}
}
return act_len;
}
int board_uart_write(void const *buf, int len) {
int act_len = 0;
const uint8_t *ch_ptr = (const uint8_t *) buf;
while (act_len < len) {
MXC_UART_WriteCharacter(ConsoleUart, *ch_ptr++);
act_len++;
}
return len;
}
#if CFG_TUSB_OS == OPT_OS_NONE
volatile uint32_t system_ticks = 0;
void SysTick_Handler(void) {
system_ticks++;
}
uint32_t board_millis(void) {
return system_ticks;
}
#endif
void HardFault_Handler(void) {
__asm("BKPT #0\n");
}
// Required by __libc_init_array in startup code if we are compiling using
// -nostdlib/-nostartfiles.
void _init(void) {
}

152
hw/bsp/max32690/family.cmake
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@@ -1,152 +0,0 @@
include_guard()
set(MAX32_PERIPH ${TOP}/hw/mcu/analog/max32/Libraries/PeriphDrivers)
set(MAX32_CMSIS ${TOP}/hw/mcu/analog/max32/Libraries/CMSIS)
set(CMSIS_5 ${TOP}/lib/CMSIS_5)
# include board specific
include(${CMAKE_CURRENT_LIST_DIR}/boards/${BOARD}/board.cmake)
# Get the linker file from current location (family)
set(LD_FILE_GNU ${CMAKE_CURRENT_LIST_DIR}/max32690.ld)
set(LD_FILE_Clang ${LD_FILE_GNU})
# toolchain set up
set(CMAKE_SYSTEM_CPU cortex-m4 CACHE INTERNAL "System Processor")
set(CMAKE_TOOLCHAIN_FILE ${TOP}/examples/build_system/cmake/toolchain/arm_${TOOLCHAIN}.cmake)
set(JLINK_DEVICE max32690)
set(OPENOCD_OPTION "-f interface/cmsis-dap.cfg -f target/max32690.cfg")
set(FAMILY_MCUS MAX32690 CACHE INTERNAL "")
function(update_board TARGET)
target_compile_definitions(${TARGET} PUBLIC
TARGET=MAX32690
TARGET_REV=0x4131
MXC_ASSERT_ENABLE
MAX32690
FLASH_ORIGIN=0x10000000
FLASH_SIZE=0x340000
SRAM_ORIGIN=0x20000000
SRAM_SIZE=0x100000
IAR_PRAGMAS=0
CFG_TUSB_MCU=OPT_MCU_MAX32690
BOARD_TUD_MAX_SPEED=OPT_MODE_HIGH_SPEED
)
endfunction()
#------------------------------------
# BOARD_TARGET
#------------------------------------
# only need to be built ONCE for all examples
function(add_board_target BOARD_TARGET)
if (TARGET ${BOARD_TARGET})
return()
endif ()
# Startup & Linker script
set(STARTUP_FILE_GNU ${MAX32_CMSIS}/Device/Maxim/MAX32690/Source/GCC/startup_max32690.S)
set(STARTUP_FILE_Clang ${STARTUP_FILE_GNU})
set(PERIPH_SRC ${MAX32_PERIPH}/Source)
add_library(${BOARD_TARGET} STATIC
${MAX32_CMSIS}/Device/Maxim/MAX32690/Source/heap.c
${MAX32_CMSIS}/Device/Maxim/MAX32690/Source/system_max32690.c
${PERIPH_SRC}/SYS/mxc_assert.c
${PERIPH_SRC}/SYS/mxc_delay.c
${PERIPH_SRC}/SYS/mxc_lock.c
${PERIPH_SRC}/SYS/nvic_table.c
${PERIPH_SRC}/SYS/pins_me18.c
${PERIPH_SRC}/SYS/sys_me18.c
${PERIPH_SRC}/CTB/ctb_me18.c
${PERIPH_SRC}/CTB/ctb_reva.c
${PERIPH_SRC}/CTB/ctb_common.c
${PERIPH_SRC}/FLC/flc_common.c
${PERIPH_SRC}/FLC/flc_me18.c
${PERIPH_SRC}/FLC/flc_reva.c
${PERIPH_SRC}/GPIO/gpio_common.c
${PERIPH_SRC}/GPIO/gpio_me18.c
${PERIPH_SRC}/GPIO/gpio_reva.c
${PERIPH_SRC}/ICC/icc_me18.c
${PERIPH_SRC}/ICC/icc_reva.c
${PERIPH_SRC}/UART/uart_common.c
${PERIPH_SRC}/UART/uart_me18.c
${PERIPH_SRC}/UART/uart_revb.c
${STARTUP_FILE_${CMAKE_C_COMPILER_ID}}
)
target_include_directories(${BOARD_TARGET} PUBLIC
${CMAKE_CURRENT_FUNCTION_LIST_DIR}
${MAX32_CMSIS}/Include
${MAX32_CMSIS}/Device/Maxim/MAX32690/Include
${MAX32_PERIPH}/Include/MAX32690
${PERIPH_SRC}/SYS
${PERIPH_SRC}/GPIO
${PERIPH_SRC}/CTB
${PERIPH_SRC}/ICC
${PERIPH_SRC}/FLC
${PERIPH_SRC}/UART
)
target_compile_options(${BOARD_TARGET} PRIVATE
-Wno-error=strict-prototypes
)
update_board(${BOARD_TARGET})
if (CMAKE_C_COMPILER_ID STREQUAL "GNU")
target_link_options(${BOARD_TARGET} PUBLIC
"LINKER:--script=${LD_FILE_GNU}"
-nostartfiles
--specs=nosys.specs --specs=nano.specs
)
elseif (CMAKE_C_COMPILER_ID STREQUAL "Clang")
target_link_options(${BOARD_TARGET} PUBLIC
"LINKER:--script=${LD_FILE_Clang}"
)
endif ()
endfunction()
#------------------------------------
# Functions
#------------------------------------
function(family_configure_example TARGET RTOS)
family_configure_common(${TARGET} ${RTOS})
# Board target
add_board_target(board_${BOARD})
#---------- Port Specific ----------
# These files are built for each example since it depends on example's tusb_config.h
target_sources(${TARGET} PUBLIC
# BSP
${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c
${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../board.c
)
target_include_directories(${TARGET} PUBLIC
# family, hw, board
${CMAKE_CURRENT_FUNCTION_LIST_DIR}
${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../../
${CMAKE_CURRENT_FUNCTION_LIST_DIR}/boards/${BOARD}
)
# Add TinyUSB target and port source
family_add_tinyusb(${TARGET} OPT_MCU_MAX32690)
target_sources(${TARGET} PUBLIC
${TOP}/src/portable/mentor/musb/dcd_musb.c
)
target_compile_options(${TARGET} PRIVATE
-Wno-error=strict-prototypes
)
target_link_libraries(${TARGET} PUBLIC board_${BOARD})
target_compile_options(${TARGET} PRIVATE
-Wno-error=strict-prototypes
)
# Flashing
family_add_bin_hex(${TARGET})
family_flash_jlink(${TARGET})
family_flash_openocd_adi(${TARGET})
endfunction()

101
hw/bsp/max32690/family.mk
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@@ -1,101 +0,0 @@
DEPS_SUBMODULES += lib/CMSIS_5 hw/mcu/analog/max32
# Important locations in the hw support for MCU
MAX32_CMSIS = hw/mcu/analog/max32/Libraries/CMSIS
MAX32_PERIPH = hw/mcu/analog/max32/Libraries/PeriphDrivers
# Add any board specific make rules
include $(TOP)/$(BOARD_PATH)/board.mk
CPU_CORE ?= cortex-m4
PORT ?= 0
# GCC
SRC_S_GCC += $(MAX32_CMSIS)/Device/Maxim/MAX32690/Source/GCC/startup_max32690.S
LD_FILE = $(FAMILY_PATH)/max32690.ld
# --------------
# Compiler Flags
# --------------
# Flags for the MAX32690 SDK
CFLAGS += -DTARGET=MAX32690 \
-DTARGET_REV=0x4131 \
-DMXC_ASSERT_ENABLE \
-DMAX32690 \
-DFLASH_ORIGIN=0x10000000 \
-DFLASH_SIZE=0x340000 \
-DSRAM_ORIGIN=0x20000000 \
-DSRAM_SIZE=0x100000 \
-DIAR_PRAGMAS=0
# Flags for TUSB features
CFLAGS += \
-DCFG_TUSB_MCU=OPT_MCU_MAX32690 \
-DBOARD_TUD_MAX_SPEED=OPT_MODE_HIGH_SPEED
# mcu driver cause following warnings
CFLAGS += -Wno-error=unused-parameter \
-Wno-error=strict-prototypes \
-Wno-error=old-style-declaration \
-Wno-error=sign-compare \
-Wno-error=cast-qual \
-Wno-lto-type-mismatch
LDFLAGS_GCC += -nostartfiles --specs=nosys.specs --specs=nano.specs
# For flash-jlink target
JLINK_DEVICE = max32690
# flash target using Jlink by default
flash: flash-jlink
# Optional flash option when running within an installed MSDK to use OpenOCD
# Mainline OpenOCD does not yet have the MAX32's flash algorithm integrated.
# If the MSDK is installed, flash-msdk can be run to utilize the the modified
# openocd with the algorithms
MAXIM_PATH := $(subst \,/,$(MAXIM_PATH))
flash-msdk: $(BUILD)/$(PROJECT).elf
$(MAXIM_PATH)/Tools/OpenOCD/openocd -s $(MAXIM_PATH)/Tools/OpenOCD/scripts \
-f interface/cmsis-dap.cfg -f target/max32690.cfg \
-c "program $(BUILD)/$(PROJECT).elf verify; init; reset; exit"
# -----------------
# Sources & Include
# -----------------
PERIPH_SRC = $(TOP)/$(MAX32_PERIPH)/Source
SRC_C += \
src/portable/mentor/musb/dcd_musb.c \
$(MAX32_CMSIS)/Device/Maxim/MAX32690/Source/heap.c \
$(MAX32_CMSIS)/Device/Maxim/MAX32690/Source/system_max32690.c \
$(PERIPH_SRC)/SYS/mxc_assert.c \
$(PERIPH_SRC)/SYS/mxc_delay.c \
$(PERIPH_SRC)/SYS/mxc_lock.c \
$(PERIPH_SRC)/SYS/nvic_table.c \
$(PERIPH_SRC)/SYS/pins_me18.c \
$(PERIPH_SRC)/SYS/sys_me18.c \
$(PERIPH_SRC)/CTB/ctb_me18.c \
$(PERIPH_SRC)/CTB/ctb_reva.c \
$(PERIPH_SRC)/CTB/ctb_common.c \
$(PERIPH_SRC)/FLC/flc_common.c \
$(PERIPH_SRC)/FLC/flc_me18.c \
$(PERIPH_SRC)/FLC/flc_reva.c \
$(PERIPH_SRC)/GPIO/gpio_common.c \
$(PERIPH_SRC)/GPIO/gpio_me18.c \
$(PERIPH_SRC)/GPIO/gpio_reva.c \
$(PERIPH_SRC)/ICC/icc_me18.c \
$(PERIPH_SRC)/ICC/icc_reva.c \
$(PERIPH_SRC)/UART/uart_common.c \
$(PERIPH_SRC)/UART/uart_me18.c \
$(PERIPH_SRC)/UART/uart_revb.c \
INC += \
$(TOP)/$(BOARD_PATH) \
$(TOP)/$(MAX32_CMSIS)/Include \
$(TOP)/$(MAX32_CMSIS)/Device/Maxim/MAX32690/Include \
$(TOP)/$(MAX32_PERIPH)/Include/MAX32690 \
$(PERIPH_SRC)/SYS \
$(PERIPH_SRC)/GPIO \
$(PERIPH_SRC)/CTB \
$(PERIPH_SRC)/ICC \
$(PERIPH_SRC)/FLC \
$(PERIPH_SRC)/UART

149
hw/bsp/max78002/FreeRTOSConfig/FreeRTOSConfig.h
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@@ -1,149 +0,0 @@
/*
* FreeRTOS Kernel V10.0.0
* Copyright (C) 2017 Amazon.com, Inc. or its affiliates. All Rights Reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a copy of
* this software and associated documentation files (the "Software"), to deal in
* the Software without restriction, including without limitation the rights to
* use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
* the Software, and to permit persons to whom the Software is furnished to do so,
* subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in all
* copies or substantial portions of the Software. If you wish to use our Amazon
* FreeRTOS name, please do so in a fair use way that does not cause confusion.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
* FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
* COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
* IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
*
* http://www.FreeRTOS.org
* http://aws.amazon.com/freertos
*
* 1 tab == 4 spaces!
*/
#ifndef FREERTOS_CONFIG_H
#define FREERTOS_CONFIG_H
/*-----------------------------------------------------------
* Application specific definitions.
*
* These definitions should be adjusted for your particular hardware and
* application requirements.
*
* THESE PARAMETERS ARE DESCRIBED WITHIN THE 'CONFIGURATION' SECTION OF THE
* FreeRTOS API DOCUMENTATION AVAILABLE ON THE FreeRTOS.org WEB SITE.
*
* See http://www.freertos.org/a00110.html.
*----------------------------------------------------------*/
// skip if included from IAR assembler
#ifndef __IASMARM__
#include "mxc_device.h"
#endif
/* Cortex M23/M33 port configuration. */
#define configENABLE_MPU 0
#define configENABLE_FPU 1
#define configENABLE_TRUSTZONE 0
#define configMINIMAL_SECURE_STACK_SIZE (1024)
#define configUSE_PREEMPTION 1
#define configUSE_PORT_OPTIMISED_TASK_SELECTION 0
#define configCPU_CLOCK_HZ SystemCoreClock
#define configTICK_RATE_HZ ( 1000 )
#define configMAX_PRIORITIES ( 5 )
#define configMINIMAL_STACK_SIZE ( 128 )
#define configTOTAL_HEAP_SIZE ( configSUPPORT_DYNAMIC_ALLOCATION*4*1024 )
#define configMAX_TASK_NAME_LEN 16
#define configUSE_16_BIT_TICKS 0
#define configIDLE_SHOULD_YIELD 1
#define configUSE_MUTEXES 1
#define configUSE_RECURSIVE_MUTEXES 1
#define configUSE_COUNTING_SEMAPHORES 1
#define configQUEUE_REGISTRY_SIZE 4
#define configUSE_QUEUE_SETS 0
#define configUSE_TIME_SLICING 0
#define configUSE_NEWLIB_REENTRANT 0
#define configENABLE_BACKWARD_COMPATIBILITY 1
#define configSTACK_ALLOCATION_FROM_SEPARATE_HEAP 0
#define configSUPPORT_STATIC_ALLOCATION 1
#define configSUPPORT_DYNAMIC_ALLOCATION 0
/* Hook function related definitions. */
#define configUSE_IDLE_HOOK 0
#define configUSE_TICK_HOOK 0
#define configUSE_MALLOC_FAILED_HOOK 0 // cause nested extern warning
#define configCHECK_FOR_STACK_OVERFLOW 2
#define configCHECK_HANDLER_INSTALLATION 0
/* Run time and task stats gathering related definitions. */
#define configGENERATE_RUN_TIME_STATS 0
#define configRECORD_STACK_HIGH_ADDRESS 1
#define configUSE_TRACE_FACILITY 1 // legacy trace
#define configUSE_STATS_FORMATTING_FUNCTIONS 0
/* Co-routine definitions. */
#define configUSE_CO_ROUTINES 0
#define configMAX_CO_ROUTINE_PRIORITIES 2
/* Software timer related definitions. */
#define configUSE_TIMERS 1
#define configTIMER_TASK_PRIORITY (configMAX_PRIORITIES-2)
#define configTIMER_QUEUE_LENGTH 32
#define configTIMER_TASK_STACK_DEPTH configMINIMAL_STACK_SIZE
/* Optional functions - most linkers will remove unused functions anyway. */
#define INCLUDE_vTaskPrioritySet 0
#define INCLUDE_uxTaskPriorityGet 0
#define INCLUDE_vTaskDelete 0
#define INCLUDE_vTaskSuspend 1 // required for queue, semaphore, mutex to be blocked indefinitely with portMAX_DELAY
#define INCLUDE_xResumeFromISR 0
#define INCLUDE_vTaskDelayUntil 1
#define INCLUDE_vTaskDelay 1
#define INCLUDE_xTaskGetSchedulerState 0
#define INCLUDE_xTaskGetCurrentTaskHandle 1
#define INCLUDE_uxTaskGetStackHighWaterMark 0
#define INCLUDE_xTaskGetIdleTaskHandle 0
#define INCLUDE_xTimerGetTimerDaemonTaskHandle 0
#define INCLUDE_pcTaskGetTaskName 0
#define INCLUDE_eTaskGetState 0
#define INCLUDE_xEventGroupSetBitFromISR 0
#define INCLUDE_xTimerPendFunctionCall 0
/* FreeRTOS hooks to NVIC vectors */
#define xPortPendSVHandler PendSV_Handler
#define xPortSysTickHandler SysTick_Handler
#define vPortSVCHandler SVC_Handler
//--------------------------------------------------------------------+
// Interrupt nesting behavior configuration.
//--------------------------------------------------------------------+
// For Cortex-M specific: __NVIC_PRIO_BITS is defined in mcu header
#define configPRIO_BITS __NVIC_PRIO_BITS
/* The lowest interrupt priority that can be used in a call to a "set priority" function. */
#define configLIBRARY_LOWEST_INTERRUPT_PRIORITY ((1<<configPRIO_BITS) - 1)
/* The highest interrupt priority that can be used by any interrupt service
routine that makes calls to interrupt safe FreeRTOS API functions. DO NOT CALL
INTERRUPT SAFE FREERTOS API FUNCTIONS FROM ANY INTERRUPT THAT HAS A HIGHER
PRIORITY THAN THIS! (higher priorities are lower numeric values. */
#define configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY 2
/* Interrupt priorities used by the kernel port layer itself. These are generic
to all Cortex-M ports, and do not rely on any particular library functions. */
#define configKERNEL_INTERRUPT_PRIORITY ( configLIBRARY_LOWEST_INTERRUPT_PRIORITY << (8 - configPRIO_BITS) )
/* !!!! configMAX_SYSCALL_INTERRUPT_PRIORITY must not be set to zero !!!!
See http://www.FreeRTOS.org/RTOS-Cortex-M3-M4.html. */
#define configMAX_SYSCALL_INTERRUPT_PRIORITY ( configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY << (8 - configPRIO_BITS) )
#endif

28
hw/bsp/max78002/README.md
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@@ -1,28 +0,0 @@
# Analog Devices MAX78002
This BSP is for working with the Analog Devices
[MAX78002](https://www.analog.com/en/products/max78002.html) AI microcontroller.
The following boards are supported:
* [MAX78002EVKIT](https://www.analog.com/en/resources/evaluation-hardware-and-software/evaluation-boards-kits/max78002evkit.html)
This part family leverages the Maxim Microcontrollers SDK (MSDK) for the device
interfaces and hardware abstraction layers. This source code package is fetched
as part of the get-deps script.
The microcontroller utilizes the standard GNU ARM toolchain. If this toolchain
is not already available on your build machine, it can be installed by using the
bundled MSDK installation. Details on downloading and installing can be found
in the [User's Guide](https://analogdevicesinc.github.io/msdk//USERGUIDE/).
## Flashing
The default flashing behavior in this BSP is to utilize JLink. This can be done
by running the `flash` or `flash-jlink` rule for Makefiles, or the
`<target>-jlink` target for CMake.
The Evaluation Kit is shipped with a CMSIS-DAP compatible debug probe. However,
at the time of writing, the necessary flashing algorithms for OpenOCD have not
yet been incorporated into the OpenOCD master branch. To utilize the provided
debug probes, please install the bundled MSDK package which includes the
appropriate OpenOCD modifications. To leverage this OpenOCD instance, run the
`flash-msdk` Makefile rule, or `<target>-msdk` CMake target.

1
hw/bsp/max78002/boards/max78002evkit/board.cmake
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@@ -1 +0,0 @@
# Nothing to be done at the board level

1
hw/bsp/max78002/boards/max78002evkit/board.mk
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# No specific build requirements for the board.

173
hw/bsp/max78002/family.c
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/*
* The MIT License (MIT)
*
* Copyright (c) 2024 Brent Kowal (Analog Devices, Inc)
*
* Permission is hereby granted, free of charge, to any person obtaining a copy
* of this software and associated documentation files (the "Software"), to deal
* in the Software without restriction, including without limitation the rights
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
* copies of the Software, and to permit persons to whom the Software is
* furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
* THE SOFTWARE.
*
* This file is part of the TinyUSB stack.
*/
/* metadata:
manufacturer: Analog Devices
*/
#ifdef __GNUC__
#pragma GCC diagnostic push
#pragma GCC diagnostic ignored "-Wstrict-prototypes" // _mxc_crit_get_state()
#endif
#include "gpio.h"
#include "mxc_sys.h"
#include "mcr_regs.h"
#include "mxc_device.h"
#include "uart.h"
#ifdef __GNUC__
#pragma GCC diagnostic pop
#endif
#include "board.h"
#include "bsp/board_api.h"
//--------------------------------------------------------------------+
// Forward USB interrupt events to TinyUSB IRQ Handler
//--------------------------------------------------------------------+
void USB_IRQHandler(void) {
tud_int_handler(0);
}
//--------------------------------------------------------------------+
// MACRO TYPEDEF CONSTANT ENUM
//--------------------------------------------------------------------+
mxc_uart_regs_t *ConsoleUart = MXC_UART_GET_UART(UART_NUM);
void board_init(void) {
#if CFG_TUSB_OS == OPT_OS_NONE
// 1ms tick timer
SysTick_Config(SystemCoreClock / 1000);
#elif CFG_TUSB_OS == OPT_OS_FREERTOS
// If freeRTOS is used, IRQ priority is limit by max syscall ( smaller is higher )
NVIC_SetPriority(USB_IRQn, configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY);
#endif
mxc_gpio_cfg_t gpioConfig;
// LED
gpioConfig.drvstr = MXC_GPIO_DRVSTR_0;
gpioConfig.func = MXC_GPIO_FUNC_OUT;
gpioConfig.mask = LED_PIN;
gpioConfig.pad = MXC_GPIO_PAD_NONE;
gpioConfig.port = LED_PORT;
gpioConfig.vssel = LED_VDDIO;
MXC_GPIO_Config(&gpioConfig);
board_led_write(false);
// Button
gpioConfig.drvstr = MXC_GPIO_DRVSTR_0;
gpioConfig.func = MXC_GPIO_FUNC_IN;
gpioConfig.mask = BUTTON_PIN;
gpioConfig.pad = BUTTON_PULL;
gpioConfig.port = BUTTON_PORT;
gpioConfig.vssel = MXC_GPIO_VSSEL_VDDIO;
MXC_GPIO_Config(&gpioConfig);
// UART
MXC_UART_Init(ConsoleUart, CFG_BOARD_UART_BAUDRATE, MXC_UART_IBRO_CLK);
UART_PORT->vssel |= UART_VDDIO_BITS; //Set necessary bits to 3.3V
//USB
MXC_MCR->ldoctrl |= MXC_F_MCR_LDOCTRL_0P9EN;
MXC_SYS_ClockEnable(MXC_SYS_PERIPH_CLOCK_USB);
}
//--------------------------------------------------------------------+
// Board porting API
//--------------------------------------------------------------------+
void board_led_write(bool state) {
#if LED_STATE_ON
state = !state;
#endif
if (state) {
MXC_GPIO_OutClr(LED_PORT, LED_PIN);
} else {
MXC_GPIO_OutSet(LED_PORT, LED_PIN);
}
}
uint32_t board_button_read(void) {
uint32_t state = MXC_GPIO_InGet(BUTTON_PORT, BUTTON_PIN) ? 1 : 0;
return BUTTON_STATE_ACTIVE == state;
}
size_t board_get_unique_id(uint8_t id[], size_t max_len) {
uint8_t hw_id[MXC_SYS_USN_CHECKSUM_LEN];//USN Buffer
/* All other 2nd parameter is optional checksum buffer */
MXC_SYS_GetUSN(hw_id, NULL);
size_t act_len = TU_MIN(max_len, MXC_SYS_USN_LEN);
memcpy(id, hw_id, act_len);
return act_len;
}
int board_uart_read(uint8_t *buf, int len) {
int uart_val;
int act_len = 0;
while (act_len < len) {
if ((uart_val = MXC_UART_ReadCharacterRaw(ConsoleUart)) == E_UNDERFLOW) {
break;
} else {
*buf++ = (uint8_t) uart_val;
act_len++;
}
}
return act_len;
}
int board_uart_write(void const *buf, int len) {
int act_len = 0;
const uint8_t *ch_ptr = (const uint8_t *) buf;
while (act_len < len) {
MXC_UART_WriteCharacter(ConsoleUart, *ch_ptr++);
act_len++;
}
return len;
}
#if CFG_TUSB_OS == OPT_OS_NONE
volatile uint32_t system_ticks = 0;
void SysTick_Handler(void) {
system_ticks++;
}
uint32_t board_millis(void) {
return system_ticks;
}
#endif
void HardFault_Handler(void) {
__asm("BKPT #0\n");
}
// Required by __libc_init_array in startup code if we are compiling using
// -nostdlib/-nostartfiles.
void _init(void) {
}

166
hw/bsp/max78002/family.cmake
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@@ -1,166 +0,0 @@
include_guard()
set(MAX32_PERIPH ${TOP}/hw/mcu/analog/max32/Libraries/PeriphDrivers)
set(MAX32_CMSIS ${TOP}/hw/mcu/analog/max32/Libraries/CMSIS)
set(CMSIS_5 ${TOP}/lib/CMSIS_5)
# include board specific
include(${CMAKE_CURRENT_LIST_DIR}/boards/${BOARD}/board.cmake)
# Get the linker file from current location (family)
set(LD_FILE_GNU ${CMAKE_CURRENT_LIST_DIR}/max78002.ld)
set(LD_FILE_Clang ${LD_FILE_GNU})
# toolchain set up
set(CMAKE_SYSTEM_CPU cortex-m4 CACHE INTERNAL "System Processor")
set(CMAKE_TOOLCHAIN_FILE ${TOP}/examples/build_system/cmake/toolchain/arm_${TOOLCHAIN}.cmake)
set(JLINK_DEVICE max78000)
set(FAMILY_MCUS MAX78002 CACHE INTERNAL "")
function(update_board TARGET)
target_compile_definitions(${TARGET} PUBLIC
TARGET=MAX78002
TARGET_REV=0x4131
MXC_ASSERT_ENABLE
MAX78002
IAR_PRAGMAS=0
CFG_TUSB_MCU=OPT_MCU_MAX78002
BOARD_TUD_MAX_SPEED=OPT_MODE_HIGH_SPEED
)
endfunction()
#------------------------------------
# BOARD_TARGET
#------------------------------------
# only need to be built ONCE for all examples
function(add_board_target BOARD_TARGET)
if (TARGET ${BOARD_TARGET})
return()
endif ()
# Startup & Linker script
set(STARTUP_FILE_GNU ${MAX32_CMSIS}/Device/Maxim/MAX78002/Source/GCC/startup_max78002.S)
set(STARTUP_FILE_Clang ${STARTUP_FILE_GNU})
set(PERIPH_SRC ${MAX32_PERIPH}/Source)
add_library(${BOARD_TARGET} STATIC
${MAX32_CMSIS}/Device/Maxim/MAX78002/Source/heap.c
${MAX32_CMSIS}/Device/Maxim/MAX78002/Source/system_max78002.c
${PERIPH_SRC}/SYS/mxc_assert.c
${PERIPH_SRC}/SYS/mxc_delay.c
${PERIPH_SRC}/SYS/mxc_lock.c
${PERIPH_SRC}/SYS/nvic_table.c
${PERIPH_SRC}/SYS/pins_ai87.c
${PERIPH_SRC}/SYS/sys_ai87.c
${PERIPH_SRC}/AES/aes_ai87.c
${PERIPH_SRC}/AES/aes_revb.c
${PERIPH_SRC}/FLC/flc_common.c
${PERIPH_SRC}/FLC/flc_ai87.c
${PERIPH_SRC}/FLC/flc_reva.c
${PERIPH_SRC}/GPIO/gpio_common.c
${PERIPH_SRC}/GPIO/gpio_ai87.c
${PERIPH_SRC}/GPIO/gpio_reva.c
${PERIPH_SRC}/ICC/icc_ai87.c
${PERIPH_SRC}/ICC/icc_reva.c
${PERIPH_SRC}/TRNG/trng_ai87.c
${PERIPH_SRC}/TRNG/trng_revb.c
${PERIPH_SRC}/UART/uart_common.c
${PERIPH_SRC}/UART/uart_ai87.c
${PERIPH_SRC}/UART/uart_revb.c
${STARTUP_FILE_${CMAKE_C_COMPILER_ID}}
)
target_include_directories(${BOARD_TARGET} PUBLIC
${CMAKE_CURRENT_FUNCTION_LIST_DIR}
${MAX32_CMSIS}/Include
${MAX32_CMSIS}/Device/Maxim/MAX78002/Include
${MAX32_PERIPH}/Include/MAX78002
${PERIPH_SRC}/SYS
${PERIPH_SRC}/GPIO
${PERIPH_SRC}/AES
${PERIPH_SRC}/TRNG
${PERIPH_SRC}/ICC
${PERIPH_SRC}/FLC
${PERIPH_SRC}/UART
)
target_compile_options(${BOARD_TARGET} PRIVATE
-Wno-error=strict-prototypes
-Wno-error=redundant-decls
)
update_board(${BOARD_TARGET})
if (CMAKE_C_COMPILER_ID STREQUAL "GNU")
target_link_options(${BOARD_TARGET} PUBLIC
"LINKER:--script=${LD_FILE_GNU}"
-nostartfiles
--specs=nosys.specs --specs=nano.specs
)
elseif (CMAKE_C_COMPILER_ID STREQUAL "Clang")
target_link_options(${BOARD_TARGET} PUBLIC
"LINKER:--script=${LD_FILE_Clang}"
)
endif ()
endfunction()
#------------------------------------
# Functions
#------------------------------------
function(family_configure_example TARGET RTOS)
family_configure_common(${TARGET} ${RTOS})
# Board target
add_board_target(board_${BOARD})
#---------- Port Specific ----------
# These files are built for each example since it depends on example's tusb_config.h
target_sources(${TARGET} PUBLIC
# BSP
${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c
${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../board.c
)
target_include_directories(${TARGET} PUBLIC
# family, hw, board
${CMAKE_CURRENT_FUNCTION_LIST_DIR}
${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../../
${CMAKE_CURRENT_FUNCTION_LIST_DIR}/boards/${BOARD}
)
target_compile_options(${TARGET} PRIVATE
-Wno-error=strict-prototypes
-Wno-error=redundant-decls
)
# Add TinyUSB target and port source
family_add_tinyusb(${TARGET} OPT_MCU_MAX78002)
target_sources(${TARGET} PUBLIC
${TOP}/src/portable/mentor/musb/dcd_musb.c
)
target_link_libraries(${TARGET} PUBLIC board_${BOARD})
target_compile_options(${TARGET} PRIVATE
-Wno-error=strict-prototypes
-Wno-error=redundant-decls
)
# Flashing
family_add_bin_hex(${TARGET})
family_flash_jlink(${TARGET})
family_flash_msdk(${TARGET})
endfunction()
# Add flash msdk target
function(family_flash_msdk TARGET)
set(MAXIM_PATH "$ENV{MAXIM_PATH}")
add_custom_target(${TARGET}-msdk
DEPENDS ${TARGET}
COMMAND ${MAXIM_PATH}/Tools/OpenOCD/openocd -s ${MAXIM_PATH}/Tools/OpenOCD/scripts
-f interface/cmsis-dap.cfg -f target/max78002.cfg
-c "program $<TARGET_FILE:${TARGET}> verify; init; reset; exit"
VERBATIM
)
endfunction()

99
hw/bsp/max78002/family.mk
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DEPS_SUBMODULES += lib/CMSIS_5 hw/mcu/analog/max32
# Important locations in the hw support for MCU
MAX32_CMSIS = hw/mcu/analog/max32/Libraries/CMSIS
MAX32_PERIPH = hw/mcu/analog/max32/Libraries/PeriphDrivers
# Add any board specific make rules
include $(TOP)/$(BOARD_PATH)/board.mk
CPU_CORE ?= cortex-m4
PORT ?= 0
# GCC
SRC_S_GCC += $(MAX32_CMSIS)/Device/Maxim/MAX78002/Source/GCC/startup_max78002.S
LD_FILE = $(FAMILY_PATH)/max78002.ld
# --------------
# Compiler Flags
# --------------
# Flags for the MAX78002 SDK
CFLAGS += -DTARGET=MAX78002 \
-DTARGET_REV=0x4131 \
-DMXC_ASSERT_ENABLE \
-DMAX78002 \
-DIAR_PRAGMAS=0
# Flags for TUSB features
CFLAGS += \
-DCFG_TUSB_MCU=OPT_MCU_MAX78002 \
-DBOARD_TUD_MAX_SPEED=OPT_MODE_HIGH_SPEED
# mcu driver cause following warnings
CFLAGS += -Wno-error=redundant-decls \
-Wno-error=strict-prototypes \
-Wno-error=unused-parameter \
-Wno-error=enum-conversion \
-Wno-error=sign-compare \
-Wno-error=cast-qual
LDFLAGS_GCC += -nostartfiles --specs=nosys.specs --specs=nano.specs
# For flash-jlink target
JLINK_DEVICE = max78000
# flash target using Jlink by default
flash: flash-jlink
# Optional flash option when running within an installed MSDK to use OpenOCD
# Mainline OpenOCD does not yet have the MAX32's flash algorithm integrated.
# If the MSDK is installed, flash-msdk can be run to utilize the the modified
# openocd with the algorithms
MAXIM_PATH := $(subst \,/,$(MAXIM_PATH))
flash-msdk: $(BUILD)/$(PROJECT).elf
$(MAXIM_PATH)/Tools/OpenOCD/openocd -s $(MAXIM_PATH)/Tools/OpenOCD/scripts \
-f interface/cmsis-dap.cfg -f target/max78002.cfg \
-c "program $(BUILD)/$(PROJECT).elf verify; init; reset; exit"
# -----------------
# Sources & Include
# -----------------
PERIPH_SRC = $(TOP)/$(MAX32_PERIPH)/Source
SRC_C += \
src/portable/mentor/musb/dcd_musb.c \
$(MAX32_CMSIS)/Device/Maxim/MAX78002/Source/heap.c \
$(MAX32_CMSIS)/Device/Maxim/MAX78002/Source/system_max78002.c \
$(PERIPH_SRC)/SYS/mxc_assert.c \
$(PERIPH_SRC)/SYS/mxc_delay.c \
$(PERIPH_SRC)/SYS/mxc_lock.c \
$(PERIPH_SRC)/SYS/nvic_table.c \
$(PERIPH_SRC)/SYS/pins_ai87.c \
$(PERIPH_SRC)/SYS/sys_ai87.c \
$(PERIPH_SRC)/AES/aes_ai87.c \
$(PERIPH_SRC)/AES/aes_revb.c \
$(PERIPH_SRC)/FLC/flc_common.c \
$(PERIPH_SRC)/FLC/flc_ai87.c \
$(PERIPH_SRC)/FLC/flc_reva.c \
$(PERIPH_SRC)/GPIO/gpio_common.c \
$(PERIPH_SRC)/GPIO/gpio_ai87.c \
$(PERIPH_SRC)/GPIO/gpio_reva.c \
$(PERIPH_SRC)/ICC/icc_ai87.c \
$(PERIPH_SRC)/ICC/icc_reva.c \
$(PERIPH_SRC)/TRNG/trng_ai87.c \
$(PERIPH_SRC)/TRNG/trng_revb.c \
$(PERIPH_SRC)/UART/uart_common.c \
$(PERIPH_SRC)/UART/uart_ai87.c \
$(PERIPH_SRC)/UART/uart_revb.c \
INC += \
$(TOP)/$(BOARD_PATH) \
$(TOP)/$(MAX32_CMSIS)/Include \
$(TOP)/$(MAX32_CMSIS)/Device/Maxim/MAX78002/Include \
$(TOP)/$(MAX32_PERIPH)/Include/MAX78002 \
$(PERIPH_SRC)/SYS \
$(PERIPH_SRC)/GPIO \
$(PERIPH_SRC)/AES \
$(PERIPH_SRC)/ICC \
$(PERIPH_SRC)/FLC \
$(PERIPH_SRC)/TRNG \
$(PERIPH_SRC)/UART

0
hw/bsp/max32650/FreeRTOSConfig/FreeRTOSConfig.h → hw/bsp/maxim/FreeRTOSConfig/FreeRTOSConfig.h
View File

43
hw/bsp/maxim/README.md Normal file
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@@ -0,0 +1,43 @@
# Analog Devices MAXIM
This BSP is for working with the Analog microcontrollers
- [MAX32650](https://www.analog.com/en/products/max32650.html),
- [MAX32651](https://www.analog.com/en/products/max32651.html)
- [MAX32652](https://www.analog.com/en/products/max32652.html)
- [MAX32665](https://www.analog.com/en/products/max32665.html)
- [MAX32666](https://www.analog.com/en/products/max32666.html)
- [MAX32690](https://www.analog.com/en/products/max32690.html)
- [MAX78002](https://www.analog.com/en/products/max78002.html) AI microcontroller.
The following boards are supported:
* [MAX32650EVKIT](https://www.analog.com/en/resources/evaluation-hardware-and-software/evaluation-boards-kits/max32650-evkit.html)
* [MAX32650FTHR](https://www.analog.com/en/resources/evaluation-hardware-and-software/evaluation-boards-kits/max32650fthr.html)
* [MAX32651EVKIT](https://www.analog.com/en/resources/evaluation-hardware-and-software/evaluation-boards-kits/max32651-evkit.html) (Secure Bootloader)
* [MAX32666EVKIT](https://www.analog.com/en/resources/evaluation-hardware-and-software/evaluation-boards-kits/max32666evkit.html)
* [MAX32666FTHR](https://www.analog.com/en/resources/evaluation-hardware-and-software/evaluation-boards-kits/max32666fthr.html)
* [MAX32690EVKIT](https://www.analog.com/en/resources/evaluation-hardware-and-software/evaluation-boards-kits/max32690evkit.html)
* [AD-APARD32690-SL](https://www.analog.com/en/resources/evaluation-hardware-and-software/evaluation-boards-kits/ad-apard32690-sl.html)
* [MAX78002EVKIT](https://www.analog.com/en/resources/evaluation-hardware-and-software/evaluation-boards-kits/max78002evkit.html)
This part family leverages the Maxim Microcontrollers SDK (MSDK) for the device
interfaces and hardware abstraction layers. This source code package is fetched
as part of the get-deps script.
The microcontroller utilizes the standard GNU ARM toolchain. If this toolchain
is not already available on your build machine, it can be installed by using the
bundled MSDK installation. Details on downloading and installing can be found
in the [User's Guide](https://analogdevicesinc.github.io/msdk//USERGUIDE/).
## Flashing
The default flashing behavior in this BSP is to utilize JLink. This can be done
by running the `flash` or `flash-jlink` rule for Makefiles, or the
`<target>-jlink` target for CMake.
Most the Evaluation Kit and boards are shipped with a CMSIS-DAP
compatible debug probe. However, at the time of writing, the necessary flashing
algorithms for OpenOCD have not yet been incorporated into the OpenOCD master
branch. To utilize the provided debug probes, please install the bundled MSDK
package which includes the appropriate OpenOCD modifications. To leverage this
OpenOCD instance, run the `flash-msdk` Makefile rule, or `<target>-openocd` CMake
target.

4
hw/bsp/maxim/boards/apard32690/board.cmake Normal file
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@@ -0,0 +1,4 @@
set(MAX_DEVICE max32690)
function(update_board TARGET)
endfunction()

3
hw/bsp/max32690/boards/apard32690/board.h → hw/bsp/maxim/boards/apard32690/board.h
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@@ -32,8 +32,7 @@
#ifndef BOARD_H_
#define BOARD_H_
#include "gpio.h"
#include "mxc_sys.h"
#include "max32690.h"
#ifdef __cplusplus
extern "C" {

1
hw/bsp/maxim/boards/apard32690/board.mk Normal file
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@@ -0,0 +1 @@
MAX_DEVICE = max32690

8
hw/bsp/maxim/boards/max32650evkit/board.cmake Normal file
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@@ -0,0 +1,8 @@
set(MAX_DEVICE max32650)
function(update_board TARGET)
endfunction()
function(prepare_image TARGET_IN)
#No signing required
endfunction()

3
hw/bsp/max32650/boards/max32650evkit/board.h → hw/bsp/maxim/boards/max32650evkit/board.h
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@@ -32,8 +32,7 @@
#ifndef BOARD_H_
#define BOARD_H_
#include "gpio.h"
#include "mxc_sys.h"
#include "max32650.h"
#ifdef __cplusplus
extern "C" {

1
hw/bsp/maxim/boards/max32650evkit/board.mk Normal file
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@@ -0,0 +1 @@
MAX_DEVICE = max32650

8
hw/bsp/maxim/boards/max32650fthr/board.cmake Normal file
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@@ -0,0 +1,8 @@
set(MAX_DEVICE max32650)
function(update_board TARGET)
endfunction()
function(prepare_image TARGET_IN)
#No signing required
endfunction()

3
hw/bsp/max32650/boards/max32650fthr/board.h → hw/bsp/maxim/boards/max32650fthr/board.h
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@@ -32,8 +32,7 @@
#ifndef BOARD_H_
#define BOARD_H_
#include "gpio.h"
#include "mxc_sys.h"
#include "max32650.h"
#ifdef __cplusplus
extern "C" {

1
hw/bsp/maxim/boards/max32650fthr/board.mk Normal file
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@@ -0,0 +1 @@
MAX_DEVICE = max32650

15
hw/bsp/max32650/boards/max32651evkit/board.cmake → hw/bsp/maxim/boards/max32651evkit/board.cmake
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@@ -1,22 +1,23 @@
# Use the secure linker file
set(LD_FILE_GNU ${CMAKE_CURRENT_LIST_DIR}/max32651.ld)
set(MAX_DEVICE max32650)
function(update_board_extras TARGET)
# Use the secure linker file
set(LD_FILE_GNU ${CMAKE_CURRENT_LIST_DIR}/../../linker/max32651.ld)
function(update_board TARGET)
# for the signed target, need to add the __SLA_FWK__ define
target_compile_definitions(${TARGET} PUBLIC
__SLA_FWK__
)
endfunction()
function(prepare_image TARGET_IN)
#For the signed target, set up a POST_BUILD command to sign the elf file once
#created
function(sign_image TARGET_IN)
#For the signed target, set up a POST_BUILD command to sign the elf file once created
if((WIN32) OR (MINGW) OR (MSYS))
set(SIGN_EXE "sign_app.exe")
else()
set(SIGN_EXE "sign_app")
endif()
set(MCU_PATH "${TOP}/hw/mcu/analog/max32/")
set(MCU_PATH "${TOP}/hw/mcu/analog/msdk/")
# Custom POST_BUILD command
add_custom_command(

3
hw/bsp/max32650/boards/max32651evkit/board.h → hw/bsp/maxim/boards/max32651evkit/board.h
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@@ -32,8 +32,7 @@
#ifndef BOARD_H_
#define BOARD_H_
#include "gpio.h"
#include "mxc_sys.h"
#include "max32650.h"
#ifdef __cplusplus
extern "C" {

4
hw/bsp/max32650/boards/max32651evkit/board.mk → hw/bsp/maxim/boards/max32651evkit/board.mk
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@@ -1,5 +1,7 @@
MAX_DEVICE = max32650
# Use the secure linker file
LD_FILE = $(BOARD_PATH)/max32651.ld
LD_FILE = $(FAMILY_PATH)/linker/max32651.ld
# Let the family script know the build needs to be signed
SIGNED_BUILD := 1

4
hw/bsp/maxim/boards/max32666evkit/board.cmake Normal file
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@@ -0,0 +1,4 @@
set(MAX_DEVICE max32665)
function(update_board TARGET)
endfunction()

3
hw/bsp/max32666/boards/max32666evkit/board.h → hw/bsp/maxim/boards/max32666evkit/board.h
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@@ -32,8 +32,7 @@
#ifndef BOARD_H_
#define BOARD_H_
#include "gpio.h"
#include "mxc_sys.h"
#include "max32665.h"
#ifdef __cplusplus
extern "C" {

1
hw/bsp/maxim/boards/max32666evkit/board.mk Normal file
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@@ -0,0 +1 @@
MAX_DEVICE = max32665

4
hw/bsp/maxim/boards/max32666fthr/board.cmake Normal file
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@@ -0,0 +1,4 @@
set(MAX_DEVICE max32665)
function(update_board TARGET)
endfunction()

3
hw/bsp/max32666/boards/max32666fthr/board.h → hw/bsp/maxim/boards/max32666fthr/board.h
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@@ -32,8 +32,7 @@
#ifndef BOARD_H_
#define BOARD_H_
#include "gpio.h"
#include "mxc_sys.h"
#include "max32665.h"
#ifdef __cplusplus
extern "C" {

1
hw/bsp/maxim/boards/max32666fthr/board.mk Normal file
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@@ -0,0 +1 @@
MAX_DEVICE = max32665

4
hw/bsp/maxim/boards/max32690evkit/board.cmake Normal file
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@@ -0,0 +1,4 @@
set(MAX_DEVICE max32690)
function(update_board TARGET)
endfunction()

5
hw/bsp/max32690/boards/max32690evkit/board.h → hw/bsp/maxim/boards/max32690evkit/board.h
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@@ -32,13 +32,12 @@
#ifndef BOARD_H_
#define BOARD_H_
#include "gpio.h"
#include "mxc_sys.h"
#ifdef __cplusplus
extern "C" {
#endif
#include "max32690.h"
// LED
#define LED_PORT MXC_GPIO0
#define LED_PIN MXC_GPIO_PIN_14

1
hw/bsp/maxim/boards/max32690evkit/board.mk Normal file
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@@ -0,0 +1 @@
MAX_DEVICE = max32690

4
hw/bsp/maxim/boards/max78002evkit/board.cmake Normal file
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@@ -0,0 +1,4 @@
set(MAX_DEVICE max78002)
function(update_board TARGET)
endfunction()

3
hw/bsp/max78002/boards/max78002evkit/board.h → hw/bsp/maxim/boards/max78002evkit/board.h
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@@ -32,8 +32,7 @@
#ifndef BOARD_H_
#define BOARD_H_
#include "gpio.h"
#include "mxc_sys.h"
#include "max78002.h"
#ifdef __cplusplus
extern "C" {

1
hw/bsp/maxim/boards/max78002evkit/board.mk Normal file
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@@ -0,0 +1 @@
MAX_DEVICE = max78002

48
hw/bsp/max32666/family.c → hw/bsp/maxim/family.c
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@@ -35,7 +35,9 @@
#include "gpio.h"
#include "mxc_sys.h"
#if __has_include("mcr_regs.h")
#include "mcr_regs.h"
#endif
#include "mxc_device.h"
#include "uart.h"
@@ -88,16 +90,45 @@ void board_init(void) {
MXC_GPIO_Config(&gpioConfig);
// UART
#if MAX_PERIPH_ID == 14
MXC_UART_Init(ConsoleUart, CFG_BOARD_UART_BAUDRATE, UART_MAP);
#elif MAX_PERIPH_ID == 18 || MAX_PERIPH_ID == 87
MXC_UART_Init(ConsoleUart, CFG_BOARD_UART_BAUDRATE, MXC_UART_IBRO_CLK);
#if MAX_PERIPH_ID == 87
UART_PORT->vssel |= UART_VDDIO_BITS; // Set necessary bits to 3.3V
#endif
#endif
//USB
#if defined(MAX32650)
// Startup the HIRC96M clock if it's not on already
if (!(MXC_GCR->clkcn & MXC_F_GCR_CLKCN_HIRC96M_EN)) {
MXC_GCR->clkcn |= MXC_F_GCR_CLKCN_HIRC96M_EN;
if (!(MXC_GCR->clk_ctrl & MXC_F_GCR_CLK_CTRL_HIRC96_EN)) {
MXC_GCR->clk_ctrl |= MXC_F_GCR_CLK_CTRL_HIRC96_EN;
MXC_SYS_Clock_Timeout(MXC_F_GCR_CLK_CTRL_HIRC96_RDY);
}
MXC_SYS_ClockEnable(MXC_SYS_PERIPH_CLOCK_USB);
MXC_SYS_Reset_Periph(MXC_SYS_RESET_USB);
#elif defined(MAX32665) || defined(MAX32666)
// Startup the HIRC96M clock if it's not on already
if (!(MXC_GCR->clkcn & MXC_F_GCR_CLKCN_HIRC96M_EN)) {
MXC_GCR->clkcn |= MXC_F_GCR_CLKCN_HIRC96M_EN;
}
MXC_SYS_ClockEnable(MXC_SYS_PERIPH_CLOCK_USB);
MXC_SYS_Reset_Periph(MXC_SYS_RESET_USB);
#elif defined(MAX32690)
MXC_SYS_ClockSourceEnable(MXC_SYS_CLOCK_IPO);
MXC_MCR->ldoctrl |= MXC_F_MCR_LDOCTRL_0P9EN;
MXC_SYS_ClockEnable(MXC_SYS_PERIPH_CLOCK_USB);
MXC_SYS_Reset_Periph(MXC_SYS_RESET0_USB);
# elif defined(MAX78002)
MXC_MCR->ldoctrl |= MXC_F_MCR_LDOCTRL_0P9EN;
MXC_SYS_ClockEnable(MXC_SYS_PERIPH_CLOCK_USB);
#else
#error "Unsupported MAXIM MCU for board_dfu_init"
#endif
}
//--------------------------------------------------------------------+
@@ -121,13 +152,18 @@ uint32_t board_button_read(void) {
}
size_t board_get_unique_id(uint8_t id[], size_t max_len) {
uint8_t hw_id[MXC_SYS_USN_CHECKSUM_LEN];//USN Buffer
/* All other 2nd parameter is optional checksum buffer */
MXC_SYS_GetUSN(hw_id, NULL);
#if defined(MAX32650)
// USN is 13 bytes on this device
MXC_SYS_GetUSN(id, 13);
return 13;
#else
uint8_t hw_id[MXC_SYS_USN_CHECKSUM_LEN]; //USN Buffer
MXC_SYS_GetUSN(hw_id, NULL); // 2nd parameter is optional checksum buffer
size_t act_len = TU_MIN(max_len, MXC_SYS_USN_LEN);
memcpy(id, hw_id, act_len);
return act_len;
#endif
}
int board_uart_read(uint8_t *buf, int len) {

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hw/bsp/maxim/family.cmake Normal file
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@@ -0,0 +1,196 @@
include_guard()
# stub: overridden by board.cmake if needed
function(sign_image TARGET_IN)
endfunction()
set(MSDK_LIB ${TOP}/hw/mcu/analog/msdk/Libraries)
# include board specific
include(${CMAKE_CURRENT_LIST_DIR}/boards/${BOARD}/board.cmake)
# toolchain set up
set(CMAKE_SYSTEM_CPU cortex-m4 CACHE INTERNAL "System Processor")
set(CMAKE_TOOLCHAIN_FILE ${TOP}/examples/build_system/cmake/toolchain/arm_${TOOLCHAIN}.cmake)
string(TOUPPER ${MAX_DEVICE} MAX_DEVICE_UPPER)
cmake_print_variables(MAX_DEVICE MAX_DEVICE_UPPER)
set(JLINK_DEVICE ${MAX_DEVICE})
set(OPENOCD_OPTION "-f interface/cmsis-dap.cfg -f target/${MAX_DEVICE}.cfg")
set(FAMILY_MCUS ${MAX_DEVICE_UPPER} CACHE INTERNAL "")
if (${MAX_DEVICE} STREQUAL "max32650")
set(PERIPH_ID 10)
set(PERIPH_SUFFIX "me")
elseif (${MAX_DEVICE} STREQUAL "max32665" OR ${MAX_DEVICE} STREQUAL "max32666")
set(PERIPH_ID 14)
set(PERIPH_SUFFIX "me")
elseif (${MAX_DEVICE} STREQUAL "max32690")
set(PERIPH_ID 18)
set(PERIPH_SUFFIX "me")
elseif (${MAX_DEVICE} STREQUAL "max78002")
set(PERIPH_ID 87)
set(PERIPH_SUFFIX "ai")
else()
message(FATAL_ERROR "Unsupported MAX device: ${MAX_DEVICE}")
endif()
#------------------------------------
# BOARD_TARGET
#------------------------------------
# only need to be built ONCE for all examples
function(add_board_target BOARD_TARGET)
if (TARGET ${BOARD_TARGET})
return()
endif ()
# Startup & Linker script
set(STARTUP_FILE_GNU ${MSDK_LIB}/CMSIS/Device/Maxim/${MAX_DEVICE_UPPER}/Source/GCC/startup_${MAX_DEVICE}.S)
set(STARTUP_FILE_Clang ${STARTUP_FILE_GNU})
if (NOT DEFINED LD_FILE_GNU)
set(LD_FILE_GNU ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/linker/${MAX_DEVICE}.ld)
endif ()
set(LD_FILE_Clang ${LD_FILE_GNU})
# Common
add_library(${BOARD_TARGET} STATIC
${STARTUP_FILE_${CMAKE_C_COMPILER_ID}}
${MSDK_LIB}/CMSIS/Device/Maxim/${MAX_DEVICE_UPPER}/Source/heap.c
${MSDK_LIB}/CMSIS/Device/Maxim/${MAX_DEVICE_UPPER}/Source/system_${MAX_DEVICE}.c
${MSDK_LIB}/PeriphDrivers/Source/SYS/mxc_assert.c
${MSDK_LIB}/PeriphDrivers/Source/SYS/mxc_delay.c
${MSDK_LIB}/PeriphDrivers/Source/SYS/mxc_lock.c
${MSDK_LIB}/PeriphDrivers/Source/SYS/nvic_table.c
${MSDK_LIB}/PeriphDrivers/Source/SYS/pins_${PERIPH_SUFFIX}${PERIPH_ID}.c
${MSDK_LIB}/PeriphDrivers/Source/SYS/sys_${PERIPH_SUFFIX}${PERIPH_ID}.c
${MSDK_LIB}/PeriphDrivers/Source/FLC/flc_common.c
${MSDK_LIB}/PeriphDrivers/Source/FLC/flc_${PERIPH_SUFFIX}${PERIPH_ID}.c
${MSDK_LIB}/PeriphDrivers/Source/FLC/flc_reva.c
${MSDK_LIB}/PeriphDrivers/Source/GPIO/gpio_common.c
${MSDK_LIB}/PeriphDrivers/Source/GPIO/gpio_${PERIPH_SUFFIX}${PERIPH_ID}.c
${MSDK_LIB}/PeriphDrivers/Source/GPIO/gpio_reva.c
${MSDK_LIB}/PeriphDrivers/Source/ICC/icc_${PERIPH_SUFFIX}${PERIPH_ID}.c
${MSDK_LIB}/PeriphDrivers/Source/ICC/icc_reva.c
${MSDK_LIB}/PeriphDrivers/Source/UART/uart_common.c
${MSDK_LIB}/PeriphDrivers/Source/UART/uart_${PERIPH_SUFFIX}${PERIPH_ID}.c
)
target_include_directories(${BOARD_TARGET} PUBLIC
${MSDK_LIB}/CMSIS/5.9.0/Core/Include
${MSDK_LIB}/CMSIS/Device/Maxim/${MAX_DEVICE_UPPER}/Include
${MSDK_LIB}/PeriphDrivers/Include/${MAX_DEVICE_UPPER}
${MSDK_LIB}/PeriphDrivers/Source/SYS
${MSDK_LIB}/PeriphDrivers/Source/GPIO
${MSDK_LIB}/PeriphDrivers/Source/ICC
${MSDK_LIB}/PeriphDrivers/Source/FLC
${MSDK_LIB}/PeriphDrivers/Source/UART
)
# device specific
if (${MAX_DEVICE} STREQUAL "max32650" OR
${MAX_DEVICE} STREQUAL "max32665" OR ${MAX_DEVICE} STREQUAL "max32666")
target_sources(${BOARD_TARGET} PRIVATE
${MSDK_LIB}/PeriphDrivers/Source/ICC/icc_common.c
${MSDK_LIB}/PeriphDrivers/Source/TPU/tpu_${PERIPH_SUFFIX}${PERIPH_ID}.c
${MSDK_LIB}/PeriphDrivers/Source/TPU/tpu_reva.c
${MSDK_LIB}/PeriphDrivers/Source/UART/uart_reva.c
)
target_include_directories(${BOARD_TARGET} PUBLIC
${MSDK_LIB}/PeriphDrivers/Source/TPU
)
elseif (${MAX_DEVICE} STREQUAL "max32690")
target_sources(${BOARD_TARGET} PRIVATE
${MSDK_LIB}/PeriphDrivers/Source/CTB/ctb_${PERIPH_SUFFIX}${PERIPH_ID}.c
${MSDK_LIB}/PeriphDrivers/Source/CTB/ctb_reva.c
${MSDK_LIB}/PeriphDrivers/Source/CTB/ctb_common.c
${MSDK_LIB}/PeriphDrivers/Source/UART/uart_revb.c
)
target_include_directories(${BOARD_TARGET} PUBLIC
${MSDK_LIB}/PeriphDrivers/Source/CTB
)
elseif (${MAX_DEVICE} STREQUAL "max78002")
target_sources(${BOARD_TARGET} PRIVATE
${MSDK_LIB}/PeriphDrivers/Source/AES/aes_${PERIPH_SUFFIX}${PERIPH_ID}.c
${MSDK_LIB}/PeriphDrivers/Source/AES/aes_revb.c
${MSDK_LIB}/PeriphDrivers/Source/TRNG/trng_${PERIPH_SUFFIX}${PERIPH_ID}.c
${MSDK_LIB}/PeriphDrivers/Source/TRNG/trng_revb.c
${MSDK_LIB}/PeriphDrivers/Source/UART/uart_revb.c
)
target_include_directories(${BOARD_TARGET} PUBLIC
${MSDK_LIB}/PeriphDrivers/Source/AES
${MSDK_LIB}/PeriphDrivers/Source/TRNG
)
else()
message(FATAL_ERROR "Unsupported MAX device: ${MAX_DEVICE}")
endif()
target_compile_definitions(${BOARD_TARGET} PUBLIC
TARGET=${MAX_DEVICE_UPPER}
TARGET_REV=0x4131
MXC_ASSERT_ENABLE
${MAX_DEVICE_UPPER}
IAR_PRAGMAS=0
MAX_PERIPH_ID=${PERIPH_ID}
BOARD_TUD_MAX_SPEED=OPT_MODE_HIGH_SPEED
)
target_compile_options(${BOARD_TARGET} PRIVATE
-Wno-error=strict-prototypes
)
update_board(${BOARD_TARGET})
if (CMAKE_C_COMPILER_ID STREQUAL "GNU")
target_link_options(${BOARD_TARGET} PUBLIC
"LINKER:--script=${LD_FILE_GNU}"
-nostartfiles
--specs=nosys.specs --specs=nano.specs
)
elseif (CMAKE_C_COMPILER_ID STREQUAL "Clang")
target_link_options(${BOARD_TARGET} PUBLIC
"LINKER:--script=${LD_FILE_Clang}"
)
endif ()
endfunction()
#------------------------------------
# Functions
#------------------------------------
function(family_configure_example TARGET RTOS)
family_configure_common(${TARGET} ${RTOS})
# Board target
add_board_target(board_${BOARD})
#---------- Port Specific ----------
# These files are built for each example since it depends on example's tusb_config.h
target_sources(${TARGET} PUBLIC
# BSP
${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c
${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../board.c
)
target_include_directories(${TARGET} PUBLIC
# family, hw, board
${CMAKE_CURRENT_FUNCTION_LIST_DIR}
${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../../
${CMAKE_CURRENT_FUNCTION_LIST_DIR}/boards/${BOARD}
)
# Add TinyUSB target and port source
family_add_tinyusb(${TARGET} OPT_MCU_${MAX_DEVICE_UPPER})
target_sources(${TARGET} PUBLIC
${TOP}/src/portable/mentor/musb/dcd_musb.c
)
target_compile_options(${TARGET} PRIVATE
-Wno-error=strict-prototypes
)
target_link_libraries(${TARGET} PUBLIC board_${BOARD})
# Flashing
family_add_bin_hex(${TARGET})
family_flash_jlink(${TARGET})
sign_image(${TARGET}) # for secured device such as max32651
family_flash_openocd_adi(${TARGET})
endfunction()

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hw/bsp/maxim/family.mk Normal file
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@@ -0,0 +1,190 @@
MSDK_LIB = hw/mcu/analog/msdk/Libraries
# Add any board specific make rules
include $(TOP)/$(BOARD_PATH)/board.mk
CPU_CORE ?= cortex-m4
PORT ?= 0
JLINK_DEVICE = ${MAX_DEVICE}
MAX_DEVICE_UPPER = $(call to_upper,${MAX_DEVICE})
ifeq ($(MAX_DEVICE),max32650)
PERIPH_ID = 10
PERIPH_SUFFIX = me
endif
ifneq ($(filter $(MAX_DEVICE),max32665 max32666),)
PERIPH_ID = 14
PERIPH_SUFFIX = me
endif
ifeq ($(MAX_DEVICE),max32690)
PERIPH_ID = 18
PERIPH_SUFFIX = me
endif
ifeq ($(MAX_DEVICE),max78002)
PERIPH_ID = 87
PERIPH_SUFFIX = ai
endif
ifndef PERIPH_ID
$(error Unsupported MAX device: ${MAX_DEVICE})
endif
# Configure the flash rule. By default, use JLink.
SIGNED_BUILD ?= 0
DEFAULT_FLASH = flash-jlink
# --------------
# Compiler Flags
# --------------
CFLAGS += \
-DTARGET=${MAX_DEVICE_UPPER}\
-DTARGET_REV=0x4131 \
-DMXC_ASSERT_ENABLE \
-D${MAX_DEVICE_UPPER} \
-DIAR_PRAGMAS=0 \
-DMAX_PERIPH_ID=${PERIPH_ID} \
-DCFG_TUSB_MCU=OPT_MCU_${MAX_DEVICE_UPPER} \
-DBOARD_TUD_MAX_SPEED=OPT_MODE_HIGH_SPEED
# mcu driver cause following warnings
CFLAGS += \
-Wno-error=old-style-declaration \
-Wno-error=redundant-decls \
-Wno-error=strict-prototypes \
-Wno-error=unused-parameter \
-Wno-error=cast-align \
-Wno-error=cast-qual \
-Wno-error=sign-compare \
-Wno-error=enum-conversion \
LDFLAGS_GCC += -nostartfiles --specs=nosys.specs --specs=nano.specs
LD_FILE_GCC ?= $(FAMILY_PATH)/linker/${MAX_DEVICE}.ld
# If the applications needs to be signed (for the MAX32651), sign it first and
# then need to use MSDK's OpenOCD to flash it
# Also need to include the __SLA_FWK__ define to enable the signed header into
# memory
ifeq ($(SIGNED_BUILD), 1)
# Extra definitions to build for the secure part
CFLAGS += -D__SLA_FWK__
DEFAULT_FLASH := sign-build flash-msdk
endif
# -----------------
# Sources & Include
# -----------------
# common
SRC_C += \
src/portable/mentor/musb/dcd_musb.c \
${MSDK_LIB}/CMSIS/Device/Maxim/${MAX_DEVICE_UPPER}/Source/heap.c \
${MSDK_LIB}/CMSIS/Device/Maxim/${MAX_DEVICE_UPPER}/Source/system_${MAX_DEVICE}.c \
${MSDK_LIB}/PeriphDrivers/Source/SYS/mxc_assert.c \
${MSDK_LIB}/PeriphDrivers/Source/SYS/mxc_delay.c \
${MSDK_LIB}/PeriphDrivers/Source/SYS/mxc_lock.c \
${MSDK_LIB}/PeriphDrivers/Source/SYS/nvic_table.c \
${MSDK_LIB}/PeriphDrivers/Source/SYS/pins_${PERIPH_SUFFIX}${PERIPH_ID}.c \
${MSDK_LIB}/PeriphDrivers/Source/SYS/sys_${PERIPH_SUFFIX}${PERIPH_ID}.c \
${MSDK_LIB}/PeriphDrivers/Source/FLC/flc_common.c \
${MSDK_LIB}/PeriphDrivers/Source/FLC/flc_${PERIPH_SUFFIX}${PERIPH_ID}.c \
${MSDK_LIB}/PeriphDrivers/Source/FLC/flc_reva.c \
${MSDK_LIB}/PeriphDrivers/Source/GPIO/gpio_common.c \
${MSDK_LIB}/PeriphDrivers/Source/GPIO/gpio_${PERIPH_SUFFIX}${PERIPH_ID}.c \
${MSDK_LIB}/PeriphDrivers/Source/GPIO/gpio_reva.c \
${MSDK_LIB}/PeriphDrivers/Source/ICC/icc_${PERIPH_SUFFIX}${PERIPH_ID}.c \
${MSDK_LIB}/PeriphDrivers/Source/ICC/icc_reva.c \
${MSDK_LIB}/PeriphDrivers/Source/UART/uart_common.c \
${MSDK_LIB}/PeriphDrivers/Source/UART/uart_${PERIPH_SUFFIX}${PERIPH_ID}.c \
SRC_S_GCC += ${MSDK_LIB}/CMSIS/Device/Maxim/${MAX_DEVICE_UPPER}/Source/GCC/startup_${MAX_DEVICE}.S
INC += \
$(TOP)/$(BOARD_PATH) \
$(TOP)/${MSDK_LIB}/CMSIS/5.9.0/Core/Include \
$(TOP)/${MSDK_LIB}/CMSIS/Device/Maxim/${MAX_DEVICE_UPPER}/Include \
$(TOP)/${MSDK_LIB}/PeriphDrivers/Include/${MAX_DEVICE_UPPER} \
$(TOP)/${MSDK_LIB}/PeriphDrivers/Source/SYS \
$(TOP)/${MSDK_LIB}/PeriphDrivers/Source/GPIO \
$(TOP)/${MSDK_LIB}/PeriphDrivers/Source/ICC \
$(TOP)/${MSDK_LIB}/PeriphDrivers/Source/FLC \
$(TOP)/${MSDK_LIB}/PeriphDrivers/Source/UART \
# device specific
ifneq ($(filter $(MAX_DEVICE),max32650 max32665 max32666),)
SRC_C += \
${MSDK_LIB}/PeriphDrivers/Source/ICC/icc_common.c \
${MSDK_LIB}/PeriphDrivers/Source/TPU/tpu_${PERIPH_SUFFIX}${PERIPH_ID}.c \
${MSDK_LIB}/PeriphDrivers/Source/TPU/tpu_reva.c \
${MSDK_LIB}/PeriphDrivers/Source/UART/uart_reva.c \
INC += $(TOP)/${MSDK_LIB}/PeriphDrivers/Source/TPU
endif
ifeq (${MAX_DEVICE},max32690)
SRC_C += \
${MSDK_LIB}/PeriphDrivers/Source/CTB/ctb_${PERIPH_SUFFIX}${PERIPH_ID}.c \
${MSDK_LIB}/PeriphDrivers/Source/CTB/ctb_reva.c \
${MSDK_LIB}/PeriphDrivers/Source/CTB/ctb_common.c \
${MSDK_LIB}/PeriphDrivers/Source/UART/uart_revb.c \
INC += ${TOP}/${MSDK_LIB}/PeriphDrivers/Source/CTB
endif
ifeq (${MAX_DEVICE},max78002)
SRC_C += \
${MSDK_LIB}/PeriphDrivers/Source/AES/aes_${PERIPH_SUFFIX}${PERIPH_ID}.c \
${MSDK_LIB}/PeriphDrivers/Source/AES/aes_revb.c \
${MSDK_LIB}/PeriphDrivers/Source/TRNG/trng_${PERIPH_SUFFIX}${PERIPH_ID}.c \
${MSDK_LIB}/PeriphDrivers/Source/TRNG/trng_revb.c \
${MSDK_LIB}/PeriphDrivers/Source/UART/uart_revb.c \
INC += \
${TOP}/${MSDK_LIB}/PeriphDrivers/Source/AES \
${TOP}/${MSDK_LIB}/PeriphDrivers/Source/TRNG
endif
# The MAX32651EVKIT is pin for pin identical to the MAX32650EVKIT, however the
# MAX32651 has a secure bootloader which requires the image to be signed before
# loading into flash. All MAX32651EVKIT's have the same key for evaluation
# purposes, so create a special flash rule to sign the binary and flash using
# the MSDK.
MCU_PATH = $(TOP)/hw/mcu/analog/msdk/
# Assume no extension for sign utility
SIGN_EXE = sign_app
ifeq ($(OS), Windows_NT)
# Must use .exe extension on Windows, since the binaries
# for Linux may live in the same place.
SIGN_EXE := sign_app.exe
else
UNAME = $(shell uname -s)
ifneq ($(findstring MSYS_NT,$(UNAME)),)
# Must also use .exe extension for MSYS2
SIGN_EXE := sign_app.exe
endif
endif
# Rule to sign the build. This will in-place modify the existing .elf file
# an populate the .sig section with the signature value
sign-build: $(BUILD)/$(PROJECT).elf
$(OBJCOPY) $(BUILD)/$(PROJECT).elf -R .sig -O binary $(BUILD)/$(PROJECT).bin
$(MCU_PATH)/Tools/SBT/bin/$(SIGN_EXE) -c MAX32651 \
key_file="$(MCU_PATH)/Tools/SBT/devices/MAX32651/keys/maximtestcrk.key" \
ca=$(BUILD)/$(PROJECT).bin sca=$(BUILD)/$(PROJECT).sbin
$(OBJCOPY) $(BUILD)/$(PROJECT).elf --update-section .sig=$(BUILD)/$(PROJECT).sig
# Optional flash option when running within an installed MSDK to use OpenOCD
# Mainline OpenOCD does not yet have the MAX32's flash algorithm integrated.
# If the MSDK is installed, flash-msdk can be run to utilize the the modified
# openocd with the algorithms
MAXIM_PATH := $(subst \,/,$(MAXIM_PATH))
flash-msdk: $(BUILD)/$(PROJECT).elf
$(MAXIM_PATH)/Tools/OpenOCD/openocd -s $(MAXIM_PATH)/Tools/OpenOCD/scripts \
-f interface/cmsis-dap.cfg -f target/max32650.cfg \
-c "program $(BUILD)/$(PROJECT).elf verify; init; reset; exit"
# Configure the flash rule
flash: $(DEFAULT_FLASH)

0
hw/bsp/max32650/boards/max32650evkit/max32650.ld → hw/bsp/maxim/linker/max32650.ld
View File

0
hw/bsp/max32650/boards/max32651evkit/max32651.ld → hw/bsp/maxim/linker/max32651.ld
View File

0
hw/bsp/max32666/max32666.ld → hw/bsp/maxim/linker/max32665.ld
View File

0
hw/bsp/max32690/max32690.ld → hw/bsp/maxim/linker/max32690.ld
View File

0
hw/bsp/max78002/max78002.ld → hw/bsp/maxim/linker/max78002.ld
View File

4
hw/bsp/mcx/boards/frdm_mcxa153/board.h
View File

@@ -39,10 +39,10 @@ extern "C" {
// LED
#define LED_GPIO GPIO3
#define LED_CLK kCLOCK_GateGPIO3
#define LED_PIN 12 // red
#define LED_PIN 12 //red
#define LED_STATE_ON 0
// ISP button (Dummy, use unused pin
// ISP button
#define BUTTON_GPIO GPIO3
#define BUTTON_CLK kCLOCK_GateGPIO3
#define BUTTON_PIN 29 //sw2

4
hw/bsp/mcx/boards/frdm_mcxa153/clock_config.c
View File

@@ -45,14 +45,13 @@ processor_version: 0.13.0
* Variables
******************************************************************************/
/* System clock frequency. */
//uint32_t SystemCoreClock;
//extern uint32_t SystemCoreClock;
/*******************************************************************************
************************ BOARD_InitBootClocks function ************************
******************************************************************************/
void BOARD_InitBootClocks(void)
{
BOARD_BootClockFRO96M();
}
/*******************************************************************************
@@ -386,7 +385,6 @@ void BOARD_BootClockFRO64M(void)
/* TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
!!Configuration
name: BOARD_BootClockFRO96M
called_from_default_init: true
outputs:
- {id: CLK_1M_clock.outFreq, value: 1 MHz}
- {id: CLK_48M_clock.outFreq, value: 48 MHz}

53
hw/bsp/mcx/boards/frdm_mcxa153/pin_mux.c
View File

@@ -4,7 +4,6 @@
*
* SPDX-License-Identifier: BSD-3-Clause
*/
/***********************************************************************************************************************
* This file was generated by the MCUXpresso Config Tools. Any manual edits made to this file
* will be overwritten if the respective MCUXpresso Config Tools is used to update this file.
@@ -18,16 +17,13 @@ product: Pins v14.0
processor: MCXA153
package_id: MCXA153VLH
mcu_data: ksdk2_0
processor_version: 0.14.3
pin_labels:
- {pin_num: '38', pin_signal: P3_12/LPUART2_RTS_B/CT1_MAT2/PWM0_X0, label: LED_RED, identifier: LED_RED}
processor_version: 0.14.4
* BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS ***********
*/
/* clang-format on */
#include "fsl_common.h"
#include "fsl_port.h"
#include "fsl_gpio.h"
#include "pin_mux.h"
/* FUNCTION ************************************************************************************************************
@@ -47,8 +43,10 @@ void BOARD_InitBootPins(void)
BOARD_InitPins:
- options: {callFromInitBoot: 'true', coreID: cm33_core0, enableClock: 'true'}
- pin_list:
- {pin_num: '38', peripheral: GPIO3, signal: 'GPIO, 12', pin_signal: P3_12/LPUART2_RTS_B/CT1_MAT2/PWM0_X0, direction: OUTPUT, gpio_init_state: 'false', slew_rate: fast,
open_drain: disable, drive_strength: low, pull_select: down, pull_enable: disable, input_buffer: enable, invert_input: normal}
- {pin_num: '51', peripheral: LPUART0, signal: RX, pin_signal: P0_2/TDO/SWO/LPUART0_RXD/LPSPI0_SCK/CT0_MAT0/UTICK_CAP0/I3C0_PUR, slew_rate: fast, open_drain: disable,
drive_strength: low, pull_select: up, pull_enable: enable, input_buffer: enable, invert_input: normal}
- {pin_num: '52', peripheral: LPUART0, signal: TX, pin_signal: P0_3/TDI/LPUART0_TXD/LPSPI0_SDO/CT0_MAT1/UTICK_CAP1/CMP0_OUT/CMP1_IN1, slew_rate: fast, open_drain: disable,
drive_strength: low, pull_select: up, pull_enable: enable, input_buffer: enable, invert_input: normal}
* BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS ***********
*/
/* clang-format on */
@@ -61,15 +59,6 @@ BOARD_InitPins:
* END ****************************************************************************************************************/
void BOARD_InitPins(void)
{
RESET_PeripheralReset(kLPUART0_RST_SHIFT_RSTn);
RESET_PeripheralReset(kPORT0_RST_SHIFT_RSTn);
CLOCK_SetClockDiv(kCLOCK_DivLPUART0, 1u);
CLOCK_AttachClk(kFRO12M_to_LPUART0);
/* write to PORT0: Peripheral clock is enabled */
CLOCK_EnableClock(kCLOCK_GatePORT0);
/* Write to GPIO3: Peripheral clock is enabled */
CLOCK_EnableClock(kCLOCK_GateGPIO3);
/* Write to PORT3: Peripheral clock is enabled */
CLOCK_EnableClock(kCLOCK_GatePORT3);
@@ -78,30 +67,13 @@ void BOARD_InitPins(void)
/* PORT3 peripheral is released from reset */
RESET_ReleasePeripheralReset(kPORT3_RST_SHIFT_RSTn);
const port_pin_config_t port3_12_pin38_config = {/* Internal pull-up/down resistor is disabled */
kPORT_PullDisable,
/* Low internal pull resistor value is selected. */
kPORT_LowPullResistor,
/* Fast slew rate is configured */
kPORT_FastSlewRate,
/* Passive input filter is disabled */
kPORT_PassiveFilterDisable,
/* Open drain output is disabled */
kPORT_OpenDrainDisable,
/* Low drive strength is configured */
kPORT_LowDriveStrength,
/* Normal drive strength is configured */
kPORT_NormalDriveStrength,
/* Pin is configured as P3_12 */
kPORT_MuxAlt0,
/* Digital input enabled */
kPORT_InputBufferEnable,
/* Digital input is not inverted */
kPORT_InputNormal,
/* Pin Control Register fields [15:0] are not locked */
kPORT_UnlockRegister};
/* PORT3_12 (pin 38) is configured as P3_12 */
PORT_SetPinConfig(PORT3, 12U, &port3_12_pin38_config);
/* Write to PORT0: Peripheral clock is enabled */
CLOCK_EnableClock(kCLOCK_GatePORT0);
/* LPUART0 peripheral is released from reset */
RESET_ReleasePeripheralReset(kLPUART0_RST_SHIFT_RSTn);
/* PORT0 peripheral is released from reset */
RESET_ReleasePeripheralReset(kPORT0_RST_SHIFT_RSTn);
const port_pin_config_t port0_2_pin51_config = {/* Internal pull-up resistor is enabled */
kPORT_PullUp,
@@ -152,7 +124,6 @@ void BOARD_InitPins(void)
kPORT_UnlockRegister};
/* PORT0_3 (pin 52) is configured as LPUART0_TXD */
PORT_SetPinConfig(PORT0, 3U, &port0_3_pin52_config);
}
/***********************************************************************************************************************
* EOF

6
hw/bsp/mcx/boards/frdm_mcxa153/pin_mux.h
View File

@@ -1,9 +1,13 @@
/*
* Copyright 2022 NXP
* Copyright 2023 NXP
* All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
/***********************************************************************************************************************
* This file was generated by the MCUXpresso Config Tools. Any manual edits made to this file
* will be overwritten if the respective MCUXpresso Config Tools is used to update this file.
**********************************************************************************************************************/
#ifndef _PIN_MUX_H_
#define _PIN_MUX_H_

21
hw/bsp/mcx/boards/frdm_mcxa156/board.cmake Normal file
View File

@@ -0,0 +1,21 @@
set(MCU_VARIANT MCXA156)
set(MCU_CORE MCXA156)
set(JLINK_DEVICE MCXA156_M33)
set(PYOCD_TARGET MCXA156)
set(NXPLINK_DEVICE MCXA156:MCXA156)
set(PORT 0)
function(update_board TARGET)
target_compile_definitions(${TARGET} PUBLIC
CPU_MCXA156VLH
BOARD_TUD_RHPORT=0
BOARD_TUD_MAX_SPEED=OPT_MODE_FULL_SPEED
CFG_EXAMPLE_VIDEO_READONLY
)
target_sources(${TARGET} PUBLIC
${CMAKE_CURRENT_FUNCTION_LIST_DIR}/clock_config.c
${CMAKE_CURRENT_FUNCTION_LIST_DIR}/pin_mux.c
)
endfunction()

69
hw/bsp/mcx/boards/frdm_mcxa156/board.h Normal file
View File

@@ -0,0 +1,69 @@
/*
* The MIT License (MIT)
*
* Copyright (c) 2021, Ha Thach (tinyusb.org)
*
* Permission is hereby granted, free of charge, to any person obtaining a copy
* of this software and associated documentation files (the "Software"), to deal
* in the Software without restriction, including without limitation the rights
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
* copies of the Software, and to permit persons to whom the Software is
* furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
* THE SOFTWARE.
*
* This file is part of the TinyUSB stack.
*/
/* metadata:
name: Freedom MCXA156
url: https://www.nxp.com/design/design-center/development-boards-and-designs/FRDM-MCXA156
*/
#ifndef BOARD_H_
#define BOARD_H_
#ifdef __cplusplus
extern "C" {
#endif
// LED
#define LED_GPIO GPIO3
#define LED_CLK kCLOCK_GateGPIO3
#define LED_PIN 12 // red
#define LED_STATE_ON 0
// ISP button
#define BUTTON_GPIO GPIO0
#define BUTTON_CLK kCLOCK_GateGPIO0
#define BUTTON_PIN 6 //SW3
#define BUTTON_STATE_ACTIVE 0
// UART
#define UART_DEV LPUART0
static inline void board_uart_init_clock(void) {
/* attach 12 MHz clock to LPUART0 (debug console) */
CLOCK_SetClockDiv(kCLOCK_DivLPUART0, 1u);
CLOCK_AttachClk(kFRO12M_to_LPUART0);
RESET_PeripheralReset(kLPUART0_RST_SHIFT_RSTn);
}
// XTAL
#define XTAL0_CLK_HZ (24 * 1000 * 1000U)
#ifdef __cplusplus
}
#endif
#endif

14
hw/bsp/mcx/boards/frdm_mcxa156/board.mk Normal file
View File

@@ -0,0 +1,14 @@
MCU_VARIANT = MCXA156
MCU_CORE = MCXA156
PORT = 0
CPU_CORE = cortex-m33-nodsp-nofp
CFLAGS += \
-DCPU_MCXA156VLH \
-DCFG_TUSB_MCU=OPT_MCU_MCXA15 \
JLINK_DEVICE = MCXA156
PYOCD_TARGET = MCXA156
# flash using pyocd
flash: flash-jlink

482
hw/bsp/mcx/boards/frdm_mcxa156/clock_config.c Normal file
View File

@@ -0,0 +1,482 @@
/*
* Copyright 2024 NXP
*
* SPDX-License-Identifier: BSD-3-Clause
*/
/***********************************************************************************************************************
* This file was generated by the MCUXpresso Config Tools. Any manual edits made to this file
* will be overwritten if the respective MCUXpresso Config Tools is used to update this file.
**********************************************************************************************************************/
/*
* How to setup clock using clock driver functions:
*
* 1. Setup clock sources.
*
* 2. Set up wait states of the flash.
*
* 3. Set up all dividers.
*
* 4. Set up all selectors to provide selected clocks.
*
*/
/* clang-format off */
/* TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
!!GlobalInfo
product: Clocks v13.0
processor: MCXA156
package_id: MCXA156VLL
mcu_data: ksdk2_0
processor_version: 0.15.0
* BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS **********/
/* clang-format on */
#include "fsl_clock.h"
#include "clock_config.h"
#include "fsl_spc.h"
/*******************************************************************************
* Definitions
******************************************************************************/
/*******************************************************************************
* Variables
******************************************************************************/
/* System clock frequency. */
//extern uint32_t SystemCoreClock;
/*******************************************************************************
************************ BOARD_InitBootClocks function ************************
******************************************************************************/
void BOARD_InitBootClocks(void)
{
BOARD_BootClockFRO96M();
}
/*******************************************************************************
******************** Configuration BOARD_BootClockFRO12M **********************
******************************************************************************/
/* clang-format off */
/* TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
!!Configuration
name: BOARD_BootClockFRO12M
outputs:
- {id: CLK_1M_clock.outFreq, value: 1 MHz}
- {id: CPU_clock.outFreq, value: 12 MHz}
- {id: FRO_12M_clock.outFreq, value: 12 MHz}
- {id: MAIN_clock.outFreq, value: 12 MHz}
- {id: Slow_clock.outFreq, value: 3 MHz}
- {id: System_clock.outFreq, value: 12 MHz}
- {id: UTICK_clock.outFreq, value: 1 MHz}
settings:
- {id: SCGMode, value: SIRC}
- {id: FRO_HF_PERIPHERALS_EN_CFG, value: Disabled}
- {id: MRCC.FREQMEREFCLKSEL.sel, value: MRCC.aoi0_out0}
- {id: MRCC.FREQMETARGETCLKSEL.sel, value: MRCC.aoi0_out0}
- {id: MRCC.OSTIMERCLKSEL.sel, value: VBAT.CLK16K_1}
- {id: SCG.SCSSEL.sel, value: SCG.SIRC}
- {id: SCG_FIRCCSR_FIRCEN_CFG, value: Disabled}
* BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS **********/
/* clang-format on */
/*******************************************************************************
* Variables for BOARD_BootClockFRO12M configuration
******************************************************************************/
/*******************************************************************************
* Code for BOARD_BootClockFRO12M configuration
******************************************************************************/
void BOARD_BootClockFRO12M(void)
{
uint32_t coreFreq;
spc_active_mode_core_ldo_option_t ldoOption;
spc_sram_voltage_config_t sramOption;
/* Get the CPU Core frequency */
coreFreq = CLOCK_GetCoreSysClkFreq();
/* The flow of increasing voltage and frequency */
if (coreFreq <= BOARD_BOOTCLOCKFRO12M_CORE_CLOCK) {
/* Set the LDO_CORE VDD regulator level */
ldoOption.CoreLDOVoltage = kSPC_CoreLDO_MidDriveVoltage;
ldoOption.CoreLDODriveStrength = kSPC_CoreLDO_NormalDriveStrength;
(void)SPC_SetActiveModeCoreLDORegulatorConfig(SPC0, &ldoOption);
/* Configure Flash to support different voltage level and frequency */
FMU0->FCTRL = (FMU0->FCTRL & ~((uint32_t)FMU_FCTRL_RWSC_MASK)) | (FMU_FCTRL_RWSC(0x0U));
/* Specifies the operating voltage for the SRAM's read/write timing margin */
sramOption.operateVoltage = kSPC_sramOperateAt1P0V;
sramOption.requestVoltageUpdate = true;
(void)SPC_SetSRAMOperateVoltage(SPC0, &sramOption);
}
CLOCK_SetupFRO12MClocking(); /*!< Setup FRO12M clock */
CLOCK_AttachClk(kFRO12M_to_MAIN_CLK); /* !< Switch MAIN_CLK to FRO12M */
/* The flow of decreasing voltage and frequency */
if (coreFreq > BOARD_BOOTCLOCKFRO12M_CORE_CLOCK) {
/* Configure Flash to support different voltage level and frequency */
FMU0->FCTRL = (FMU0->FCTRL & ~((uint32_t)FMU_FCTRL_RWSC_MASK)) | (FMU_FCTRL_RWSC(0x0U));
/* Specifies the operating voltage for the SRAM's read/write timing margin */
sramOption.operateVoltage = kSPC_sramOperateAt1P0V;
sramOption.requestVoltageUpdate = true;
(void)SPC_SetSRAMOperateVoltage(SPC0, &sramOption);
/* Set the LDO_CORE VDD regulator level */
ldoOption.CoreLDOVoltage = kSPC_CoreLDO_MidDriveVoltage;
ldoOption.CoreLDODriveStrength = kSPC_CoreLDO_NormalDriveStrength;
(void)SPC_SetActiveModeCoreLDORegulatorConfig(SPC0, &ldoOption);
}
/*!< Set up clock selectors - Attach clocks to the peripheries */
/*!< Set up dividers */
CLOCK_SetClockDiv(kCLOCK_DivAHBCLK, 1U); /* !< Set AHBCLKDIV divider to value 1 */
/* Set SystemCoreClock variable */
SystemCoreClock = BOARD_BOOTCLOCKFRO12M_CORE_CLOCK;
}
/*******************************************************************************
******************** Configuration BOARD_BootClockFRO24M **********************
******************************************************************************/
/* clang-format off */
/* TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
!!Configuration
name: BOARD_BootClockFRO24M
outputs:
- {id: CLK_1M_clock.outFreq, value: 1 MHz}
- {id: CLK_48M_clock.outFreq, value: 48 MHz}
- {id: CPU_clock.outFreq, value: 24 MHz}
- {id: FRO_12M_clock.outFreq, value: 12 MHz}
- {id: FRO_HF_DIV_clock.outFreq, value: 48 MHz}
- {id: FRO_HF_clock.outFreq, value: 48 MHz}
- {id: MAIN_clock.outFreq, value: 48 MHz}
- {id: Slow_clock.outFreq, value: 6 MHz}
- {id: System_clock.outFreq, value: 24 MHz}
- {id: UTICK_clock.outFreq, value: 1 MHz}
settings:
- {id: MRCC.FREQMEREFCLKSEL.sel, value: MRCC.aoi0_out0}
- {id: MRCC.FREQMETARGETCLKSEL.sel, value: MRCC.aoi0_out0}
- {id: MRCC.OSTIMERCLKSEL.sel, value: VBAT.CLK16K_1}
- {id: SYSCON.AHBCLKDIV.scale, value: '2', locked: true}
* BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS **********/
/* clang-format on */
/*******************************************************************************
* Variables for BOARD_BootClockFRO24M configuration
******************************************************************************/
/*******************************************************************************
* Code for BOARD_BootClockFRO24M configuration
******************************************************************************/
void BOARD_BootClockFRO24M(void)
{
uint32_t coreFreq;
spc_active_mode_core_ldo_option_t ldoOption;
spc_sram_voltage_config_t sramOption;
/* Get the CPU Core frequency */
coreFreq = CLOCK_GetCoreSysClkFreq();
/* The flow of increasing voltage and frequency */
if (coreFreq <= BOARD_BOOTCLOCKFRO24M_CORE_CLOCK) {
/* Set the LDO_CORE VDD regulator level */
ldoOption.CoreLDOVoltage = kSPC_CoreLDO_MidDriveVoltage;
ldoOption.CoreLDODriveStrength = kSPC_CoreLDO_NormalDriveStrength;
(void)SPC_SetActiveModeCoreLDORegulatorConfig(SPC0, &ldoOption);
/* Configure Flash to support different voltage level and frequency */
FMU0->FCTRL = (FMU0->FCTRL & ~((uint32_t)FMU_FCTRL_RWSC_MASK)) | (FMU_FCTRL_RWSC(0x0U));
/* Specifies the operating voltage for the SRAM's read/write timing margin */
sramOption.operateVoltage = kSPC_sramOperateAt1P0V;
sramOption.requestVoltageUpdate = true;
(void)SPC_SetSRAMOperateVoltage(SPC0, &sramOption);
}
CLOCK_SetupFROHFClocking(48000000U); /*!< Enable FRO HF(48MHz) output */
CLOCK_SetupFRO12MClocking(); /*!< Setup FRO12M clock */
CLOCK_AttachClk(kFRO_HF_to_MAIN_CLK); /* !< Switch MAIN_CLK to FRO_HF */
/* The flow of decreasing voltage and frequency */
if (coreFreq > BOARD_BOOTCLOCKFRO24M_CORE_CLOCK) {
/* Configure Flash to support different voltage level and frequency */
FMU0->FCTRL = (FMU0->FCTRL & ~((uint32_t)FMU_FCTRL_RWSC_MASK)) | (FMU_FCTRL_RWSC(0x0U));
/* Specifies the operating voltage for the SRAM's read/write timing margin */
sramOption.operateVoltage = kSPC_sramOperateAt1P0V;
sramOption.requestVoltageUpdate = true;
(void)SPC_SetSRAMOperateVoltage(SPC0, &sramOption);
/* Set the LDO_CORE VDD regulator level */
ldoOption.CoreLDOVoltage = kSPC_CoreLDO_MidDriveVoltage;
ldoOption.CoreLDODriveStrength = kSPC_CoreLDO_NormalDriveStrength;
(void)SPC_SetActiveModeCoreLDORegulatorConfig(SPC0, &ldoOption);
}
/*!< Set up clock selectors - Attach clocks to the peripheries */
/*!< Set up dividers */
CLOCK_SetClockDiv(kCLOCK_DivAHBCLK, 2U); /* !< Set AHBCLKDIV divider to value 2 */
CLOCK_SetClockDiv(kCLOCK_DivFRO_HF_DIV, 1U); /* !< Set FROHFDIV divider to value 1 */
/* Set SystemCoreClock variable */
SystemCoreClock = BOARD_BOOTCLOCKFRO24M_CORE_CLOCK;
}
/*******************************************************************************
******************** Configuration BOARD_BootClockFRO48M **********************
******************************************************************************/
/* clang-format off */
/* TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
!!Configuration
name: BOARD_BootClockFRO48M
outputs:
- {id: CLK_1M_clock.outFreq, value: 1 MHz}
- {id: CLK_48M_clock.outFreq, value: 48 MHz}
- {id: CPU_clock.outFreq, value: 48 MHz}
- {id: FRO_12M_clock.outFreq, value: 12 MHz}
- {id: FRO_HF_DIV_clock.outFreq, value: 48 MHz}
- {id: FRO_HF_clock.outFreq, value: 48 MHz}
- {id: MAIN_clock.outFreq, value: 48 MHz}
- {id: Slow_clock.outFreq, value: 12 MHz}
- {id: System_clock.outFreq, value: 48 MHz}
- {id: UTICK_clock.outFreq, value: 1 MHz}
settings:
- {id: MRCC.FREQMEREFCLKSEL.sel, value: MRCC.aoi0_out0}
- {id: MRCC.FREQMETARGETCLKSEL.sel, value: MRCC.aoi0_out0}
- {id: MRCC.OSTIMERCLKSEL.sel, value: VBAT.CLK16K_1}
* BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS **********/
/* clang-format on */
/*******************************************************************************
* Variables for BOARD_BootClockFRO48M configuration
******************************************************************************/
/*******************************************************************************
* Code for BOARD_BootClockFRO48M configuration
******************************************************************************/
void BOARD_BootClockFRO48M(void)
{
uint32_t coreFreq;
spc_active_mode_core_ldo_option_t ldoOption;
spc_sram_voltage_config_t sramOption;
/* Get the CPU Core frequency */
coreFreq = CLOCK_GetCoreSysClkFreq();
/* The flow of increasing voltage and frequency */
if (coreFreq <= BOARD_BOOTCLOCKFRO48M_CORE_CLOCK) {
/* Set the LDO_CORE VDD regulator level */
ldoOption.CoreLDOVoltage = kSPC_CoreLDO_MidDriveVoltage;
ldoOption.CoreLDODriveStrength = kSPC_CoreLDO_NormalDriveStrength;
(void)SPC_SetActiveModeCoreLDORegulatorConfig(SPC0, &ldoOption);
/* Configure Flash to support different voltage level and frequency */
FMU0->FCTRL = (FMU0->FCTRL & ~((uint32_t)FMU_FCTRL_RWSC_MASK)) | (FMU_FCTRL_RWSC(0x1U));
/* Specifies the operating voltage for the SRAM's read/write timing margin */
sramOption.operateVoltage = kSPC_sramOperateAt1P0V;
sramOption.requestVoltageUpdate = true;
(void)SPC_SetSRAMOperateVoltage(SPC0, &sramOption);
}
CLOCK_SetupFROHFClocking(48000000U); /*!< Enable FRO HF(48MHz) output */
CLOCK_SetupFRO12MClocking(); /*!< Setup FRO12M clock */
CLOCK_AttachClk(kFRO_HF_to_MAIN_CLK); /* !< Switch MAIN_CLK to FRO_HF */
/* The flow of decreasing voltage and frequency */
if (coreFreq > BOARD_BOOTCLOCKFRO48M_CORE_CLOCK) {
/* Configure Flash to support different voltage level and frequency */
FMU0->FCTRL = (FMU0->FCTRL & ~((uint32_t)FMU_FCTRL_RWSC_MASK)) | (FMU_FCTRL_RWSC(0x1U));
/* Specifies the operating voltage for the SRAM's read/write timing margin */
sramOption.operateVoltage = kSPC_sramOperateAt1P0V;
sramOption.requestVoltageUpdate = true;
(void)SPC_SetSRAMOperateVoltage(SPC0, &sramOption);
/* Set the LDO_CORE VDD regulator level */
ldoOption.CoreLDOVoltage = kSPC_CoreLDO_MidDriveVoltage;
ldoOption.CoreLDODriveStrength = kSPC_CoreLDO_NormalDriveStrength;
(void)SPC_SetActiveModeCoreLDORegulatorConfig(SPC0, &ldoOption);
}
/*!< Set up clock selectors - Attach clocks to the peripheries */
/*!< Set up dividers */
CLOCK_SetClockDiv(kCLOCK_DivAHBCLK, 1U); /* !< Set AHBCLKDIV divider to value 1 */
CLOCK_SetClockDiv(kCLOCK_DivFRO_HF_DIV, 1U); /* !< Set FROHFDIV divider to value 1 */
/* Set SystemCoreClock variable */
SystemCoreClock = BOARD_BOOTCLOCKFRO48M_CORE_CLOCK;
}
/*******************************************************************************
******************** Configuration BOARD_BootClockFRO64M **********************
******************************************************************************/
/* clang-format off */
/* TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
!!Configuration
name: BOARD_BootClockFRO64M
outputs:
- {id: CLK_1M_clock.outFreq, value: 1 MHz}
- {id: CLK_48M_clock.outFreq, value: 48 MHz}
- {id: CPU_clock.outFreq, value: 64 MHz}
- {id: FRO_12M_clock.outFreq, value: 12 MHz}
- {id: FRO_HF_DIV_clock.outFreq, value: 64 MHz}
- {id: FRO_HF_clock.outFreq, value: 64 MHz}
- {id: MAIN_clock.outFreq, value: 64 MHz}
- {id: Slow_clock.outFreq, value: 16 MHz}
- {id: System_clock.outFreq, value: 64 MHz}
- {id: UTICK_clock.outFreq, value: 1 MHz}
settings:
- {id: VDD_CORE, value: voltage_1v1}
- {id: MRCC.FREQMEREFCLKSEL.sel, value: MRCC.aoi0_out0}
- {id: MRCC.FREQMETARGETCLKSEL.sel, value: MRCC.aoi0_out0}
- {id: MRCC.FROHFDIV.scale, value: '1', locked: true}
- {id: MRCC.OSTIMERCLKSEL.sel, value: VBAT.CLK16K_1}
- {id: SYSCON.AHBCLKDIV.scale, value: '1', locked: true}
sources:
- {id: SCG.FIRC.outFreq, value: 64 MHz}
* BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS **********/
/* clang-format on */
/*******************************************************************************
* Variables for BOARD_BootClockFRO64M configuration
******************************************************************************/
/*******************************************************************************
* Code for BOARD_BootClockFRO64M configuration
******************************************************************************/
void BOARD_BootClockFRO64M(void)
{
uint32_t coreFreq;
spc_active_mode_core_ldo_option_t ldoOption;
spc_sram_voltage_config_t sramOption;
/* Get the CPU Core frequency */
coreFreq = CLOCK_GetCoreSysClkFreq();
/* The flow of increasing voltage and frequency */
if (coreFreq <= BOARD_BOOTCLOCKFRO64M_CORE_CLOCK) {
/* Set the LDO_CORE VDD regulator level */
ldoOption.CoreLDOVoltage = kSPC_CoreLDO_NormalVoltage;
ldoOption.CoreLDODriveStrength = kSPC_CoreLDO_NormalDriveStrength;
(void)SPC_SetActiveModeCoreLDORegulatorConfig(SPC0, &ldoOption);
/* Configure Flash to support different voltage level and frequency */
FMU0->FCTRL = (FMU0->FCTRL & ~((uint32_t)FMU_FCTRL_RWSC_MASK)) | (FMU_FCTRL_RWSC(0x1U));
/* Specifies the operating voltage for the SRAM's read/write timing margin */
sramOption.operateVoltage = kSPC_sramOperateAt1P1V;
sramOption.requestVoltageUpdate = true;
(void)SPC_SetSRAMOperateVoltage(SPC0, &sramOption);
}
CLOCK_SetupFROHFClocking(64000000U); /*!< Enable FRO HF(64MHz) output */
CLOCK_SetupFRO12MClocking(); /*!< Setup FRO12M clock */
CLOCK_AttachClk(kFRO_HF_to_MAIN_CLK); /* !< Switch MAIN_CLK to FRO_HF */
/* The flow of decreasing voltage and frequency */
if (coreFreq > BOARD_BOOTCLOCKFRO64M_CORE_CLOCK) {
/* Configure Flash to support different voltage level and frequency */
FMU0->FCTRL = (FMU0->FCTRL & ~((uint32_t)FMU_FCTRL_RWSC_MASK)) | (FMU_FCTRL_RWSC(0x1U));
/* Specifies the operating voltage for the SRAM's read/write timing margin */
sramOption.operateVoltage = kSPC_sramOperateAt1P1V;
sramOption.requestVoltageUpdate = true;
(void)SPC_SetSRAMOperateVoltage(SPC0, &sramOption);
/* Set the LDO_CORE VDD regulator level */
ldoOption.CoreLDOVoltage = kSPC_CoreLDO_NormalVoltage;
ldoOption.CoreLDODriveStrength = kSPC_CoreLDO_NormalDriveStrength;
(void)SPC_SetActiveModeCoreLDORegulatorConfig(SPC0, &ldoOption);
}
/*!< Set up clock selectors - Attach clocks to the peripheries */
/*!< Set up dividers */
CLOCK_SetClockDiv(kCLOCK_DivAHBCLK, 1U); /* !< Set AHBCLKDIV divider to value 1 */
CLOCK_SetClockDiv(kCLOCK_DivFRO_HF_DIV, 1U); /* !< Set FROHFDIV divider to value 1 */
/* Set SystemCoreClock variable */
SystemCoreClock = BOARD_BOOTCLOCKFRO64M_CORE_CLOCK;
}
/*******************************************************************************
******************** Configuration BOARD_BootClockFRO96M **********************
******************************************************************************/
/* clang-format off */
/* TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
!!Configuration
name: BOARD_BootClockFRO96M
called_from_default_init: true
outputs:
- {id: CLK_1M_clock.outFreq, value: 1 MHz}
- {id: CLK_48M_clock.outFreq, value: 48 MHz}
- {id: CPU_clock.outFreq, value: 96 MHz}
- {id: FRO_12M_clock.outFreq, value: 12 MHz}
- {id: FRO_HF_DIV_clock.outFreq, value: 96 MHz}
- {id: FRO_HF_clock.outFreq, value: 96 MHz}
- {id: MAIN_clock.outFreq, value: 96 MHz}
- {id: Slow_clock.outFreq, value: 24 MHz}
- {id: System_clock.outFreq, value: 96 MHz}
- {id: UTICK_clock.outFreq, value: 1 MHz}
settings:
- {id: VDD_CORE, value: voltage_1v1}
- {id: CLKOUTDIV_HALT, value: Enable}
- {id: MRCC.FREQMEREFCLKSEL.sel, value: MRCC.aoi0_out0}
- {id: MRCC.FREQMETARGETCLKSEL.sel, value: MRCC.aoi0_out0}
- {id: MRCC.FROHFDIV.scale, value: '1', locked: true}
- {id: MRCC.OSTIMERCLKSEL.sel, value: VBAT.CLK16K_1}
- {id: SYSCON.AHBCLKDIV.scale, value: '1', locked: true}
sources:
- {id: SCG.FIRC.outFreq, value: 96 MHz}
* BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS **********/
/* clang-format on */
/*******************************************************************************
* Variables for BOARD_BootClockFRO96M configuration
******************************************************************************/
/*******************************************************************************
* Code for BOARD_BootClockFRO96M configuration
******************************************************************************/
void BOARD_BootClockFRO96M(void)
{
uint32_t coreFreq;
spc_active_mode_core_ldo_option_t ldoOption;
spc_sram_voltage_config_t sramOption;
/* Get the CPU Core frequency */
coreFreq = CLOCK_GetCoreSysClkFreq();
/* The flow of increasing voltage and frequency */
if (coreFreq <= BOARD_BOOTCLOCKFRO96M_CORE_CLOCK) {
/* Set the LDO_CORE VDD regulator level */
ldoOption.CoreLDOVoltage = kSPC_CoreLDO_NormalVoltage;
ldoOption.CoreLDODriveStrength = kSPC_CoreLDO_NormalDriveStrength;
(void)SPC_SetActiveModeCoreLDORegulatorConfig(SPC0, &ldoOption);
/* Configure Flash to support different voltage level and frequency */
FMU0->FCTRL = (FMU0->FCTRL & ~((uint32_t)FMU_FCTRL_RWSC_MASK)) | (FMU_FCTRL_RWSC(0x2U));
/* Specifies the operating voltage for the SRAM's read/write timing margin */
sramOption.operateVoltage = kSPC_sramOperateAt1P1V;
sramOption.requestVoltageUpdate = true;
(void)SPC_SetSRAMOperateVoltage(SPC0, &sramOption);
}
CLOCK_SetupFROHFClocking(96000000U); /*!< Enable FRO HF(96MHz) output */
CLOCK_SetupFRO12MClocking(); /*!< Setup FRO12M clock */
CLOCK_AttachClk(kFRO_HF_to_MAIN_CLK); /* !< Switch MAIN_CLK to FRO_HF */
/* The flow of decreasing voltage and frequency */
if (coreFreq > BOARD_BOOTCLOCKFRO96M_CORE_CLOCK) {
/* Configure Flash to support different voltage level and frequency */
FMU0->FCTRL = (FMU0->FCTRL & ~((uint32_t)FMU_FCTRL_RWSC_MASK)) | (FMU_FCTRL_RWSC(0x2U));
/* Specifies the operating voltage for the SRAM's read/write timing margin */
sramOption.operateVoltage = kSPC_sramOperateAt1P1V;
sramOption.requestVoltageUpdate = true;
(void)SPC_SetSRAMOperateVoltage(SPC0, &sramOption);
/* Set the LDO_CORE VDD regulator level */
ldoOption.CoreLDOVoltage = kSPC_CoreLDO_NormalVoltage;
ldoOption.CoreLDODriveStrength = kSPC_CoreLDO_NormalDriveStrength;
(void)SPC_SetActiveModeCoreLDORegulatorConfig(SPC0, &ldoOption);
}
/*!< Set up clock selectors - Attach clocks to the peripheries */
/*!< Set up dividers */
CLOCK_SetClockDiv(kCLOCK_DivAHBCLK, 1U); /* !< Set AHBCLKDIV divider to value 1 */
CLOCK_SetClockDiv(kCLOCK_DivFRO_HF_DIV, 1U); /* !< Set FROHFDIV divider to value 1 */
/* Set SystemCoreClock variable */
SystemCoreClock = BOARD_BOOTCLOCKFRO96M_CORE_CLOCK;
}

169
hw/bsp/mcx/boards/frdm_mcxa156/clock_config.h Normal file
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/*
* Copyright 2024 NXP
*
* SPDX-License-Identifier: BSD-3-Clause
*/
/***********************************************************************************************************************
* This file was generated by the MCUXpresso Config Tools. Any manual edits made to this file
* will be overwritten if the respective MCUXpresso Config Tools is used to update this file.
**********************************************************************************************************************/
#ifndef _CLOCK_CONFIG_H_
#define _CLOCK_CONFIG_H_
#include "fsl_common.h"
/*******************************************************************************
* Definitions
******************************************************************************/
/*******************************************************************************
************************ BOARD_InitBootClocks function ************************
******************************************************************************/
#if defined(__cplusplus)
extern "C" {
#endif /* __cplusplus*/
/*!
* @brief This function executes default configuration of clocks.
*
*/
void BOARD_InitBootClocks(void);
#if defined(__cplusplus)
}
#endif /* __cplusplus*/
/*******************************************************************************
******************** Configuration BOARD_BootClockFRO12M **********************
******************************************************************************/
/*******************************************************************************
* Definitions for BOARD_BootClockFRO12M configuration
******************************************************************************/
#define BOARD_BOOTCLOCKFRO12M_CORE_CLOCK 12000000U /*!< Core clock frequency: 12000000Hz */
/*******************************************************************************
* API for BOARD_BootClockFRO12M configuration
******************************************************************************/
#if defined(__cplusplus)
extern "C" {
#endif /* __cplusplus*/
/*!
* @brief This function executes configuration of clocks.
*
*/
void BOARD_BootClockFRO12M(void);
#if defined(__cplusplus)
}
#endif /* __cplusplus*/
/*******************************************************************************
******************** Configuration BOARD_BootClockFRO24M **********************
******************************************************************************/
/*******************************************************************************
* Definitions for BOARD_BootClockFRO24M configuration
******************************************************************************/
#define BOARD_BOOTCLOCKFRO24M_CORE_CLOCK 24000000U /*!< Core clock frequency: 24000000Hz */
/*******************************************************************************
* API for BOARD_BootClockFRO24M configuration
******************************************************************************/
#if defined(__cplusplus)
extern "C" {
#endif /* __cplusplus*/
/*!
* @brief This function executes configuration of clocks.
*
*/
void BOARD_BootClockFRO24M(void);
#if defined(__cplusplus)
}
#endif /* __cplusplus*/
/*******************************************************************************
******************** Configuration BOARD_BootClockFRO48M **********************
******************************************************************************/
/*******************************************************************************
* Definitions for BOARD_BootClockFRO48M configuration
******************************************************************************/
#define BOARD_BOOTCLOCKFRO48M_CORE_CLOCK 48000000U /*!< Core clock frequency: 48000000Hz */
/*******************************************************************************
* API for BOARD_BootClockFRO48M configuration
******************************************************************************/
#if defined(__cplusplus)
extern "C" {
#endif /* __cplusplus*/
/*!
* @brief This function executes configuration of clocks.
*
*/
void BOARD_BootClockFRO48M(void);
#if defined(__cplusplus)
}
#endif /* __cplusplus*/
/*******************************************************************************
******************** Configuration BOARD_BootClockFRO64M **********************
******************************************************************************/
/*******************************************************************************
* Definitions for BOARD_BootClockFRO64M configuration
******************************************************************************/
#define BOARD_BOOTCLOCKFRO64M_CORE_CLOCK 64000000U /*!< Core clock frequency: 64000000Hz */
/*******************************************************************************
* API for BOARD_BootClockFRO64M configuration
******************************************************************************/
#if defined(__cplusplus)
extern "C" {
#endif /* __cplusplus*/
/*!
* @brief This function executes configuration of clocks.
*
*/
void BOARD_BootClockFRO64M(void);
#if defined(__cplusplus)
}
#endif /* __cplusplus*/
/*******************************************************************************
******************** Configuration BOARD_BootClockFRO96M **********************
******************************************************************************/
/*******************************************************************************
* Definitions for BOARD_BootClockFRO96M configuration
******************************************************************************/
#define BOARD_BOOTCLOCKFRO96M_CORE_CLOCK 96000000U /*!< Core clock frequency: 96000000Hz */
/*******************************************************************************
* API for BOARD_BootClockFRO96M configuration
******************************************************************************/
#if defined(__cplusplus)
extern "C" {
#endif /* __cplusplus*/
/*!
* @brief This function executes configuration of clocks.
*
*/
void BOARD_BootClockFRO96M(void);
#if defined(__cplusplus)
}
#endif /* __cplusplus*/
#endif /* _CLOCK_CONFIG_H_ */

144
hw/bsp/mcx/boards/frdm_mcxa156/pin_mux.c Normal file
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/*
* Copyright 2024 NXP
*
* SPDX-License-Identifier: BSD-3-Clause
*/
/***********************************************************************************************************************
* This file was generated by the MCUXpresso Config Tools. Any manual edits made to this file
* will be overwritten if the respective MCUXpresso Config Tools is used to update this file.
**********************************************************************************************************************/
/* clang-format off */
/*
* TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
!!GlobalInfo
product: Pins v15.0
processor: MCXA156
package_id: MCXA156VLL
mcu_data: ksdk2_0
processor_version: 0.15.0
* BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS ***********
*/
/* clang-format on */
#include "fsl_common.h"
#include "fsl_port.h"
#include "pin_mux.h"
/* FUNCTION ************************************************************************************************************
*
* Function Name : BOARD_InitBootPins
* Description : Calls initialization functions.
*
* END ****************************************************************************************************************/
void BOARD_InitBootPins(void)
{
BOARD_InitPins();
}
/* clang-format off */
/*
* TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
BOARD_InitPins:
- options: {callFromInitBoot: 'true', coreID: cm33_core0, enableClock: 'true'}
- pin_list:
- {pin_num: '78', peripheral: LPUART0, signal: RX, pin_signal: P0_2/TDO/SWO/LPUART0_RXD/LPSPI0_SCK/CT0_MAT0/UTICK_CAP0/FLEXIO0_D2, slew_rate: fast, open_drain: disable,
drive_strength: low, pull_select: up, pull_enable: enable, input_buffer: enable, invert_input: normal}
- {pin_num: '79', peripheral: LPUART0, signal: TX, pin_signal: P0_3/TDI/LPUART0_TXD/LPSPI0_SDO/CT0_MAT1/UTICK_CAP1/FLEXIO0_D3/CMP0_OUT, slew_rate: fast, open_drain: disable,
drive_strength: low, pull_select: up, pull_enable: enable, input_buffer: enable, invert_input: normal}
* BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS ***********
*/
/* clang-format on */
/* FUNCTION ************************************************************************************************************
*
* Function Name : BOARD_InitPins
* Description : Configures pin routing and optionally pin electrical features.
*
* END ****************************************************************************************************************/
void BOARD_InitPins(void)
{
RESET_PeripheralReset(kLPUART0_RST_SHIFT_RSTn);
CLOCK_SetClockDiv(kCLOCK_DivLPUART0, 1u);
CLOCK_AttachClk(kFRO12M_to_LPUART0);
/* GPIO3: Peripheral clock is enabled */
CLOCK_EnableClock(kCLOCK_GateGPIO3);
/* PORT3: Peripheral clock is enabled */
CLOCK_EnableClock(kCLOCK_GatePORT3);
/* GPIO3 peripheral is released from reset */
RESET_ReleasePeripheralReset(kGPIO3_RST_SHIFT_RSTn);
/* PORT3 peripheral is released from reset */
RESET_ReleasePeripheralReset(kPORT3_RST_SHIFT_RSTn);
/* GPIO3: Peripheral clock is enabled */
CLOCK_EnableClock(kCLOCK_GateGPIO0);
/* PORT3: Peripheral clock is enabled */
CLOCK_EnableClock(kCLOCK_GatePORT0);
/* GPIO3 peripheral is released from reset */
RESET_ReleasePeripheralReset(kGPIO0_RST_SHIFT_RSTn);
/* PORT3 peripheral is released from reset */
RESET_ReleasePeripheralReset(kPORT0_RST_SHIFT_RSTn);
/* PORT0: Peripheral clock is enabled */
CLOCK_EnableClock(kCLOCK_GatePORT0);
/* LPUART0 peripheral is released from reset */
RESET_ReleasePeripheralReset(kLPUART0_RST_SHIFT_RSTn);
/* PORT0 peripheral is released from reset */
RESET_ReleasePeripheralReset(kPORT0_RST_SHIFT_RSTn);
const port_pin_config_t port0_2_pin78_config = {/* Internal pull-up resistor is enabled */
kPORT_PullUp,
/* Low internal pull resistor value is selected. */
kPORT_LowPullResistor,
/* Fast slew rate is configured */
kPORT_FastSlewRate,
/* Passive input filter is disabled */
kPORT_PassiveFilterDisable,
/* Open drain output is disabled */
kPORT_OpenDrainDisable,
/* Low drive strength is configured */
kPORT_LowDriveStrength,
/* Normal drive strength is configured */
kPORT_NormalDriveStrength,
/* Pin is configured as LPUART0_RXD */
kPORT_MuxAlt2,
/* Digital input enabled */
kPORT_InputBufferEnable,
/* Digital input is not inverted */
kPORT_InputNormal,
/* Pin Control Register fields [15:0] are not locked */
kPORT_UnlockRegister};
/* PORT0_2 (pin 78) is configured as LPUART0_RXD */
PORT_SetPinConfig(PORT0, 2U, &port0_2_pin78_config);
const port_pin_config_t port0_3_pin79_config = {/* Internal pull-up resistor is enabled */
kPORT_PullUp,
/* Low internal pull resistor value is selected. */
kPORT_LowPullResistor,
/* Fast slew rate is configured */
kPORT_FastSlewRate,
/* Passive input filter is disabled */
kPORT_PassiveFilterDisable,
/* Open drain output is disabled */
kPORT_OpenDrainDisable,
/* Low drive strength is configured */
kPORT_LowDriveStrength,
/* Normal drive strength is configured */
kPORT_NormalDriveStrength,
/* Pin is configured as LPUART0_TXD */
kPORT_MuxAlt2,
/* Digital input enabled */
kPORT_InputBufferEnable,
/* Digital input is not inverted */
kPORT_InputNormal,
/* Pin Control Register fields [15:0] are not locked */
kPORT_UnlockRegister};
/* PORT0_3 (pin 79) is configured as LPUART0_TXD */
PORT_SetPinConfig(PORT0, 3U, &port0_3_pin79_config);
}
/***********************************************************************************************************************
* EOF
**********************************************************************************************************************/

51
hw/bsp/mcx/boards/frdm_mcxa156/pin_mux.h Normal file
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@@ -0,0 +1,51 @@
/*
* Copyright 2024 NXP
*
* SPDX-License-Identifier: BSD-3-Clause
*/
/***********************************************************************************************************************
* This file was generated by the MCUXpresso Config Tools. Any manual edits made to this file
* will be overwritten if the respective MCUXpresso Config Tools is used to update this file.
**********************************************************************************************************************/
#ifndef _PIN_MUX_H_
#define _PIN_MUX_H_
/*!
* @addtogroup pin_mux
* @{
*/
/***********************************************************************************************************************
* API
**********************************************************************************************************************/
#if defined(__cplusplus)
extern "C" {
#endif
/*!
* @brief Calls initialization functions.
*
*/
void BOARD_InitBootPins(void);
/*!
* @brief Configures pin routing and optionally pin electrical features.
*
*/
void BOARD_InitPins(void);
#if defined(__cplusplus)
}
#endif
/*!
* @}
*/
#endif /* _PIN_MUX_H_ */
/***********************************************************************************************************************
* EOF
**********************************************************************************************************************/

13
hw/bsp/mcx/boards/frdm_mcxn947/board.h
View File

@@ -49,17 +49,22 @@
#define BUTTON_STATE_ACTIVE 0
// UART
#define UART_DEV LPUART4
#define UART_DEV LPUART4
#define LP_FLEXCOMM_INST 4
#include "fsl_lpflexcomm.h"
static inline void board_uart_init_clock(void) {
/* attach FRO 12M to FLEXCOMM4 */
LP_FLEXCOMM_Init(LP_FLEXCOMM_INST, LP_FLEXCOMM_PERIPH_LPUART);
CLOCK_SetClkDiv(kCLOCK_DivFlexcom4Clk, 1u);
CLOCK_AttachClk(kFRO12M_to_FLEXCOMM4);
RESET_ClearPeripheralReset(kFC4_RST_SHIFT_RSTn);
}
//#define UART_RX_PINMUX 0, 24, IOCON_PIO_DIG_FUNC1_EN
//#define UART_TX_PINMUX 0, 25, IOCON_PIO_DIG_FUNC1_EN
}
// XTAL
#define XTAL0_CLK_HZ (24 * 1000 * 1000U)

1680
hw/bsp/mcx/drivers/spc/fsl_spc.c Normal file
View File

File diff suppressed because it is too large Load Diff

2433
hw/bsp/mcx/drivers/spc/fsl_spc.h Normal file
View File

File diff suppressed because it is too large Load Diff

30
hw/bsp/mcx/family.c
View File

@@ -60,9 +60,14 @@ void USB0_IRQHandler(void) {
void board_init(void) {
BOARD_InitPins();
BOARD_InitBootClocks();
#ifdef XTAL0_CLK_HZ
CLOCK_SetupExtClocking(XTAL0_CLK_HZ);
#endif
#if CFG_TUSB_OS == OPT_OS_NONE
// 1ms tick timer
@@ -84,15 +89,7 @@ void board_init(void) {
board_led_write(0);
#ifdef NEOPIXEL_PIN
// Neopixel
static uint32_t pixelData[NEOPIXEL_NUMBER];
IOCON_PinMuxSet(IOCON, NEOPIXEL_PORT, NEOPIXEL_PIN, IOCON_PIO_DIG_FUNC4_EN);
sctpix_init(NEOPIXEL_TYPE);
sctpix_addCh(NEOPIXEL_CH, pixelData, NEOPIXEL_NUMBER);
sctpix_setPixel(NEOPIXEL_CH, 0, 0x100010);
sctpix_setPixel(NEOPIXEL_CH, 1, 0x100010);
sctpix_show();
// No neo pixel support yet
#endif
// Button
@@ -103,9 +100,6 @@ void board_init(void) {
#endif
#ifdef UART_DEV
// UART
// IOCON_PinMuxSet(IOCON, UART_RX_PINMUX);
// IOCON_PinMuxSet(IOCON, UART_TX_PINMUX);
// Enable UART when debug log is on
board_uart_init_clock();
@@ -115,6 +109,7 @@ void board_init(void) {
uart_config.baudRate_Bps = CFG_BOARD_UART_BAUDRATE;
uart_config.enableTx = true;
uart_config.enableRx = true;
LPUART_Init(UART_DEV, &uart_config, 12000000u);
#endif
@@ -196,17 +191,6 @@ void board_init(void) {
void board_led_write(bool state) {
GPIO_PinWrite(LED_GPIO, LED_PIN, state ? LED_STATE_ON : (1 - LED_STATE_ON));
#ifdef NEOPIXEL_PIN
if (state) {
sctpix_setPixel(NEOPIXEL_CH, 0, 0x100000);
sctpix_setPixel(NEOPIXEL_CH, 1, 0x101010);
} else {
sctpix_setPixel(NEOPIXEL_CH, 0, 0x001000);
sctpix_setPixel(NEOPIXEL_CH, 1, 0x000010);
}
sctpix_show();
#endif
}
uint32_t board_button_read(void) {

28
hw/bsp/mcx/family.cmake
View File

@@ -10,6 +10,9 @@ include(${CMAKE_CURRENT_LIST_DIR}/boards/${BOARD}/board.cmake)
if (MCU_VARIANT STREQUAL "MCXA153")
set(CMAKE_SYSTEM_CPU cortex-m33-nodsp-nofp CACHE INTERNAL "System Processor")
set(FAMILY_MCUS MCXA15 CACHE INTERNAL "")
elseif (MCU_VARIANT STREQUAL "MCXA156")
set(CMAKE_SYSTEM_CPU cortex-m33 CACHE INTERNAL "System Processor")
set(FAMILY_MCUS MCXA15 CACHE INTERNAL "")
elseif (MCU_VARIANT STREQUAL "MCXN947")
set(CMAKE_SYSTEM_CPU cortex-m33 CACHE INTERNAL "System Processor")
set(FAMILY_MCUS MCXN9 CACHE INTERNAL "")
@@ -38,12 +41,14 @@ function(add_board_target BOARD_TARGET)
endif()
set(STARTUP_FILE_Clang ${STARTUP_FILE_GNU})
add_library(${BOARD_TARGET} STATIC
${STARTUP_FILE_${CMAKE_C_COMPILER_ID}}
# driver
${SDK_DIR}/devices/${MCU_VARIANT}/drivers/fsl_gpio.c
${SDK_DIR}/devices/${MCU_VARIANT}/drivers/fsl_common_arm.c
${SDK_DIR}/devices/${MCU_VARIANT}/drivers/fsl_lpuart.c
${SDK_DIR}/drivers/gpio/fsl_gpio.c
${SDK_DIR}/drivers/common/fsl_common_arm.c
${SDK_DIR}/drivers/lpuart/fsl_lpuart.c
${CMAKE_CURRENT_FUNCTION_LIST_DIR}/drivers/spc/fsl_spc.c
# mcu
${SDK_DIR}/devices/${MCU_VARIANT}/drivers/fsl_clock.c
${SDK_DIR}/devices/${MCU_VARIANT}/drivers/fsl_reset.c
@@ -51,18 +56,27 @@ function(add_board_target BOARD_TARGET)
)
target_include_directories(${BOARD_TARGET} PUBLIC
${CMSIS_DIR}/CMSIS/Core/Include
${SDK_DIR}/drivers/gpio/
${SDK_DIR}/drivers/lpuart
${SDK_DIR}/drivers/common
${SDK_DIR}/drivers/port
${CMAKE_CURRENT_FUNCTION_LIST_DIR}/drivers/spc
${SDK_DIR}/devices/${MCU_VARIANT}
${SDK_DIR}/devices/${MCU_VARIANT}/drivers
)
if (${FAMILY_MCUS} STREQUAL "MCXN9")
target_sources(${BOARD_TARGET} PRIVATE
${SDK_DIR}/devices/${MCU_VARIANT}/drivers/fsl_lpflexcomm.c
${SDK_DIR}/drivers/lpflexcomm/fsl_lpflexcomm.c
)
target_include_directories(${BOARD_TARGET} PUBLIC
${SDK_DIR}/drivers/lpflexcomm
)
elseif(${FAMILY_MCUS} STREQUAL "MCXA15")
target_sources(${BOARD_TARGET} PRIVATE
${SDK_DIR}/devices/${MCU_VARIANT}/drivers/fsl_spc.c
)
endif()
update_board(${BOARD_TARGET})

21
hw/bsp/mcx/family.mk
View File

@@ -35,18 +35,19 @@ SRC_C += \
$(SDK_DIR)/devices/$(MCU_VARIANT)/system_$(MCU_CORE).c \
$(SDK_DIR)/devices/$(MCU_VARIANT)/drivers/fsl_clock.c \
$(SDK_DIR)/devices/$(MCU_VARIANT)/drivers/fsl_reset.c \
$(SDK_DIR)/devices/$(MCU_VARIANT)/drivers/fsl_gpio.c \
$(SDK_DIR)/devices/$(MCU_VARIANT)/drivers/fsl_lpuart.c \
$(SDK_DIR)/devices/$(MCU_VARIANT)/drivers/fsl_common_arm.c \
${SDK_DIR}/drivers/gpio/fsl_gpio.c \
${SDK_DIR}/drivers/lpuart/fsl_lpuart.c \
${SDK_DIR}/drivers/common/fsl_common_arm.c\
hw/bsp/mcx/drivers/spc/fsl_spc.c
# fsl_lpflexcomm for MCXN9
ifeq ($(MCU_VARIANT), MCXN947)
SRC_C += $(SDK_DIR)/devices/$(MCU_VARIANT)/drivers/fsl_lpflexcomm.c
SRC_C += ${SDK_DIR}/drivers/lpflexcomm/fsl_lpflexcomm.c
endif
# fsl_spc for MCXNA15
ifeq ($(MCU_VARIANT), MCXA153)
SRC_C += $(SDK_DIR)/devices/$(MCU_VARIANT)/drivers/fsl_spc.c
endif
INC += \
@@ -54,5 +55,15 @@ INC += \
$(TOP)/lib/CMSIS_5/CMSIS/Core/Include \
$(TOP)/$(SDK_DIR)/devices/$(MCU_VARIANT) \
$(TOP)/$(SDK_DIR)/devices/$(MCU_VARIANT)/drivers \
$(TOP)/$(SDK_DIR)/drivers/ \
$(TOP)/$(SDK_DIR)/drivers/lpuart \
$(TOP)/$(SDK_DIR)/drivers/lpflexcomm \
$(TOP)/$(SDK_DIR)/drivers/common\
$(TOP)/$(SDK_DIR)/drivers/gpio\
$(TOP)/$(SDK_DIR)/drivers/port\
$(TOP)/hw/bsp/mcx/drivers/spc
SRC_S += $(SDK_DIR)/devices/$(MCU_VARIANT)/gcc/startup_$(MCU_CORE).S