fixed dcd lpc17xx queue transfer & IOC handling
able to run MSC demo
This commit is contained in:
@@ -275,34 +275,36 @@ void dcd_isr(uint8_t coreid)
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{
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if ( BIT_TEST_(eot_int, ep_id) )
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{
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dcd_dma_descriptor_t* p_dd;
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dcd_dma_descriptor_t* const p_fixed_dd = qhd_get_fixed_dd(ep_id);
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p_fixed_dd->buffer_length = 0; // buffer length is used to determined if fixed dd is queued in pipe xfer function
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// Maximum is 2 QTD are queued in an endpoint
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if (p_fixed_dd->is_next_valid)
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{
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p_dd = (dcd_dma_descriptor_t*) p_fixed_dd->next;
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p_dd->used = 0; // free non-fixed dd
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}else
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{
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p_dd = p_fixed_dd;
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}
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dcd_dma_descriptor_t* const p_last_dd = (p_fixed_dd->is_next_valid) ? ((dcd_dma_descriptor_t*) p_fixed_dd->next) : p_fixed_dd;
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if ( BIT_TEST_(dcd_data.ioc_dd, dd_get_index(p_dd) ) )
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{
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dcd_data.ioc_dd = BIT_CLR_(dcd_data.ioc_dd, dd_get_index(p_dd) );
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endpoint_handle_t edpt_hdl =
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// only handle when Controller already finished the last DD
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if ( dcd_data.udca[ep_id] == p_last_dd )
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{
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dcd_data.udca[ep_id] = p_fixed_dd; // UDCA currently points to the last DD, change to the fixed DD
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p_fixed_dd->buffer_length = 0; // buffer length is used to determined if fixed dd is queued in pipe xfer function
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if (p_fixed_dd->is_next_valid)
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{ // last_dd is not fixed_dd --> need to free
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p_last_dd->used = 0;
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}
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if ( BIT_TEST_(dcd_data.ioc_dd, dd_get_index(p_last_dd) ) )
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{
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.coreid = 0,
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.index = ep_id,
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.class_code = dcd_data.class_code[ep_id]
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};
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tusb_event_t event = (p_dd->status == DD_STATUS_NORMAL || p_dd->status == DD_STATUS_DATA_UNDERUN) ? TUSB_EVENT_XFER_COMPLETE : TUSB_EVENT_XFER_ERROR;
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dcd_data.ioc_dd = BIT_CLR_(dcd_data.ioc_dd, dd_get_index(p_last_dd) );
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usbd_xfer_isr(edpt_hdl, event, p_dd->present_count); // only number of bytes in the IOC qtd
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endpoint_handle_t edpt_hdl =
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{
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.coreid = 0,
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.index = ep_id,
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.class_code = dcd_data.class_code[ep_id]
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};
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tusb_event_t event = (p_last_dd->status == DD_STATUS_NORMAL || p_last_dd->status == DD_STATUS_DATA_UNDERUN) ? TUSB_EVENT_XFER_COMPLETE : TUSB_EVENT_XFER_ERROR;
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usbd_xfer_isr(edpt_hdl, event, p_last_dd->present_count); // only number of bytes in the IOC qtd
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}
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}
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}
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}
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@@ -477,11 +479,13 @@ tusb_error_t dcd_pipe_clear_stall(uint8_t coreid, uint8_t edpt_addr)
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void dd_xfer_init(dcd_dma_descriptor_t* p_dd, void* buffer, uint16_t total_bytes)
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{
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p_dd->next = 0;
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p_dd->is_next_valid = 0;
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p_dd->buffer_addr = (uint32_t) buffer;
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p_dd->buffer_length = total_bytes;
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p_dd->status = DD_STATUS_NOT_SERVICED;
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p_dd->next = 0;
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p_dd->is_next_valid = 0;
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p_dd->buffer_addr = (uint32_t) buffer;
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p_dd->buffer_length = total_bytes;
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p_dd->status = DD_STATUS_NOT_SERVICED;
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p_dd->iso_last_packet_valid = 0;
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p_dd->present_count = 0;
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}
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tusb_error_t dcd_pipe_queue_xfer(endpoint_handle_t edpt_hdl, void * buffer, uint16_t total_bytes)
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@@ -514,7 +518,7 @@ tusb_error_t dcd_pipe_xfer(endpoint_handle_t edpt_hdl, void * buffer, uint16_t t
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p_dd->used = 1;
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p_dd->max_packet_size = p_fixed_dd->max_packet_size;
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p_dd->is_isochronous = p_fixed_dd->is_isochronous;
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dcd_data.ioc_dd = int_on_complete ? BIT_SET_(dcd_data.ioc_dd, dd_idx) : BIT_CLR_(dcd_data.ioc_dd, dd_idx);
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dcd_data.ioc_dd = int_on_complete ? BIT_SET_(dcd_data.ioc_dd, dd_idx) : BIT_CLR_(dcd_data.ioc_dd, dd_idx);
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//------------- hook to fixed dd -------------//
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p_fixed_dd->next = (uint32_t) p_dd;
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@@ -178,8 +178,9 @@ tusb_error_t usbd_body_subtask(void)
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length -= USBD_COTNROL_MAX_LENGTH_EACH_XFER;
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p_buffer += USBD_COTNROL_MAX_LENGTH_EACH_XFER;
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usbd_devices[coreid].is_waiting_control_xfer = false;
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}
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usbd_devices[coreid].is_waiting_control_xfer = false;
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#endif
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if ( TUSB_ERROR_NONE == error )
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