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rename CFG_TUD_DWC2_DMA to CFG_TUD_DWC2_DMA_ENABLE

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hathach
2024-11-14 13:26:11 +07:00
parent 0569188aed
commit daef846aa7
4 changed files with 8 additions and 10 deletions
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4
src/tusb_option.h
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@@ -252,8 +252,8 @@
// (defined by CFG_TUSB_MEM_SECTION) must be declared as non-cacheable.
// For example, on Cortex-M7 the MPU region can be configured as normal
// non-cacheable, with RASR register value: TEX=1 C=0 B=0 S=0.
#ifndef CFG_TUD_DWC2_DMA
#define CFG_TUD_DWC2_DMA 0
#ifndef CFG_TUD_DWC2_DMA_ENABLE
#define CFG_TUD_DWC2_DMA_ENABLE 0
#endif
// Enable DWC2 Slave mode for host