device cdc: rename tud_cdc_configure_fifo/_t to tud_cdc_configure/_t
add tx_overwritabe_if_not_connected for cdc driver configure
This commit is contained in:
@@ -82,7 +82,7 @@ typedef struct {
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static cdcd_interface_t _cdcd_itf[CFG_TUD_CDC];
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static cdcd_interface_t _cdcd_itf[CFG_TUD_CDC];
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CFG_TUD_MEM_SECTION static cdcd_epbuf_t _cdcd_epbuf[CFG_TUD_CDC];
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CFG_TUD_MEM_SECTION static cdcd_epbuf_t _cdcd_epbuf[CFG_TUD_CDC];
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static tud_cdc_configure_fifo_t _cdcd_fifo_cfg;
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static tud_cdc_configure_t _cdcd_cfg = TUD_CDC_CONFIGURE_DEFAULT();
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static bool _prep_out_transaction(uint8_t itf) {
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static bool _prep_out_transaction(uint8_t itf) {
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const uint8_t rhport = 0;
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const uint8_t rhport = 0;
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@@ -119,9 +119,9 @@ static bool _prep_out_transaction(uint8_t itf) {
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// APPLICATION API
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// APPLICATION API
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//--------------------------------------------------------------------+
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//--------------------------------------------------------------------+
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bool tud_cdc_configure_fifo(const tud_cdc_configure_fifo_t* cfg) {
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bool tud_cdc_configure(const tud_cdc_configure_t* driver_cfg) {
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TU_VERIFY(cfg);
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TU_VERIFY(driver_cfg);
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_cdcd_fifo_cfg = (*cfg);
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_cdcd_cfg = *driver_cfg;
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return true;
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return true;
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}
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}
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@@ -175,7 +175,7 @@ void tud_cdc_n_read_flush(uint8_t itf) {
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//--------------------------------------------------------------------+
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//--------------------------------------------------------------------+
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uint32_t tud_cdc_n_write(uint8_t itf, const void* buffer, uint32_t bufsize) {
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uint32_t tud_cdc_n_write(uint8_t itf, const void* buffer, uint32_t bufsize) {
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cdcd_interface_t* p_cdc = &_cdcd_itf[itf];
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cdcd_interface_t* p_cdc = &_cdcd_itf[itf];
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uint16_t ret = tu_fifo_write_n(&p_cdc->tx_ff, buffer, (uint16_t) TU_MIN(bufsize, UINT16_MAX));
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uint16_t wr_count = tu_fifo_write_n(&p_cdc->tx_ff, buffer, (uint16_t) TU_MIN(bufsize, UINT16_MAX));
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// flush if queue more than packet size
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// flush if queue more than packet size
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if (tu_fifo_count(&p_cdc->tx_ff) >= BULK_PACKET_SIZE
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if (tu_fifo_count(&p_cdc->tx_ff) >= BULK_PACKET_SIZE
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@@ -186,7 +186,7 @@ uint32_t tud_cdc_n_write(uint8_t itf, const void* buffer, uint32_t bufsize) {
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tud_cdc_n_write_flush(itf);
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tud_cdc_n_write_flush(itf);
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}
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}
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return ret;
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return wr_count;
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}
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}
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uint32_t tud_cdc_n_write_flush(uint8_t itf) {
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uint32_t tud_cdc_n_write_flush(uint8_t itf) {
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@@ -233,8 +233,6 @@ bool tud_cdc_n_write_clear(uint8_t itf) {
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//--------------------------------------------------------------------+
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//--------------------------------------------------------------------+
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void cdcd_init(void) {
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void cdcd_init(void) {
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tu_memclr(_cdcd_itf, sizeof(_cdcd_itf));
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tu_memclr(_cdcd_itf, sizeof(_cdcd_itf));
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tu_memclr(&_cdcd_fifo_cfg, sizeof(_cdcd_fifo_cfg));
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for (uint8_t i = 0; i < CFG_TUD_CDC; i++) {
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for (uint8_t i = 0; i < CFG_TUD_CDC; i++) {
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cdcd_interface_t* p_cdc = &_cdcd_itf[i];
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cdcd_interface_t* p_cdc = &_cdcd_itf[i];
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@@ -249,10 +247,10 @@ void cdcd_init(void) {
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// Config RX fifo
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// Config RX fifo
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tu_fifo_config(&p_cdc->rx_ff, p_cdc->rx_ff_buf, TU_ARRAY_SIZE(p_cdc->rx_ff_buf), 1, false);
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tu_fifo_config(&p_cdc->rx_ff, p_cdc->rx_ff_buf, TU_ARRAY_SIZE(p_cdc->rx_ff_buf), 1, false);
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// Config TX fifo as overwritable at initialization and will be changed to non-overwritable
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// TX fifo can be configured to change to overwritable if not connected (DTR bit not set). Without DTR we do not
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// if terminal supports DTR bit. Without DTR we do not know if data is actually polled by terminal.
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// know if data is actually polled by terminal. This way the most current data is prioritized.
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// In this way, the most current data is prioritized.
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// Default: is overwritable
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tu_fifo_config(&p_cdc->tx_ff, p_cdc->tx_ff_buf, TU_ARRAY_SIZE(p_cdc->tx_ff_buf), 1, true);
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tu_fifo_config(&p_cdc->tx_ff, p_cdc->tx_ff_buf, TU_ARRAY_SIZE(p_cdc->tx_ff_buf), 1, _cdcd_cfg.tx_overwritabe_if_not_connected);
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#if OSAL_MUTEX_REQUIRED
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#if OSAL_MUTEX_REQUIRED
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osal_mutex_t mutex_rd = osal_mutex_create(&p_cdc->rx_ff_mutex);
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osal_mutex_t mutex_rd = osal_mutex_create(&p_cdc->rx_ff_mutex);
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@@ -294,13 +292,13 @@ void cdcd_reset(uint8_t rhport) {
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cdcd_interface_t* p_cdc = &_cdcd_itf[i];
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cdcd_interface_t* p_cdc = &_cdcd_itf[i];
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tu_memclr(p_cdc, ITF_MEM_RESET_SIZE);
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tu_memclr(p_cdc, ITF_MEM_RESET_SIZE);
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if (!_cdcd_fifo_cfg.rx_persistent) {
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if (!_cdcd_cfg.rx_persistent) {
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tu_fifo_clear(&p_cdc->rx_ff);
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tu_fifo_clear(&p_cdc->rx_ff);
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}
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}
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if (!_cdcd_fifo_cfg.tx_persistent) {
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if (!_cdcd_cfg.tx_persistent) {
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tu_fifo_clear(&p_cdc->tx_ff);
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tu_fifo_clear(&p_cdc->tx_ff);
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}
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}
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tu_fifo_set_overwritable(&p_cdc->tx_ff, true);
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tu_fifo_set_overwritable(&p_cdc->tx_ff, _cdcd_cfg.tx_overwritabe_if_not_connected);
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}
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}
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}
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}
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@@ -414,8 +412,12 @@ bool cdcd_control_xfer_cb(uint8_t rhport, uint8_t stage, const tusb_control_requ
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p_cdc->line_state = (uint8_t) request->wValue;
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p_cdc->line_state = (uint8_t) request->wValue;
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// Disable fifo overwriting if DTR bit is set
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// If enabled: fifo overwriting is disabled if DTR bit is set and vice versa
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tu_fifo_set_overwritable(&p_cdc->tx_ff, !dtr);
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if (_cdcd_cfg.tx_overwritabe_if_not_connected) {
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tu_fifo_set_overwritable(&p_cdc->tx_ff, !dtr);
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} else {
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tu_fifo_set_overwritable(&p_cdc->tx_ff, false);
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}
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TU_LOG_DRV(" Set Control Line State: DTR = %d, RTS = %d\r\n", dtr, rts);
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TU_LOG_DRV(" Set Control Line State: DTR = %d, RTS = %d\r\n", dtr, rts);
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@@ -496,7 +498,7 @@ bool cdcd_xfer_cb(uint8_t rhport, uint8_t ep_addr, xfer_result_t result, uint32_
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// xferred_bytes is multiple of EP Packet size and not zero
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// xferred_bytes is multiple of EP Packet size and not zero
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if (!tu_fifo_count(&p_cdc->tx_ff) && xferred_bytes && (0 == (xferred_bytes & (BULK_PACKET_SIZE - 1)))) {
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if (!tu_fifo_count(&p_cdc->tx_ff) && xferred_bytes && (0 == (xferred_bytes & (BULK_PACKET_SIZE - 1)))) {
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if (usbd_edpt_claim(rhport, p_cdc->ep_in)) {
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if (usbd_edpt_claim(rhport, p_cdc->ep_in)) {
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usbd_edpt_xfer(rhport, p_cdc->ep_in, NULL, 0);
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TU_ASSERT(usbd_edpt_xfer(rhport, p_cdc->ep_in, NULL, 0));
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}
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}
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}
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}
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}
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}
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@@ -48,14 +48,24 @@
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//--------------------------------------------------------------------+
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//--------------------------------------------------------------------+
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// Driver Configuration
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// Driver Configuration
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//--------------------------------------------------------------------+
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//--------------------------------------------------------------------+
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typedef struct TU_ATTR_PACKED {
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typedef struct TU_ATTR_PACKED {
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uint8_t rx_persistent : 1; // keep rx fifo on bus reset or disconnect
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uint8_t rx_persistent : 1; // keep rx fifo data even with bus reset or disconnect
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uint8_t tx_persistent : 1; // keep tx fifo on bus reset or disconnect
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uint8_t tx_persistent : 1; // keep tx fifo data even with reset or disconnect
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} tud_cdc_configure_fifo_t;
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uint8_t tx_overwritabe_if_not_connected : 1; // if not connected, tx fifo can be overwritten
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} tud_cdc_configure_t;
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// Configure CDC FIFOs behavior
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#define TUD_CDC_CONFIGURE_DEFAULT() { \
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bool tud_cdc_configure_fifo(tud_cdc_configure_fifo_t const* cfg);
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.rx_persistent = 0, \
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.tx_persistent = 0, \
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.tx_overwritabe_if_not_connected = 1, \
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}
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// Configure CDC driver behavior
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bool tud_cdc_configure(const tud_cdc_configure_t* driver_cfg);
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// Backward compatible
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#define tud_cdc_configure_fifo_t tud_cdc_configure_t
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#define tud_cdc_configure_fifo tud_cdc_configure
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//--------------------------------------------------------------------+
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//--------------------------------------------------------------------+
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// Application API (Multiple Ports) i.e. CFG_TUD_CDC > 1
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// Application API (Multiple Ports) i.e. CFG_TUD_CDC > 1
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@@ -916,8 +916,11 @@ bool tu_fifo_clear(tu_fifo_t *f)
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Overwritable mode the fifo is set to
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Overwritable mode the fifo is set to
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*/
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*/
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/******************************************************************************/
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/******************************************************************************/
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bool tu_fifo_set_overwritable(tu_fifo_t *f, bool overwritable)
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bool tu_fifo_set_overwritable(tu_fifo_t *f, bool overwritable) {
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{
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if (f->overwritable == overwritable) {
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return true;
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}
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_ff_lock(f->mutex_wr);
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_ff_lock(f->mutex_wr);
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_ff_lock(f->mutex_rd);
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_ff_lock(f->mutex_rd);
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