minor update dcd nrf5x
add walkaround CDC buffer for nrf52 (due to not able to NAK OUT packet)
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@@ -66,11 +66,17 @@ typedef struct {
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}cdcd_data_t;
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// TODO multiple rhport
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CFG_TUSB_ATTR_USBRAM ATTR_ALIGNED(4) uint8_t _tmp_rx_buf[64];
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CFG_TUSB_ATTR_USBRAM ATTR_ALIGNED(4) uint8_t _tmp_tx_buf[64];
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#ifdef NRF52840_XXAA
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// FIXME nrf52 OUT bug ( Controller ACK data even we didn't prepare transfer )
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CFG_TUSB_ATTR_USBRAM CFG_TUSB_MEM_ALIGN uint8_t _tmp_rx_buf[1024];
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#else
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CFG_TUSB_ATTR_USBRAM CFG_TUSB_MEM_ALIGN uint8_t _tmp_rx_buf[64];
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#endif
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CFG_TUSB_ATTR_USBRAM CFG_TUSB_MEM_ALIGN uint8_t _tmp_tx_buf[64];
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FIFO_DEF(_rx_ff, CFG_TUD_CDC_BUFSIZE, uint8_t, true);
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FIFO_DEF(_tx_ff, CFG_TUD_CDC_BUFSIZE, uint8_t, true);
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FIFO_DEF(_tx_ff, CFG_TUD_CDC_BUFSIZE, uint8_t, false);
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//--------------------------------------------------------------------+
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// INTERNAL OBJECT & FUNCTION DECLARATION
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@@ -83,7 +89,7 @@ STATIC_VAR cdcd_data_t cdcd_data[CONTROLLER_DEVICE_NUMBER];
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bool tud_n_cdc_connected(uint8_t rhport)
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{
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// Either RTS or DTR active considered as connected
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return cdcd_data[rhport].line_state;
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return (cdcd_data[rhport].line_state != 0);
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}
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uint32_t tud_n_cdc_available(uint8_t rhport)
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@@ -104,7 +110,7 @@ uint32_t tud_n_cdc_read(uint8_t rhport, void* buffer, uint32_t bufsize)
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uint32_t tud_n_cdc_write_char(uint8_t rhport, char ch)
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{
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return fifo_write(&_tx_ff, &ch);
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return fifo_write(&_tx_ff, &ch) ? 1 : 0;
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}
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uint32_t tud_n_cdc_write(uint8_t rhport, void const* buffer, uint32_t bufsize)
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@@ -281,7 +287,7 @@ tusb_error_t cdcd_xfer_cb(uint8_t rhport, uint8_t ep_addr, tusb_event_t event, u
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fifo_write_n(&_rx_ff, _tmp_rx_buf, xferred_bytes);
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// preparing for next
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TU_ASSERT(dcd_edpt_xfer(rhport, p_cdc->ep_out, _tmp_rx_buf, sizeof(_tmp_rx_buf)), TUSB_ERROR_DCD_EDPT_XFER);
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TU_ASSERT( dcd_edpt_xfer(rhport, p_cdc->ep_out, _tmp_rx_buf, sizeof(_tmp_rx_buf)), TUSB_ERROR_DCD_EDPT_XFER );
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// fire callback
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if (tud_cdc_rx_cb) tud_cdc_rx_cb(rhport);
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