diff --git a/.idea/cmake.xml b/.idea/cmake.xml
index dd219bc77..7e0a9be92 100644
--- a/.idea/cmake.xml
+++ b/.idea/cmake.xml
@@ -78,11 +78,13 @@
-
+
+
-
+
+
diff --git a/examples/host/bare_api/only.txt b/examples/host/bare_api/only.txt
index 31dcb108c..cba58f8e8 100644
--- a/examples/host/bare_api/only.txt
+++ b/examples/host/bare_api/only.txt
@@ -18,3 +18,5 @@ mcu:STM32F7
mcu:STM32H7
mcu:STM32H7RS
mcu:STM32N6
+family:samd21
+family:samd5x_e5x
diff --git a/examples/host/cdc_msc_hid/only.txt b/examples/host/cdc_msc_hid/only.txt
index 31dcb108c..cba58f8e8 100644
--- a/examples/host/cdc_msc_hid/only.txt
+++ b/examples/host/cdc_msc_hid/only.txt
@@ -18,3 +18,5 @@ mcu:STM32F7
mcu:STM32H7
mcu:STM32H7RS
mcu:STM32N6
+family:samd21
+family:samd5x_e5x
diff --git a/examples/host/cdc_msc_hid_freertos/only.txt b/examples/host/cdc_msc_hid_freertos/only.txt
index d939d4e7b..576271aff 100644
--- a/examples/host/cdc_msc_hid_freertos/only.txt
+++ b/examples/host/cdc_msc_hid_freertos/only.txt
@@ -15,3 +15,5 @@ mcu:STM32F7
mcu:STM32H7
mcu:STM32H7RS
mcu:STM32N6
+family:samd21
+family:samd5x_e5x
diff --git a/examples/host/device_info/only.txt b/examples/host/device_info/only.txt
index 94ddc73c3..133a7c9a0 100644
--- a/examples/host/device_info/only.txt
+++ b/examples/host/device_info/only.txt
@@ -21,3 +21,5 @@ mcu:STM32F7
mcu:STM32H7
mcu:STM32H7RS
mcu:STM32N6
+family:samd21
+family:samd5x_e5x
diff --git a/examples/host/hid_controller/only.txt b/examples/host/hid_controller/only.txt
index 31dcb108c..cba58f8e8 100644
--- a/examples/host/hid_controller/only.txt
+++ b/examples/host/hid_controller/only.txt
@@ -18,3 +18,5 @@ mcu:STM32F7
mcu:STM32H7
mcu:STM32H7RS
mcu:STM32N6
+family:samd21
+family:samd5x_e5x
diff --git a/examples/host/midi_rx/only.txt b/examples/host/midi_rx/only.txt
index 94ddc73c3..133a7c9a0 100644
--- a/examples/host/midi_rx/only.txt
+++ b/examples/host/midi_rx/only.txt
@@ -21,3 +21,5 @@ mcu:STM32F7
mcu:STM32H7
mcu:STM32H7RS
mcu:STM32N6
+family:samd21
+family:samd5x_e5x
diff --git a/examples/host/msc_file_explorer/only.txt b/examples/host/msc_file_explorer/only.txt
index 31dcb108c..cba58f8e8 100644
--- a/examples/host/msc_file_explorer/only.txt
+++ b/examples/host/msc_file_explorer/only.txt
@@ -18,3 +18,5 @@ mcu:STM32F7
mcu:STM32H7
mcu:STM32H7RS
mcu:STM32N6
+family:samd21
+family:samd5x_e5x
diff --git a/hw/bsp/samd21/boards/atsamd21_xpro/board.h b/hw/bsp/samd21/boards/atsamd21_xpro/board.h
index 6d2e40c56..82ab321cf 100644
--- a/hw/bsp/samd21/boards/atsamd21_xpro/board.h
+++ b/hw/bsp/samd21/boards/atsamd21_xpro/board.h
@@ -48,6 +48,11 @@
#define UART_RX_PIN 4
#define UART_TX_PIN 5
+static inline void board_vbus_set(uint8_t rhport, bool state) {
+ (void) rhport; (void) state;
+}
+
+
#ifdef __cplusplus
}
#endif
diff --git a/hw/bsp/samd21/boards/circuitplayground_express/board.h b/hw/bsp/samd21/boards/circuitplayground_express/board.h
index 6a4ec32a9..bfe2d9951 100644
--- a/hw/bsp/samd21/boards/circuitplayground_express/board.h
+++ b/hw/bsp/samd21/boards/circuitplayground_express/board.h
@@ -48,6 +48,10 @@
#define UART_RX_PIN 4
#define UART_TX_PIN 5
+static inline void board_vbus_set(uint8_t rhport, bool state) {
+ (void) rhport; (void) state;
+}
+
#ifdef __cplusplus
}
#endif
diff --git a/hw/bsp/samd21/boards/curiosity_nano/board.h b/hw/bsp/samd21/boards/curiosity_nano/board.h
index 78d701ec9..a2a7385a4 100644
--- a/hw/bsp/samd21/boards/curiosity_nano/board.h
+++ b/hw/bsp/samd21/boards/curiosity_nano/board.h
@@ -48,6 +48,10 @@
#define UART_RX_PIN 31 // CDC5_RX
#define UART_TX_PIN 37 // CDC5_TX
+static inline void board_vbus_set(uint8_t rhport, bool state) {
+ (void) rhport; (void) state;
+}
+
#ifdef __cplusplus
}
#endif
diff --git a/hw/bsp/samd21/boards/cynthion_d21/board.h b/hw/bsp/samd21/boards/cynthion_d21/board.h
index 6a2b8c5c6..83782bc65 100644
--- a/hw/bsp/samd21/boards/cynthion_d21/board.h
+++ b/hw/bsp/samd21/boards/cynthion_d21/board.h
@@ -44,6 +44,10 @@
#define BUTTON_PIN PIN_PB22
#define BUTTON_STATE_ACTIVE 0
+static inline void board_vbus_set(uint8_t rhport, bool state) {
+ (void) rhport; (void) state;
+}
+
#ifdef __cplusplus
}
#endif
diff --git a/hw/bsp/samd21/boards/feather_m0_express/board.h b/hw/bsp/samd21/boards/feather_m0_express/board.h
index a7f9122ee..6fe13eb30 100644
--- a/hw/bsp/samd21/boards/feather_m0_express/board.h
+++ b/hw/bsp/samd21/boards/feather_m0_express/board.h
@@ -63,6 +63,10 @@
#define MAX3421_INTR_PIN 7 // D10
#define MAX3421_INTR_EIC_ID 7 // EIC7
+static inline void board_vbus_set(uint8_t rhport, bool state) {
+ (void) rhport; (void) state;
+}
+
#ifdef __cplusplus
}
#endif
diff --git a/hw/bsp/samd21/boards/itsybitsy_m0/board.h b/hw/bsp/samd21/boards/itsybitsy_m0/board.h
index 15a0afb15..d901b2ea4 100644
--- a/hw/bsp/samd21/boards/itsybitsy_m0/board.h
+++ b/hw/bsp/samd21/boards/itsybitsy_m0/board.h
@@ -48,6 +48,10 @@
#define UART_RX_PIN 4
#define UART_TX_PIN 5
+static inline void board_vbus_set(uint8_t rhport, bool state) {
+ (void) rhport; (void) state;
+}
+
#ifdef __cplusplus
}
#endif
diff --git a/hw/bsp/samd21/boards/metro_m0_express/board.h b/hw/bsp/samd21/boards/metro_m0_express/board.h
index 405c92b02..726de3259 100644
--- a/hw/bsp/samd21/boards/metro_m0_express/board.h
+++ b/hw/bsp/samd21/boards/metro_m0_express/board.h
@@ -63,6 +63,9 @@
#define MAX3421_INTR_PIN 7 // D9
#define MAX3421_INTR_EIC_ID 7 // EIC7
+static inline void board_vbus_set(uint8_t rhport, bool state) {
+ (void) rhport; (void) state;
+}
#ifdef __cplusplus
}
diff --git a/hw/bsp/samd21/boards/qtpy/board.h b/hw/bsp/samd21/boards/qtpy/board.h
index 29a9f727f..b1cf338e4 100644
--- a/hw/bsp/samd21/boards/qtpy/board.h
+++ b/hw/bsp/samd21/boards/qtpy/board.h
@@ -44,6 +44,10 @@
#define UART_RX_PIN 8
#define UART_TX_PIN 7
+static inline void board_vbus_set(uint8_t rhport, bool state) {
+ (void) rhport; (void) state;
+}
+
#ifdef __cplusplus
}
#endif
diff --git a/hw/bsp/samd21/boards/seeeduino_xiao/board.h b/hw/bsp/samd21/boards/seeeduino_xiao/board.h
index 0a6d1fc7d..1c434c68c 100644
--- a/hw/bsp/samd21/boards/seeeduino_xiao/board.h
+++ b/hw/bsp/samd21/boards/seeeduino_xiao/board.h
@@ -48,6 +48,10 @@
#define UART_RX_PIN 4
#define UART_TX_PIN 5
+static inline void board_vbus_set(uint8_t rhport, bool state) {
+ (void) rhport; (void) state;
+}
+
#ifdef __cplusplus
}
#endif
diff --git a/hw/bsp/samd21/boards/sparkfun_samd21_mini_usb/board.h b/hw/bsp/samd21/boards/sparkfun_samd21_mini_usb/board.h
index 85be34008..a05cf5e4e 100644
--- a/hw/bsp/samd21/boards/sparkfun_samd21_mini_usb/board.h
+++ b/hw/bsp/samd21/boards/sparkfun_samd21_mini_usb/board.h
@@ -37,17 +37,23 @@
#endif
// LED
-#define LED_PIN /*PA*/17 /*(D13)*/
+#define LED_PIN 17 // PA17 (D13)
#define LED_STATE_ON 1
// Button
-#define BUTTON_PIN /*PA*/14 /*(D2)*/
+#define BUTTON_PIN 14 // PA14 (D2)
#define BUTTON_STATE_ACTIVE 0
// UART
#define UART_SERCOM 0
-#define UART_RX_PIN /*PA*/11 /*(D0)*/
-#define UART_TX_PIN /*PA*/10 /*(D1)*/
+#define UART_RX_PIN 11 // PA11 D0
+#define UART_TX_PIN 10 // PA10 D1
+
+static inline void board_vbus_set(uint8_t rhport, bool state) {
+ (void) rhport;
+ gpio_set_pin_direction(PIN_PA28, GPIO_DIRECTION_OUT);
+ gpio_set_pin_level(PIN_PA28, state);
+}
#ifdef __cplusplus
}
diff --git a/hw/bsp/samd21/boards/trinket_m0/board.h b/hw/bsp/samd21/boards/trinket_m0/board.h
index 22e7cb77f..01ad83089 100644
--- a/hw/bsp/samd21/boards/trinket_m0/board.h
+++ b/hw/bsp/samd21/boards/trinket_m0/board.h
@@ -38,3 +38,7 @@
#define UART_SERCOM 0
#define UART_RX_PIN 7
#define UART_TX_PIN 6
+
+static inline void board_vbus_set(uint8_t rhport, bool state) {
+ (void) rhport; (void) state;
+}
diff --git a/hw/bsp/samd21/family.c b/hw/bsp/samd21/family.c
index dd76509ae..14e60e917 100644
--- a/hw/bsp/samd21/family.c
+++ b/hw/bsp/samd21/family.c
@@ -30,7 +30,6 @@
#include "sam.h"
#include "bsp/board_api.h"
-#include "board.h"
// Suppress warning caused by mcu driver
#ifdef __GNUC__
@@ -50,6 +49,9 @@
#pragma GCC diagnostic pop
#endif
+static inline void board_vbus_set(uint8_t rhport, bool state) TU_ATTR_UNUSED;
+#include "board.h"
+
//--------------------------------------------------------------------+
// MACRO TYPEDEF CONSTANT ENUM DECLARATION
//--------------------------------------------------------------------+
@@ -68,7 +70,7 @@ void USB_Handler(void) {
tud_int_handler(0);
#endif
-#if CFG_TUH_ENABLED && !(defined(CFG_TUH_MAX3421) && CFG_TUH_MAX3421)
+#if CFG_TUH_ENABLED && !CFG_TUH_MAX3421
tuh_int_handler(0);
#endif
}
@@ -78,11 +80,9 @@ void USB_Handler(void) {
//--------------------------------------------------------------------+
static void uart_init(void);
-#if CFG_TUH_ENABLED && defined(CFG_TUH_MAX3421) && CFG_TUH_MAX3421
+#if CFG_TUH_ENABLED && CFG_TUH_MAX3421
#define MAX3421_SERCOM TU_XSTRCAT(SERCOM, MAX3421_SERCOM_ID)
-
static void max3421_init(void);
-
#endif
void board_init(void) {
@@ -151,12 +151,11 @@ void board_init(void) {
_gclk_enable_channel(TCC0_GCLK_ID, GCLK_CLKCTRL_GEN_GCLK0_Val);
#if CFG_TUH_ENABLED
- #if defined(CFG_TUH_MAX3421) && CFG_TUH_MAX3421
+ #if CFG_TUH_MAX3421
max3421_init();
#else
// VBUS Power
- gpio_set_pin_direction(PIN_PA28, GPIO_DIRECTION_OUT);
- gpio_set_pin_level(PIN_PA28, true);
+ board_vbus_set(0, true);
#endif
#endif
}
diff --git a/hw/bsp/samd5x_e5x/boards/d5035_01/board.h b/hw/bsp/samd5x_e5x/boards/d5035_01/board.h
index 4eb4a4ebe..caa79f2dd 100644
--- a/hw/bsp/samd5x_e5x/boards/d5035_01/board.h
+++ b/hw/bsp/samd5x_e5x/boards/d5035_01/board.h
@@ -45,156 +45,10 @@
// UART: HWREV < 3: SERCOM5 on PB02, otherwise SERCOM0 on PA08
// XTAL configure is also different for HWREV as well
-#if 0
-static inline void init_clock(void) {
- /* AUTOWS is enabled by default in REG_NVMCTRL_CTRLA - no need to change the number of wait states when changing the core clock */
-#if HWREV == 1
- /* configure XOSC1 for a 16MHz crystal connected to XIN1/XOUT1 */
- OSCCTRL->XOSCCTRL[1].reg =
- OSCCTRL_XOSCCTRL_STARTUP(6) | // 1,953 ms
- OSCCTRL_XOSCCTRL_RUNSTDBY |
- OSCCTRL_XOSCCTRL_ENALC |
- OSCCTRL_XOSCCTRL_IMULT(4) |
- OSCCTRL_XOSCCTRL_IPTAT(3) |
- OSCCTRL_XOSCCTRL_XTALEN |
- OSCCTRL_XOSCCTRL_ENABLE;
- while(0 == OSCCTRL->STATUS.bit.XOSCRDY1);
-
- OSCCTRL->Dpll[0].DPLLCTRLB.reg = OSCCTRL_DPLLCTRLB_DIV(3) | OSCCTRL_DPLLCTRLB_REFCLK(OSCCTRL_DPLLCTRLB_REFCLK_XOSC1_Val); /* pre-scaler = 8, input = XOSC1 */
- OSCCTRL->Dpll[0].DPLLRATIO.reg = OSCCTRL_DPLLRATIO_LDRFRAC(0x0) | OSCCTRL_DPLLRATIO_LDR(39); /* multiply by 40 -> 80 MHz */
- OSCCTRL->Dpll[0].DPLLCTRLA.reg = OSCCTRL_DPLLCTRLA_RUNSTDBY | OSCCTRL_DPLLCTRLA_ENABLE;
- while(0 == OSCCTRL->Dpll[0].DPLLSTATUS.bit.CLKRDY); /* wait for the PLL0 to be ready */
-
- OSCCTRL->Dpll[1].DPLLCTRLB.reg = OSCCTRL_DPLLCTRLB_DIV(7) | OSCCTRL_DPLLCTRLB_REFCLK(OSCCTRL_DPLLCTRLB_REFCLK_XOSC1_Val); /* pre-scaler = 16, input = XOSC1 */
- OSCCTRL->Dpll[1].DPLLRATIO.reg = OSCCTRL_DPLLRATIO_LDRFRAC(0x0) | OSCCTRL_DPLLRATIO_LDR(47); /* multiply by 48 -> 48 MHz */
- OSCCTRL->Dpll[1].DPLLCTRLA.reg = OSCCTRL_DPLLCTRLA_RUNSTDBY | OSCCTRL_DPLLCTRLA_ENABLE;
- while(0 == OSCCTRL->Dpll[1].DPLLSTATUS.bit.CLKRDY); /* wait for the PLL1 to be ready */
-#else // HWREV >= 1
- /* configure XOSC0 for a 16MHz crystal connected to XIN0/XOUT0 */
- OSCCTRL->XOSCCTRL[0].reg =
- OSCCTRL_XOSCCTRL_STARTUP(6) | // 1,953 ms
- OSCCTRL_XOSCCTRL_RUNSTDBY |
- OSCCTRL_XOSCCTRL_ENALC |
- OSCCTRL_XOSCCTRL_IMULT(4) |
- OSCCTRL_XOSCCTRL_IPTAT(3) |
- OSCCTRL_XOSCCTRL_XTALEN |
- OSCCTRL_XOSCCTRL_ENABLE;
- while (0 == OSCCTRL->STATUS.bit.XOSCRDY0);
-
- OSCCTRL->Dpll[0].DPLLCTRLB.reg = OSCCTRL_DPLLCTRLB_DIV(3) | OSCCTRL_DPLLCTRLB_REFCLK(
- OSCCTRL_DPLLCTRLB_REFCLK_XOSC0_Val); /* pre-scaler = 8, input = XOSC1 */
- OSCCTRL->Dpll[0].DPLLRATIO.reg =
- OSCCTRL_DPLLRATIO_LDRFRAC(0x0) | OSCCTRL_DPLLRATIO_LDR(39); /* multiply by 40 -> 80 MHz */
- OSCCTRL->Dpll[0].DPLLCTRLA.reg = OSCCTRL_DPLLCTRLA_RUNSTDBY | OSCCTRL_DPLLCTRLA_ENABLE;
- while (0 == OSCCTRL->Dpll[0].DPLLSTATUS.bit.CLKRDY); /* wait for the PLL0 to be ready */
-
- OSCCTRL->Dpll[1].DPLLCTRLB.reg = OSCCTRL_DPLLCTRLB_DIV(7) | OSCCTRL_DPLLCTRLB_REFCLK(
- OSCCTRL_DPLLCTRLB_REFCLK_XOSC0_Val); /* pre-scaler = 16, input = XOSC1 */
- OSCCTRL->Dpll[1].DPLLRATIO.reg =
- OSCCTRL_DPLLRATIO_LDRFRAC(0x0) | OSCCTRL_DPLLRATIO_LDR(47); /* multiply by 48 -> 48 MHz */
- OSCCTRL->Dpll[1].DPLLCTRLA.reg = OSCCTRL_DPLLCTRLA_RUNSTDBY | OSCCTRL_DPLLCTRLA_ENABLE;
- while (0 == OSCCTRL->Dpll[1].DPLLSTATUS.bit.CLKRDY); /* wait for the PLL1 to be ready */
-#endif // HWREV
-
- /* configure clock-generator 0 to use DPLL0 as source -> GCLK0 is used for the core */
- GCLK->GENCTRL[0].reg =
- GCLK_GENCTRL_DIV(0) |
- GCLK_GENCTRL_RUNSTDBY |
- GCLK_GENCTRL_GENEN |
- GCLK_GENCTRL_SRC_DPLL0 | /* DPLL0 */
- GCLK_GENCTRL_IDC;
- while (1 == GCLK->SYNCBUSY.bit.GENCTRL0); /* wait for the synchronization between clock domains to be complete */
-
- /* configure clock-generator 1 to use DPLL1 as source -> for use with some peripheral */
- GCLK->GENCTRL[1].reg =
- GCLK_GENCTRL_DIV(0) |
- GCLK_GENCTRL_RUNSTDBY |
- GCLK_GENCTRL_GENEN |
- GCLK_GENCTRL_SRC_DPLL1 |
- GCLK_GENCTRL_IDC;
- while (1 == GCLK->SYNCBUSY.bit.GENCTRL1); /* wait for the synchronization between clock domains to be complete */
-
- /* configure clock-generator 2 to use DPLL0 as source -> for use with SERCOM */
- GCLK->GENCTRL[2].reg =
- GCLK_GENCTRL_DIV(1) | /* 80MHz */
- GCLK_GENCTRL_RUNSTDBY |
- GCLK_GENCTRL_GENEN |
- GCLK_GENCTRL_SRC_DPLL0 |
- GCLK_GENCTRL_IDC;
- while (1 == GCLK->SYNCBUSY.bit.GENCTRL2); /* wait for the synchronization between clock domains to be complete */
+static inline void board_vbus_set(uint8_t rhport, bool state) {
+ (void) rhport; (void) state;
}
-static inline void uart_init(void) {
-#if HWREV < 3
- /* configure SERCOM5 on PB02 */
- PORT->Group[1].WRCONFIG.reg =
- PORT_WRCONFIG_WRPINCFG |
- PORT_WRCONFIG_WRPMUX |
- PORT_WRCONFIG_PMUX(3) | /* function D */
- PORT_WRCONFIG_DRVSTR |
- PORT_WRCONFIG_PINMASK(0x0004) | /* PB02 */
- PORT_WRCONFIG_PMUXEN;
-
- MCLK->APBDMASK.bit.SERCOM5_ = 1;
- GCLK->PCHCTRL[SERCOM5_GCLK_ID_CORE].reg =
- GCLK_PCHCTRL_GEN_GCLK2 | GCLK_PCHCTRL_CHEN; /* setup SERCOM to use GLCK2 -> 80MHz */
-
- SERCOM5->USART.CTRLA.reg = 0x00; /* disable SERCOM -> enable config */
- while (SERCOM5->USART.SYNCBUSY.bit.ENABLE);
-
- SERCOM5->USART.CTRLA.reg = /* CMODE = 0 -> async, SAMPA = 0, FORM = 0 -> USART frame, SMPR = 0 -> arithmetic baud rate */
- SERCOM_USART_CTRLA_SAMPR(1) | /* 0 = 16x / arithmetic baud rate, 1 = 16x / fractional baud rate */
- // SERCOM_USART_CTRLA_FORM(0) | /* 0 = USART Frame, 2 = LIN Master */
- SERCOM_USART_CTRLA_DORD | /* LSB first */
- SERCOM_USART_CTRLA_MODE(1) | /* 0 = Asynchronous, 1 = USART with internal clock */
- SERCOM_USART_CTRLA_RXPO(1) | /* SERCOM PAD[1] is used for data reception */
- SERCOM_USART_CTRLA_TXPO(0); /* SERCOM PAD[0] is used for data transmission */
-
- SERCOM5->USART.CTRLB.reg = /* RXEM = 0 -> receiver disabled, LINCMD = 0 -> normal USART transmission, SFDE = 0 -> start-of-frame detection disabled, SBMODE = 0 -> one stop bit, CHSIZE = 0 -> 8 bits */
- SERCOM_USART_CTRLB_TXEN; /* transmitter enabled */
- SERCOM5->USART.CTRLC.reg = 0x00;
- // 21.701388889 @ baud rate of 230400 bit/s, table 33-2, p 918 of DS60001507E
- SERCOM5->USART.BAUD.reg = SERCOM_USART_BAUD_FRAC_FP(7) | SERCOM_USART_BAUD_FRAC_BAUD(21);
-
-// SERCOM5->USART.INTENSET.reg = SERCOM_USART_INTENSET_TXC;
- SERCOM5->SPI.CTRLA.bit.ENABLE = 1; /* activate SERCOM */
- while (SERCOM5->USART.SYNCBUSY.bit.ENABLE); /* wait for SERCOM to be ready */
-#else
- /* configure SERCOM0 on PA08 */
- PORT->Group[0].WRCONFIG.reg =
- PORT_WRCONFIG_WRPINCFG |
- PORT_WRCONFIG_WRPMUX |
- PORT_WRCONFIG_PMUX(2) | /* function C */
- PORT_WRCONFIG_DRVSTR |
- PORT_WRCONFIG_PINMASK(0x0100) | /* PA08 */
- PORT_WRCONFIG_PMUXEN;
-
- MCLK->APBAMASK.bit.SERCOM0_ = 1;
- GCLK->PCHCTRL[SERCOM0_GCLK_ID_CORE].reg = GCLK_PCHCTRL_GEN_GCLK2 | GCLK_PCHCTRL_CHEN; /* setup SERCOM to use GLCK2 -> 80MHz */
-
- SERCOM0->USART.CTRLA.reg = 0x00; /* disable SERCOM -> enable config */
- while(SERCOM0->USART.SYNCBUSY.bit.ENABLE);
-
- SERCOM0->USART.CTRLA.reg = /* CMODE = 0 -> async, SAMPA = 0, FORM = 0 -> USART frame, SMPR = 0 -> arithmetic baud rate */
- SERCOM_USART_CTRLA_SAMPR(1) | /* 0 = 16x / arithmetic baud rate, 1 = 16x / fractional baud rate */
- // SERCOM_USART_CTRLA_FORM(0) | /* 0 = USART Frame, 2 = LIN Master */
- SERCOM_USART_CTRLA_DORD | /* LSB first */
- SERCOM_USART_CTRLA_MODE(1) | /* 0 = Asynchronous, 1 = USART with internal clock */
- SERCOM_USART_CTRLA_RXPO(1) | /* SERCOM PAD[1] is used for data reception */
- SERCOM_USART_CTRLA_TXPO(0); /* SERCOM PAD[0] is used for data transmission */
-
- SERCOM0->USART.CTRLB.reg = /* RXEM = 0 -> receiver disabled, LINCMD = 0 -> normal USART transmission, SFDE = 0 -> start-of-frame detection disabled, SBMODE = 0 -> one stop bit, CHSIZE = 0 -> 8 bits */
- SERCOM_USART_CTRLB_TXEN; /* transmitter enabled */
- SERCOM0->USART.CTRLC.reg = 0x00;
- // 21.701388889 @ baud rate of 230400 bit/s, table 33-2, p 918 of DS60001507E
- SERCOM0->USART.BAUD.reg = SERCOM_USART_BAUD_FRAC_FP(7) | SERCOM_USART_BAUD_FRAC_BAUD(21);
-
- // SERCOM0->USART.INTENSET.reg = SERCOM_USART_INTENSET_TXC;
- SERCOM0->SPI.CTRLA.bit.ENABLE = 1; /* activate SERCOM */
- while(SERCOM0->USART.SYNCBUSY.bit.ENABLE); /* wait for SERCOM to be ready */
-#endif
-}
-#endif
#ifdef __cplusplus
}
diff --git a/hw/bsp/samd5x_e5x/boards/feather_m4_express/board.h b/hw/bsp/samd5x_e5x/boards/feather_m4_express/board.h
index edb965c9d..a6882e427 100644
--- a/hw/bsp/samd5x_e5x/boards/feather_m4_express/board.h
+++ b/hw/bsp/samd5x_e5x/boards/feather_m4_express/board.h
@@ -65,6 +65,10 @@
#define MAX3421_INTR_PIN 19 // D9
#define MAX3421_INTR_EIC_ID 3 // EIC3
+static inline void board_vbus_set(uint8_t rhport, bool state) {
+ (void) rhport; (void) state;
+}
+
#ifdef __cplusplus
}
#endif
diff --git a/hw/bsp/samd5x_e5x/boards/itsybitsy_m4/board.h b/hw/bsp/samd5x_e5x/boards/itsybitsy_m4/board.h
index d41ca4ac3..4e1a6f9dd 100644
--- a/hw/bsp/samd5x_e5x/boards/itsybitsy_m4/board.h
+++ b/hw/bsp/samd5x_e5x/boards/itsybitsy_m4/board.h
@@ -48,6 +48,10 @@
#define UART_TX_PIN 16
#define UART_RX_PIN 17
+static inline void board_vbus_set(uint8_t rhport, bool state) {
+ (void) rhport; (void) state;
+}
+
#ifdef __cplusplus
}
#endif
diff --git a/hw/bsp/samd5x_e5x/boards/metro_m4_express/board.h b/hw/bsp/samd5x_e5x/boards/metro_m4_express/board.h
index b2eaaa54d..b76e317a5 100644
--- a/hw/bsp/samd5x_e5x/boards/metro_m4_express/board.h
+++ b/hw/bsp/samd5x_e5x/boards/metro_m4_express/board.h
@@ -63,6 +63,9 @@
#define MAX3421_INTR_PIN 20 // D9
#define MAX3421_INTR_EIC_ID 4 // EIC4
+static inline void board_vbus_set(uint8_t rhport, bool state) {
+ (void) rhport; (void) state;
+}
#ifdef __cplusplus
}
diff --git a/hw/bsp/samd5x_e5x/boards/pybadge/board.h b/hw/bsp/samd5x_e5x/boards/pybadge/board.h
index a5d447db6..598d8cc88 100644
--- a/hw/bsp/samd5x_e5x/boards/pybadge/board.h
+++ b/hw/bsp/samd5x_e5x/boards/pybadge/board.h
@@ -48,6 +48,10 @@
#define UART_TX_PIN (32 + 17)
#define UART_RX_PIN (32 + 16)
+static inline void board_vbus_set(uint8_t rhport, bool state) {
+ (void) rhport; (void) state;
+}
+
#ifdef __cplusplus
}
#endif
diff --git a/hw/bsp/samd5x_e5x/boards/pyportal/board.h b/hw/bsp/samd5x_e5x/boards/pyportal/board.h
index e635e1375..7e7370681 100644
--- a/hw/bsp/samd5x_e5x/boards/pyportal/board.h
+++ b/hw/bsp/samd5x_e5x/boards/pyportal/board.h
@@ -48,6 +48,10 @@
#define UART_TX_PIN (32 + 13)
#define UART_RX_PIN (32 + 12)
+static inline void board_vbus_set(uint8_t rhport, bool state) {
+ (void) rhport; (void) state;
+}
+
#ifdef __cplusplus
}
#endif
diff --git a/hw/bsp/samd5x_e5x/boards/same54_xplained/board.h b/hw/bsp/samd5x_e5x/boards/same54_xplained/board.h
index 6c252f9d0..868c02a66 100644
--- a/hw/bsp/samd5x_e5x/boards/same54_xplained/board.h
+++ b/hw/bsp/samd5x_e5x/boards/same54_xplained/board.h
@@ -48,6 +48,10 @@
//#define UART_TX_PIN 23
//#define UART_RX_PIN 22
+static inline void board_vbus_set(uint8_t rhport, bool state) {
+ (void) rhport; (void) state;
+}
+
#ifdef __cplusplus
}
#endif
diff --git a/hw/bsp/samd5x_e5x/family.c b/hw/bsp/samd5x_e5x/family.c
index a5d094149..d53aa00d6 100644
--- a/hw/bsp/samd5x_e5x/family.c
+++ b/hw/bsp/samd5x_e5x/family.c
@@ -30,7 +30,6 @@
#include "sam.h"
#include "bsp/board_api.h"
-#include "board.h"
// Suppress warning caused by mcu driver
#ifdef __GNUC__
@@ -47,6 +46,9 @@
#pragma GCC diagnostic pop
#endif
+static inline void board_vbus_set(uint8_t rhport, bool state) TU_ATTR_UNUSED;
+#include "board.h"
+
//--------------------------------------------------------------------+
// MACRO TYPEDEF CONSTANT ENUM DECLARATION
//--------------------------------------------------------------------+
@@ -60,8 +62,7 @@
//--------------------------------------------------------------------+
// Forward USB interrupt events to TinyUSB IRQ Handler
//--------------------------------------------------------------------+
-TU_ATTR_ALWAYS_INLINE inline void USB_Any_Handler(void)
-{
+TU_ATTR_ALWAYS_INLINE static inline void USB_Any_Handler(void) {
#if CFG_TUD_ENABLED
tud_int_handler(0);
#endif
@@ -72,11 +73,8 @@ TU_ATTR_ALWAYS_INLINE inline void USB_Any_Handler(void)
}
void USB_0_Handler(void) { USB_Any_Handler(); }
-
void USB_1_Handler(void) { USB_Any_Handler(); }
-
void USB_2_Handler(void) { USB_Any_Handler(); }
-
void USB_3_Handler(void) { USB_Any_Handler(); }
//--------------------------------------------------------------------+
@@ -84,10 +82,8 @@ void USB_3_Handler(void) { USB_Any_Handler(); }
//--------------------------------------------------------------------+
#if CFG_TUH_ENABLED && CFG_TUH_MAX3421
-
#define MAX3421_SERCOM TU_XSTRCAT(SERCOM, MAX3421_SERCOM_ID)
#define MAX3421_EIC_Handler TU_XSTRCAT3(EIC_, MAX3421_INTR_EIC_ID, _Handler)
-
static void max3421_init(void);
#endif
@@ -150,8 +146,7 @@ void board_init(void) {
max3421_init();
#else
// VBUS Power
- gpio_set_pin_direction(PIN_PA28, GPIO_DIRECTION_OUT);
- gpio_set_pin_level(PIN_PA28, true);
+ board_vbus_set(0, true);
#endif
#endif
}
diff --git a/src/portable/microchip/samd/hcd_samd.c b/src/portable/microchip/samd/hcd_samd.c
index cecaee0b0..1f4b2b233 100644
--- a/src/portable/microchip/samd/hcd_samd.c
+++ b/src/portable/microchip/samd/hcd_samd.c
@@ -171,7 +171,7 @@ static void samd_free_pipe(uint8_t pipe)
USB->HOST.HostPipe[pipe].PSTATUSSET.reg = USB_HOST_PSTATUSSET_PFREEZE;
USB->HOST.HostPipe[pipe].PCFG.reg &= ~USB_HOST_PCFG_PTYPE_Msk;
USB->HOST.HostPipe[pipe].PINTENCLR.reg = USB_HOST_PINTENCLR_MASK;
- memset((uint8_t*) &usb_pipe_table[pipe], 0, sizeof(usb_pipe_table[pipe]));
+ memset((uint8_t*)(uintptr_t) &usb_pipe_table[pipe], 0, sizeof(usb_pipe_table[pipe]));
}
static void samd_free_all_pipes(void)
@@ -197,8 +197,7 @@ static bool samd_on_xfer(uint8_t pipe, xfer_result_t xfer_result)
xfer_delta = 0;
}
- TU_LOG3(
- "samd_on_xfer(%d, result=%d, xdelta=%d, rem=%d)\r\n", xfer_result, pipe, xfer_delta, pipe_status->xfer_remaining);
+ TU_LOG3("samd_on_xfer(%d, result=%d, xdelta=%d, rem=%d)\r\n", xfer_result, pipe, xfer_delta, pipe_status->xfer_remaining);
// update pipe status
if (xfer_delta > pipe_status->xfer_remaining) {
@@ -390,10 +389,9 @@ void hcd_int_handler(uint8_t rhport, bool in_isr)
}
// Initialize controller to host mode
-bool hcd_init(uint8_t rhport)
-{
+bool hcd_init(uint8_t rhport, const tusb_rhport_init_t* rh_init) {
TU_ASSERT(rhport == 0);
-
+ (void) rh_init;
fake_fnum = 0;
// reset to get in a clean state.