Merge pull request #3137 from HiFiPhile/uac_simplify
uac2: remove support fifo
This commit is contained in:
@@ -69,13 +69,8 @@ uint8_t clkValid;
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audio_control_range_2_n_t(1) volumeRng[CFG_TUD_AUDIO_FUNC_1_N_CHANNELS_TX+1]; // Volume range state
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audio_control_range_4_n_t(1) sampleFreqRng; // Sample frequency range state
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#if CFG_TUD_AUDIO_ENABLE_ENCODING
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// Audio test data, each buffer contains 2 channels, buffer[0] for CH0-1, buffer[1] for CH1-2
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uint16_t i2s_dummy_buffer[CFG_TUD_AUDIO_FUNC_1_N_TX_SUPP_SW_FIFO][CFG_TUD_AUDIO_FUNC_1_N_CHANNELS_TX*CFG_TUD_AUDIO_FUNC_1_SAMPLE_RATE/1000/CFG_TUD_AUDIO_FUNC_1_N_TX_SUPP_SW_FIFO];
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#else
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// Audio test data, 4 channels muxed together, buffer[0] for CH0, buffer[1] for CH1, buffer[2] for CH2, buffer[3] for CH3
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uint16_t i2s_dummy_buffer[CFG_TUD_AUDIO_FUNC_1_N_CHANNELS_TX*CFG_TUD_AUDIO_FUNC_1_SAMPLE_RATE/1000];
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#endif
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void led_blinking_task(void);
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void audio_task(void);
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@@ -106,27 +101,6 @@ int main(void)
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sampleFreqRng.subrange[0].bRes = 0;
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// Generate dummy data
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#if CFG_TUD_AUDIO_ENABLE_ENCODING
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uint16_t * p_buff = i2s_dummy_buffer[0];
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uint16_t dataVal = 0;
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for (uint16_t cnt = 0; cnt < AUDIO_SAMPLE_RATE/1000; cnt++)
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{
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// CH0 saw wave
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*p_buff++ = dataVal;
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// CH1 inverted saw wave
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*p_buff++ = 3200 + AUDIO_SAMPLE_RATE/1000 - dataVal;
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dataVal+= 32;
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}
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p_buff = i2s_dummy_buffer[1];
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for (uint16_t cnt = 0; cnt < AUDIO_SAMPLE_RATE/1000; cnt++)
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{
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// CH3 square wave
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*p_buff++ = cnt < (AUDIO_SAMPLE_RATE/1000/2) ? 3400:5000;
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// CH4 sinus wave
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float t = 2*3.1415f * cnt / (AUDIO_SAMPLE_RATE/1000);
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*p_buff++ = (uint16_t)((int16_t)(sinf(t) * 750) + 6000);
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}
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#else
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uint16_t * p_buff = i2s_dummy_buffer;
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uint16_t dataVal = 0;
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for (uint16_t cnt = 0; cnt < AUDIO_SAMPLE_RATE/1000; cnt++)
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@@ -142,7 +116,6 @@ int main(void)
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float t = 2*3.1415f * cnt / (AUDIO_SAMPLE_RATE/1000);
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*p_buff++ = (uint16_t)((int16_t)(sinf(t) * 750) + 6000);
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}
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#endif
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while (1)
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{
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@@ -195,15 +168,7 @@ void audio_task(void)
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uint32_t curr_ms = board_millis();
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if ( start_ms == curr_ms ) return; // not enough time
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start_ms = curr_ms;
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#if CFG_TUD_AUDIO_ENABLE_ENCODING
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// Write I2S buffer into FIFO
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for (uint8_t cnt=0; cnt < 2; cnt++)
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{
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tud_audio_write_support_ff(cnt, i2s_dummy_buffer[cnt], AUDIO_SAMPLE_RATE/1000 * CFG_TUD_AUDIO_FUNC_1_N_BYTES_PER_SAMPLE_TX * CFG_TUD_AUDIO_FUNC_1_CHANNEL_PER_FIFO_TX);
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}
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#else
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tud_audio_write(i2s_dummy_buffer, AUDIO_SAMPLE_RATE/1000 * CFG_TUD_AUDIO_FUNC_1_N_BYTES_PER_SAMPLE_TX * CFG_TUD_AUDIO_FUNC_1_N_CHANNELS_TX);
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#endif
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}
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//--------------------------------------------------------------------+
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@@ -115,26 +115,11 @@ extern "C" {
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#define CFG_TUD_AUDIO_FUNC_1_N_CHANNELS_TX 4 // This value is not required by the driver, it parses this information from the descriptor once the alternate interface is set by the host - we use it for the setup
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#define CFG_TUD_AUDIO_EP_SZ_IN TUD_AUDIO_EP_SIZE(CFG_TUD_AUDIO_FUNC_1_SAMPLE_RATE, CFG_TUD_AUDIO_FUNC_1_N_BYTES_PER_SAMPLE_TX, CFG_TUD_AUDIO_FUNC_1_N_CHANNELS_TX)
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#define CFG_TUD_AUDIO_ENABLE_ENCODING 1
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#define CFG_TUD_AUDIO_EP_IN_FLOW_CONTROL 1
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#if CFG_TUD_AUDIO_ENABLE_ENCODING
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#define CFG_TUD_AUDIO_FUNC_1_EP_IN_SZ_MAX CFG_TUD_AUDIO_EP_SZ_IN
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#define CFG_TUD_AUDIO_FUNC_1_EP_IN_SW_BUF_SZ CFG_TUD_AUDIO_EP_SZ_IN
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#define CFG_TUD_AUDIO_ENABLE_TYPE_I_ENCODING 1
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#define CFG_TUD_AUDIO_FUNC_1_CHANNEL_PER_FIFO_TX 2 // One I2S stream contains two channels, each stream is saved within one support FIFO - this value is currently fixed, the driver does not support a changing value
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#define CFG_TUD_AUDIO_FUNC_1_N_TX_SUPP_SW_FIFO (CFG_TUD_AUDIO_FUNC_1_N_CHANNELS_TX / CFG_TUD_AUDIO_FUNC_1_CHANNEL_PER_FIFO_TX)
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#define CFG_TUD_AUDIO_FUNC_1_TX_SUPP_SW_FIFO_SZ (TUD_OPT_HIGH_SPEED ? 32 : 4) * (CFG_TUD_AUDIO_EP_SZ_IN / CFG_TUD_AUDIO_FUNC_1_N_TX_SUPP_SW_FIFO) // Example write FIFO every 1ms, so it should be 8 times larger for HS device
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#else
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#define CFG_TUD_AUDIO_FUNC_1_EP_IN_SZ_MAX CFG_TUD_AUDIO_EP_SZ_IN
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#define CFG_TUD_AUDIO_FUNC_1_EP_IN_SW_BUF_SZ (TUD_OPT_HIGH_SPEED ? 32 : 4) * CFG_TUD_AUDIO_EP_SZ_IN // Example write FIFO every 1ms, so it should be 8 times larger for HS device
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#endif
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#ifdef __cplusplus
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}
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#endif
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@@ -105,13 +105,8 @@ uint8_t clkValid;
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audio_control_range_2_n_t(1) volumeRng[CFG_TUD_AUDIO_FUNC_1_N_CHANNELS_TX+1]; // Volume range state
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audio_control_range_4_n_t(1) sampleFreqRng; // Sample frequency range state
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#if CFG_TUD_AUDIO_ENABLE_ENCODING
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// Audio test data, each buffer contains 2 channels, buffer[0] for CH0-1, buffer[1] for CH1-2
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uint16_t i2s_dummy_buffer[CFG_TUD_AUDIO_FUNC_1_N_TX_SUPP_SW_FIFO][CFG_TUD_AUDIO_FUNC_1_N_CHANNELS_TX*CFG_TUD_AUDIO_FUNC_1_SAMPLE_RATE/1000/CFG_TUD_AUDIO_FUNC_1_N_TX_SUPP_SW_FIFO];
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#else
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// Audio test data, 4 channels muxed together, buffer[0] for CH0, buffer[1] for CH1, buffer[2] for CH2, buffer[3] for CH3
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uint16_t i2s_dummy_buffer[CFG_TUD_AUDIO_FUNC_1_N_CHANNELS_TX*CFG_TUD_AUDIO_FUNC_1_SAMPLE_RATE/1000];
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#endif
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void led_blinking_task(void* param);
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void usb_device_task(void* param);
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@@ -132,27 +127,6 @@ int main(void)
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sampleFreqRng.subrange[0].bRes = 0;
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// Generate dummy data
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#if CFG_TUD_AUDIO_ENABLE_ENCODING
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uint16_t * p_buff = i2s_dummy_buffer[0];
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uint16_t dataVal = 0;
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for (uint16_t cnt = 0; cnt < AUDIO_SAMPLE_RATE/1000; cnt++)
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{
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// CH0 saw wave
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*p_buff++ = dataVal;
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// CH1 inverted saw wave
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*p_buff++ = 3200 + AUDIO_SAMPLE_RATE/1000 - dataVal;
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dataVal+= 32;
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}
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p_buff = i2s_dummy_buffer[1];
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for (uint16_t cnt = 0; cnt < AUDIO_SAMPLE_RATE/1000; cnt++)
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{
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// CH3 square wave
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*p_buff++ = cnt < (AUDIO_SAMPLE_RATE/1000/2) ? 3400:5000;
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// CH4 sinus wave
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float t = 2*3.1415f * cnt / (AUDIO_SAMPLE_RATE/1000);
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*p_buff++ = (uint16_t)((int16_t)(sinf(t) * 750) + 6000);
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}
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#else
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uint16_t * p_buff = i2s_dummy_buffer;
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uint16_t dataVal = 0;
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for (uint16_t cnt = 0; cnt < AUDIO_SAMPLE_RATE/1000; cnt++)
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@@ -168,7 +142,6 @@ int main(void)
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float t = 2*3.1415f * cnt / (AUDIO_SAMPLE_RATE/1000);
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*p_buff++ = (uint16_t)((int16_t)(sinf(t) * 750) + 6000);
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}
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#endif
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#if configSUPPORT_STATIC_ALLOCATION
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// blinky task
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@@ -269,15 +242,7 @@ void audio_task(void* param)
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// Here we simulate a I2S receive callback every 1ms.
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while (1) {
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vTaskDelay(1);
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#if CFG_TUD_AUDIO_ENABLE_ENCODING
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// Write I2S buffer into FIFO
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for (uint8_t cnt=0; cnt < 2; cnt++)
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{
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tud_audio_write_support_ff(cnt, i2s_dummy_buffer[cnt], AUDIO_SAMPLE_RATE/1000 * CFG_TUD_AUDIO_FUNC_1_N_BYTES_PER_SAMPLE_TX * CFG_TUD_AUDIO_FUNC_1_CHANNEL_PER_FIFO_TX);
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}
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#else
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tud_audio_write(i2s_dummy_buffer, AUDIO_SAMPLE_RATE/1000 * CFG_TUD_AUDIO_FUNC_1_N_BYTES_PER_SAMPLE_TX * CFG_TUD_AUDIO_FUNC_1_N_CHANNELS_TX);
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#endif
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}
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}
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@@ -121,26 +121,11 @@ extern "C" {
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#define CFG_TUD_AUDIO_FUNC_1_N_CHANNELS_TX 4 // This value is not required by the driver, it parses this information from the descriptor once the alternate interface is set by the host - we use it for the setup
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#define CFG_TUD_AUDIO_EP_SZ_IN TUD_AUDIO_EP_SIZE(CFG_TUD_AUDIO_FUNC_1_SAMPLE_RATE, CFG_TUD_AUDIO_FUNC_1_N_BYTES_PER_SAMPLE_TX, CFG_TUD_AUDIO_FUNC_1_N_CHANNELS_TX)
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#define CFG_TUD_AUDIO_ENABLE_ENCODING 1
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#define CFG_TUD_AUDIO_EP_IN_FLOW_CONTROL 1
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#if CFG_TUD_AUDIO_ENABLE_ENCODING
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#define CFG_TUD_AUDIO_FUNC_1_EP_IN_SZ_MAX CFG_TUD_AUDIO_EP_SZ_IN
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#define CFG_TUD_AUDIO_FUNC_1_EP_IN_SW_BUF_SZ CFG_TUD_AUDIO_EP_SZ_IN
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#define CFG_TUD_AUDIO_ENABLE_TYPE_I_ENCODING 1
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#define CFG_TUD_AUDIO_FUNC_1_CHANNEL_PER_FIFO_TX 2 // One I2S stream contains two channels, each stream is saved within one support FIFO - this value is currently fixed, the driver does not support a changing value
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#define CFG_TUD_AUDIO_FUNC_1_N_TX_SUPP_SW_FIFO (CFG_TUD_AUDIO_FUNC_1_N_CHANNELS_TX / CFG_TUD_AUDIO_FUNC_1_CHANNEL_PER_FIFO_TX)
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#define CFG_TUD_AUDIO_FUNC_1_TX_SUPP_SW_FIFO_SZ (TUD_OPT_HIGH_SPEED ? 32 : 4) * (CFG_TUD_AUDIO_EP_SZ_IN / CFG_TUD_AUDIO_FUNC_1_N_TX_SUPP_SW_FIFO) // Example write FIFO every 1ms, so it should be 8 times larger for HS device
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#else
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#define CFG_TUD_AUDIO_FUNC_1_EP_IN_SZ_MAX CFG_TUD_AUDIO_EP_SZ_IN
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#define CFG_TUD_AUDIO_FUNC_1_EP_IN_SW_BUF_SZ (TUD_OPT_HIGH_SPEED ? 32 : 4) * CFG_TUD_AUDIO_EP_SZ_IN // Example write FIFO every 1ms, so it should be 8 times larger for HS device
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#endif
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#ifdef __cplusplus
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}
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#endif
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@@ -55,9 +55,45 @@
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// Enable UART serial communication with the ST-Link
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#define UART_DEV USART2
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#define UART_CLK_EN __HAL_RCC_USART2_CLK_ENABLE
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#define UART_GPIO_PORT GPIOA
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#define UART_GPIO_AF GPIO_AF1_USART2
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#define UART_TX_PIN GPIO_PIN_2
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#define UART_RX_PIN GPIO_PIN_3
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static inline void board_clock_init(void) {
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RCC_OscInitTypeDef RCC_OscInitStruct = {0};
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RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
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RCC_CRSInitTypeDef RCC_CRSInitStruct = {0};
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/* -1- Enable HSIUSB48 Oscillator */
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RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI48;
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RCC_OscInitStruct.HSI48State = RCC_HSI48_ON;
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HAL_RCC_OscConfig(&RCC_OscInitStruct);
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/* -2- Initializes the CPU, AHB and APB buses clocks */
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RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK
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|RCC_CLOCKTYPE_PCLK1;
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RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_HSIUSB48;
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RCC_ClkInitStruct.SYSCLKDivider = RCC_SYSCLK_DIV1;
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RCC_ClkInitStruct.AHBCLKDivider = RCC_HCLK_DIV1;
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RCC_ClkInitStruct.APB1CLKDivider = RCC_APB1_DIV1;
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HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_1);
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__HAL_RCC_CRS_CLK_ENABLE();
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// Configures CRS
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RCC_CRSInitStruct.Prescaler = RCC_CRS_SYNC_DIV1;
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RCC_CRSInitStruct.Source = RCC_CRS_SYNC_SOURCE_USB;
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RCC_CRSInitStruct.Polarity = RCC_CRS_SYNC_POLARITY_RISING;
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RCC_CRSInitStruct.ReloadValue = __HAL_RCC_CRS_RELOADVALUE_CALCULATE(48000000,1000);
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RCC_CRSInitStruct.ErrorLimitValue = 34;
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RCC_CRSInitStruct.HSI48CalibrationValue = 32;
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HAL_RCCEx_CRSConfig(&RCC_CRSInitStruct);
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}
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#endif /* BOARD_H_ */
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@@ -53,31 +53,16 @@ UART_HandleTypeDef UartHandle;
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void board_init(void) {
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HAL_Init();
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// Enable the HSIUSB48 48 MHz oscillator.
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RCC->CR |= RCC_CR_HSIUSB48ON;
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// Wait for HSIUSB48 to be ready.
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while (!(RCC->CR & RCC_CR_HSIUSB48RDY)) { }
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// Change the SYSCLK source to HSIUSB48.
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RCC->CFGR = (RCC->CFGR & ~RCC_CFGR_SW) | RCC_SYSCLKSOURCE_HSIUSB48;
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// Wait for the SYSCLK source to change.
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while ((RCC->CFGR & RCC_CFGR_SWS) >> RCC_CFGR_SWS_Pos != RCC_SYSCLKSOURCE_HSIUSB48) { }
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// Disable HSI48 to save power.
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RCC->CR &= ~RCC_CR_HSION;
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board_clock_init();
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// Enable peripheral clocks.
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RCC->APBENR1 = RCC_APBENR1_USBEN | RCC_APBENR1_CRSEN | RCC_APBENR1_USART2EN;
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RCC->APBENR2 = RCC_APBENR2_USART1EN;
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// Enable all GPIO clocks.
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RCC->IOPENR = 0x2F;
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// Turn on CRS to make the HSIUSB48 clock more precise when USB is connected.
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CRS->CR |= CRS_CR_AUTOTRIMEN | CRS_CR_CEN;
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__HAL_RCC_USB_CLK_ENABLE();
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__HAL_RCC_GPIOA_CLK_ENABLE();
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__HAL_RCC_GPIOB_CLK_ENABLE();
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__HAL_RCC_GPIOC_CLK_ENABLE();
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__HAL_RCC_GPIOD_CLK_ENABLE();
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__HAL_RCC_SYSCFG_CLK_ENABLE();
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__HAL_RCC_PWR_CLK_ENABLE();
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#if CFG_TUSB_OS == OPT_OS_NONE
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// 1ms tick timer
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@@ -109,6 +94,7 @@ void board_init(void) {
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}
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#ifdef UART_DEV
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UART_CLK_EN();
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// UART
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{
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GPIO_InitTypeDef gpio_init = { 0 };
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File diff suppressed because it is too large
Load Diff
@@ -206,153 +206,6 @@
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// Audio control interrupt EP - 6 Bytes according to UAC 2 specification (p. 74)
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#define CFG_TUD_AUDIO_INTERRUPT_EP_SZ 6
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// Use software encoding/decoding
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// The software coding feature of the driver is not mandatory. It is useful if, for instance, you have two I2S streams which need to be interleaved
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// into a single PCM stream as SAMPLE_1 | SAMPLE_2 | SAMPLE_3 | SAMPLE_4.
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//
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// Currently, only PCM type I encoding/decoding is supported!
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//
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// If the coding feature is to be used, support FIFOs need to be configured. Their sizes and numbers are defined below.
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// Encoding/decoding is done in software and thus time consuming. If you can encode/decode your stream more efficiently do not use the
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// support FIFOs but write/read directly into/from the EP_X_SW_BUFFER_FIFOs using
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// - tud_audio_n_write() or
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// - tud_audio_n_read().
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// To write/read to/from the support FIFOs use
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// - tud_audio_n_write_support_ff() or
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// - tud_audio_n_read_support_ff().
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//
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// The encoding/decoding format type done is defined below.
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//
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// The encoding/decoding starts when the private callback functions
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// - audio_tx_done_cb()
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// - audio_rx_done_cb()
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// are invoked. If support FIFOs are used, the corresponding encoding/decoding functions are called from there.
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// Once encoding/decoding is done the result is put directly into the EP_X_SW_BUFFER_FIFOs. You can use the public callback functions
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// - tud_audio_tx_done_pre_load_cb() or tud_audio_tx_done_post_load_cb()
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// - tud_audio_rx_done_pre_read_cb() or tud_audio_rx_done_post_read_cb()
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// if you want to get informed what happened.
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//
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// If you don't use the support FIFOs you may use the public callback functions
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// - tud_audio_tx_done_pre_load_cb() or tud_audio_tx_done_post_load_cb()
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// - tud_audio_rx_done_pre_read_cb() or tud_audio_rx_done_post_read_cb()
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// to write/read from/into the EP_X_SW_BUFFER_FIFOs at the right time.
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//
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// If you need a different encoding which is not support so far implement it in the
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// - audio_tx_done_cb()
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// - audio_rx_done_cb()
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// functions.
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// Enable encoding/decodings - for these to work, support FIFOs need to be setup in appropriate numbers and size
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// The actual coding parameters of active AS alternate interface is parsed from the descriptors
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// The item size of the FIFO is always fixed to one i.e. bytes! Furthermore, the actively used FIFO depth is reconfigured such that the depth is a multiple
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// of the current sample size in order to avoid samples to get split up in case of a wrap in the FIFO ring buffer (depth = (max_depth / sample_sz) * sample_sz)!
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// This is important to remind in case you use DMAs! If the sample sizes changes, the DMA MUST BE RECONFIGURED just like the FIFOs for a different depth!!!
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// For PCM encoding/decoding
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#ifndef CFG_TUD_AUDIO_ENABLE_ENCODING
|
||||
#define CFG_TUD_AUDIO_ENABLE_ENCODING 0
|
||||
#endif
|
||||
|
||||
#ifndef CFG_TUD_AUDIO_ENABLE_DECODING
|
||||
#define CFG_TUD_AUDIO_ENABLE_DECODING 0
|
||||
#endif
|
||||
|
||||
// This enabling allows to save the current coding parameters e.g. # of bytes per sample etc. - TYPE_I includes common PCM encoding
|
||||
#ifndef CFG_TUD_AUDIO_ENABLE_TYPE_I_ENCODING
|
||||
#define CFG_TUD_AUDIO_ENABLE_TYPE_I_ENCODING 0
|
||||
#endif
|
||||
|
||||
#ifndef CFG_TUD_AUDIO_ENABLE_TYPE_I_DECODING
|
||||
#define CFG_TUD_AUDIO_ENABLE_TYPE_I_DECODING 0
|
||||
#endif
|
||||
|
||||
// Type I Coding parameters not given within UAC2 descriptors
|
||||
// It would be possible to allow for a more flexible setting and not fix this parameter as done below. However, this is most often not needed and kept for later if really necessary. The more flexible setting could be implemented within set_interface(), however, how the values are saved per alternate setting is to be determined!
|
||||
#if CFG_TUD_AUDIO_ENABLE_EP_IN && CFG_TUD_AUDIO_ENABLE_ENCODING && CFG_TUD_AUDIO_ENABLE_TYPE_I_ENCODING
|
||||
#ifndef CFG_TUD_AUDIO_FUNC_1_CHANNEL_PER_FIFO_TX
|
||||
#error You must tell the driver the number of channels per FIFO for the interleaved encoding! E.g. for an I2S interface having two channels, CHANNEL_PER_FIFO = 2 as the I2S stream having two channels is usually saved within one FIFO
|
||||
#endif
|
||||
#if CFG_TUD_AUDIO > 1
|
||||
#ifndef CFG_TUD_AUDIO_FUNC_2_CHANNEL_PER_FIFO_TX
|
||||
#error You must tell the driver the number of channels per FIFO for the interleaved encoding! E.g. for an I2S interface having two channels, CHANNEL_PER_FIFO = 2 as the I2S stream having two channels is usually saved within one FIFO
|
||||
#endif
|
||||
#endif
|
||||
#if CFG_TUD_AUDIO > 2
|
||||
#ifndef CFG_TUD_AUDIO_FUNC_3_CHANNEL_PER_FIFO_TX
|
||||
#error You must tell the driver the number of channels per FIFO for the interleaved encoding! E.g. for an I2S interface having two channels, CHANNEL_PER_FIFO = 2 as the I2S stream having two channels is usually saved within one FIFO
|
||||
#endif
|
||||
#endif
|
||||
#endif
|
||||
|
||||
#if CFG_TUD_AUDIO_ENABLE_EP_OUT && CFG_TUD_AUDIO_ENABLE_DECODING && CFG_TUD_AUDIO_ENABLE_TYPE_I_DECODING
|
||||
#ifndef CFG_TUD_AUDIO_FUNC_1_CHANNEL_PER_FIFO_RX
|
||||
#error You must tell the driver the number of channels per FIFO for the interleaved encoding! E.g. for an I2S interface having two channels, CHANNEL_PER_FIFO = 2 as the I2S stream having two channels is usually saved within one FIFO
|
||||
#endif
|
||||
#if CFG_TUD_AUDIO > 1
|
||||
#ifndef CFG_TUD_AUDIO_FUNC_2_CHANNEL_PER_FIFO_RX
|
||||
#error You must tell the driver the number of channels per FIFO for the interleaved encoding! E.g. for an I2S interface having two channels, CHANNEL_PER_FIFO = 2 as the I2S stream having two channels is usually saved within one FIFO
|
||||
#endif
|
||||
#endif
|
||||
#if CFG_TUD_AUDIO > 2
|
||||
#ifndef CFG_TUD_AUDIO_FUNC_3_CHANNEL_PER_FIFO_RX
|
||||
#error You must tell the driver the number of channels per FIFO for the interleaved encoding! E.g. for an I2S interface having two channels, CHANNEL_PER_FIFO = 2 as the I2S stream having two channels is usually saved within one FIFO
|
||||
#endif
|
||||
#endif
|
||||
#endif
|
||||
|
||||
// Remaining types not support so far
|
||||
|
||||
// Number of support FIFOs to set up - multiple channels can be handled by one FIFO - very common is two channels per FIFO stemming from one I2S interface
|
||||
#ifndef CFG_TUD_AUDIO_FUNC_1_N_TX_SUPP_SW_FIFO
|
||||
#define CFG_TUD_AUDIO_FUNC_1_N_TX_SUPP_SW_FIFO 0
|
||||
#endif
|
||||
#ifndef CFG_TUD_AUDIO_FUNC_2_N_TX_SUPP_SW_FIFO
|
||||
#define CFG_TUD_AUDIO_FUNC_2_N_TX_SUPP_SW_FIFO 0
|
||||
#endif
|
||||
#ifndef CFG_TUD_AUDIO_FUNC_3_N_TX_SUPP_SW_FIFO
|
||||
#define CFG_TUD_AUDIO_FUNC_3_N_TX_SUPP_SW_FIFO 0
|
||||
#endif
|
||||
|
||||
#ifndef CFG_TUD_AUDIO_FUNC_1_N_RX_SUPP_SW_FIFO
|
||||
#define CFG_TUD_AUDIO_FUNC_1_N_RX_SUPP_SW_FIFO 0
|
||||
#endif
|
||||
#ifndef CFG_TUD_AUDIO_FUNC_2_N_RX_SUPP_SW_FIFO
|
||||
#define CFG_TUD_AUDIO_FUNC_2_N_RX_SUPP_SW_FIFO 0
|
||||
#endif
|
||||
#ifndef CFG_TUD_AUDIO_FUNC_3_N_RX_SUPP_SW_FIFO
|
||||
#define CFG_TUD_AUDIO_FUNC_3_N_RX_SUPP_SW_FIFO 0
|
||||
#endif
|
||||
|
||||
// Size of support FIFOs IN BYTES - if size > 0 there are as many FIFOs set up as CFG_TUD_AUDIO_FUNC_X_N_TX_SUPP_SW_FIFO and CFG_TUD_AUDIO_FUNC_X_N_RX_SUPP_SW_FIFO
|
||||
#ifndef CFG_TUD_AUDIO_FUNC_1_TX_SUPP_SW_FIFO_SZ
|
||||
#define CFG_TUD_AUDIO_FUNC_1_TX_SUPP_SW_FIFO_SZ 0 // FIFO size - minimum size: ceil(f_s/1000) * max(# of TX channels) / (# of TX support FIFOs) * max(# of bytes per sample)
|
||||
#endif
|
||||
#ifndef CFG_TUD_AUDIO_FUNC_2_TX_SUPP_SW_FIFO_SZ
|
||||
#define CFG_TUD_AUDIO_FUNC_2_TX_SUPP_SW_FIFO_SZ 0
|
||||
#endif
|
||||
#ifndef CFG_TUD_AUDIO_FUNC_3_TX_SUPP_SW_FIFO_SZ
|
||||
#define CFG_TUD_AUDIO_FUNC_3_TX_SUPP_SW_FIFO_SZ 0
|
||||
#endif
|
||||
|
||||
#ifndef CFG_TUD_AUDIO_FUNC_1_RX_SUPP_SW_FIFO_SZ
|
||||
#define CFG_TUD_AUDIO_FUNC_1_RX_SUPP_SW_FIFO_SZ 0 // FIFO size - minimum size: ceil(f_s/1000) * max(# of RX channels) / (# of RX support FIFOs) * max(# of bytes per sample)
|
||||
#endif
|
||||
#ifndef CFG_TUD_AUDIO_FUNC_2_RX_SUPP_SW_FIFO_SZ
|
||||
#define CFG_TUD_AUDIO_FUNC_2_RX_SUPP_SW_FIFO_SZ 0
|
||||
#endif
|
||||
#ifndef CFG_TUD_AUDIO_FUNC_3_RX_SUPP_SW_FIFO_SZ
|
||||
#define CFG_TUD_AUDIO_FUNC_3_RX_SUPP_SW_FIFO_SZ 0
|
||||
#endif
|
||||
|
||||
//static_assert(sizeof(tud_audio_desc_lengths) != CFG_TUD_AUDIO, "Supply audio function descriptor pack length!");
|
||||
|
||||
// Supported types of this driver:
|
||||
// AUDIO_DATA_FORMAT_TYPE_I_PCM - Required definitions: CFG_TUD_AUDIO_N_CHANNELS and CFG_TUD_AUDIO_BYTES_PER_CHANNEL
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
@@ -368,38 +221,23 @@ extern "C" {
|
||||
//--------------------------------------------------------------------+
|
||||
bool tud_audio_n_mounted (uint8_t func_id);
|
||||
|
||||
#if CFG_TUD_AUDIO_ENABLE_EP_OUT && !CFG_TUD_AUDIO_ENABLE_DECODING
|
||||
#if CFG_TUD_AUDIO_ENABLE_EP_OUT
|
||||
uint16_t tud_audio_n_available (uint8_t func_id);
|
||||
uint16_t tud_audio_n_read (uint8_t func_id, void* buffer, uint16_t bufsize);
|
||||
bool tud_audio_n_clear_ep_out_ff (uint8_t func_id); // Delete all content in the EP OUT FIFO
|
||||
tu_fifo_t* tud_audio_n_get_ep_out_ff (uint8_t func_id);
|
||||
#endif
|
||||
|
||||
#if CFG_TUD_AUDIO_ENABLE_EP_OUT && CFG_TUD_AUDIO_ENABLE_DECODING
|
||||
bool tud_audio_n_clear_rx_support_ff (uint8_t func_id, uint8_t ff_idx); // Delete all content in the support RX FIFOs
|
||||
uint16_t tud_audio_n_available_support_ff (uint8_t func_id, uint8_t ff_idx);
|
||||
uint16_t tud_audio_n_read_support_ff (uint8_t func_id, uint8_t ff_idx, void* buffer, uint16_t bufsize);
|
||||
tu_fifo_t* tud_audio_n_get_rx_support_ff (uint8_t func_id, uint8_t ff_idx);
|
||||
#endif
|
||||
|
||||
#if CFG_TUD_AUDIO_ENABLE_EP_IN && !CFG_TUD_AUDIO_ENABLE_ENCODING
|
||||
#if CFG_TUD_AUDIO_ENABLE_EP_IN
|
||||
uint16_t tud_audio_n_write (uint8_t func_id, const void * data, uint16_t len);
|
||||
bool tud_audio_n_clear_ep_in_ff (uint8_t func_id); // Delete all content in the EP IN FIFO
|
||||
tu_fifo_t* tud_audio_n_get_ep_in_ff (uint8_t func_id);
|
||||
#endif
|
||||
|
||||
#if CFG_TUD_AUDIO_ENABLE_EP_IN && CFG_TUD_AUDIO_ENABLE_ENCODING
|
||||
uint16_t tud_audio_n_flush_tx_support_ff (uint8_t func_id); // Force all content in the support TX FIFOs to be written into EP SW FIFO
|
||||
bool tud_audio_n_clear_tx_support_ff (uint8_t func_id, uint8_t ff_idx);
|
||||
uint16_t tud_audio_n_write_support_ff (uint8_t func_id, uint8_t ff_idx, const void * data, uint16_t len);
|
||||
tu_fifo_t* tud_audio_n_get_tx_support_ff (uint8_t func_id, uint8_t ff_idx);
|
||||
#endif
|
||||
|
||||
#if CFG_TUD_AUDIO_ENABLE_INTERRUPT_EP
|
||||
bool tud_audio_int_n_write (uint8_t func_id, const audio_interrupt_data_t * data);
|
||||
#endif
|
||||
|
||||
|
||||
//--------------------------------------------------------------------+
|
||||
// Application API (Interface0)
|
||||
//--------------------------------------------------------------------+
|
||||
@@ -408,35 +246,21 @@ static inline bool tud_audio_mounted (void);
|
||||
|
||||
// RX API
|
||||
|
||||
#if CFG_TUD_AUDIO_ENABLE_EP_OUT && !CFG_TUD_AUDIO_ENABLE_DECODING
|
||||
#if CFG_TUD_AUDIO_ENABLE_EP_OUT
|
||||
static inline uint16_t tud_audio_available (void);
|
||||
static inline bool tud_audio_clear_ep_out_ff (void); // Delete all content in the EP OUT FIFO
|
||||
static inline uint16_t tud_audio_read (void* buffer, uint16_t bufsize);
|
||||
static inline tu_fifo_t* tud_audio_get_ep_out_ff (void);
|
||||
#endif
|
||||
|
||||
#if CFG_TUD_AUDIO_ENABLE_EP_OUT && CFG_TUD_AUDIO_ENABLE_DECODING
|
||||
static inline bool tud_audio_clear_rx_support_ff (uint8_t ff_idx);
|
||||
static inline uint16_t tud_audio_available_support_ff (uint8_t ff_idx);
|
||||
static inline uint16_t tud_audio_read_support_ff (uint8_t ff_idx, void* buffer, uint16_t bufsize);
|
||||
static inline tu_fifo_t* tud_audio_get_rx_support_ff (uint8_t ff_idx);
|
||||
#endif
|
||||
|
||||
// TX API
|
||||
|
||||
#if CFG_TUD_AUDIO_ENABLE_EP_IN && !CFG_TUD_AUDIO_ENABLE_ENCODING
|
||||
#if CFG_TUD_AUDIO_ENABLE_EP_IN
|
||||
static inline uint16_t tud_audio_write (const void * data, uint16_t len);
|
||||
static inline bool tud_audio_clear_ep_in_ff (void);
|
||||
static inline tu_fifo_t* tud_audio_get_ep_in_ff (void);
|
||||
#endif
|
||||
|
||||
#if CFG_TUD_AUDIO_ENABLE_EP_IN && CFG_TUD_AUDIO_ENABLE_ENCODING
|
||||
static inline uint16_t tud_audio_flush_tx_support_ff (void);
|
||||
static inline uint16_t tud_audio_clear_tx_support_ff (uint8_t ff_idx);
|
||||
static inline uint16_t tud_audio_write_support_ff (uint8_t ff_idx, const void * data, uint16_t len);
|
||||
static inline tu_fifo_t* tud_audio_get_tx_support_ff (uint8_t ff_idx);
|
||||
#endif
|
||||
|
||||
// INT CTR API
|
||||
|
||||
#if CFG_TUD_AUDIO_ENABLE_INTERRUPT_EP
|
||||
@@ -593,7 +417,7 @@ static inline bool tud_audio_mounted(void)
|
||||
|
||||
// RX API
|
||||
|
||||
#if CFG_TUD_AUDIO_ENABLE_EP_OUT && !CFG_TUD_AUDIO_ENABLE_DECODING
|
||||
#if CFG_TUD_AUDIO_ENABLE_EP_OUT
|
||||
|
||||
static inline uint16_t tud_audio_available(void)
|
||||
{
|
||||
@@ -617,33 +441,9 @@ static inline tu_fifo_t* tud_audio_get_ep_out_ff(void)
|
||||
|
||||
#endif
|
||||
|
||||
#if CFG_TUD_AUDIO_ENABLE_EP_OUT && CFG_TUD_AUDIO_ENABLE_DECODING
|
||||
|
||||
static inline bool tud_audio_clear_rx_support_ff(uint8_t ff_idx)
|
||||
{
|
||||
return tud_audio_n_clear_rx_support_ff(0, ff_idx);
|
||||
}
|
||||
|
||||
static inline uint16_t tud_audio_available_support_ff(uint8_t ff_idx)
|
||||
{
|
||||
return tud_audio_n_available_support_ff(0, ff_idx);
|
||||
}
|
||||
|
||||
static inline uint16_t tud_audio_read_support_ff(uint8_t ff_idx, void* buffer, uint16_t bufsize)
|
||||
{
|
||||
return tud_audio_n_read_support_ff(0, ff_idx, buffer, bufsize);
|
||||
}
|
||||
|
||||
static inline tu_fifo_t* tud_audio_get_rx_support_ff(uint8_t ff_idx)
|
||||
{
|
||||
return tud_audio_n_get_rx_support_ff(0, ff_idx);
|
||||
}
|
||||
|
||||
#endif
|
||||
|
||||
// TX API
|
||||
|
||||
#if CFG_TUD_AUDIO_ENABLE_EP_IN && !CFG_TUD_AUDIO_ENABLE_ENCODING
|
||||
#if CFG_TUD_AUDIO_ENABLE_EP_IN
|
||||
|
||||
static inline uint16_t tud_audio_write(const void * data, uint16_t len)
|
||||
{
|
||||
@@ -662,30 +462,6 @@ static inline tu_fifo_t* tud_audio_get_ep_in_ff(void)
|
||||
|
||||
#endif
|
||||
|
||||
#if CFG_TUD_AUDIO_ENABLE_EP_IN && CFG_TUD_AUDIO_ENABLE_ENCODING
|
||||
|
||||
static inline uint16_t tud_audio_flush_tx_support_ff(void)
|
||||
{
|
||||
return tud_audio_n_flush_tx_support_ff(0);
|
||||
}
|
||||
|
||||
static inline uint16_t tud_audio_clear_tx_support_ff(uint8_t ff_idx)
|
||||
{
|
||||
return tud_audio_n_clear_tx_support_ff(0, ff_idx);
|
||||
}
|
||||
|
||||
static inline uint16_t tud_audio_write_support_ff(uint8_t ff_idx, const void * data, uint16_t len)
|
||||
{
|
||||
return tud_audio_n_write_support_ff(0, ff_idx, data, len);
|
||||
}
|
||||
|
||||
static inline tu_fifo_t* tud_audio_get_tx_support_ff(uint8_t ff_idx)
|
||||
{
|
||||
return tud_audio_n_get_tx_support_ff(0, ff_idx);
|
||||
}
|
||||
|
||||
#endif
|
||||
|
||||
#if CFG_TUD_AUDIO_ENABLE_INTERRUPT_EP
|
||||
static inline bool tud_audio_int_write(const audio_interrupt_data_t * data)
|
||||
{
|
||||
|
Reference in New Issue
Block a user