fix cmake build

hw/bsp/stm32n6/boards/stm32n657nucleo/board.cmake

@@ -1,17 +1,11 @@
 set(MCU_VARIANT stm32n657xx)
 set(JLINK_DEVICE stm32n6xx)
 
-set(LD_FILE_GNU ${CMAKE_CURRENT_LIST_DIR}/STM32N657XX_LRUN.ld)
+set(LD_FILE_GNU ${CMAKE_CURRENT_LIST_DIR}/STM32N657XX_AXISRAM2_fsbl.ld)
-set(LD_FILE_Clang ${LD_FILE_GNU})
-
-set(STARTUP_FILE_GNU ${ST_CMSIS}/Source/Templates/gcc/startup_${MCU_VARIANT}.s)
 
 function(update_board TARGET)
-
   target_compile_definitions(${TARGET} PUBLIC
-    STM32N6xx
+    STM32N657xx
-    SEGGER_RTT_SECTION="noncacheable_buffer"
-    BUFFER_SIZE_UP=0x3000
     )
 
   target_sources(${TARGET} PUBLIC

hw/bsp/stm32n6/boards/stm32n657nucleo/board.mk

@@ -1,23 +1,17 @@
-MCU_VARIANT = stm32n6xx
+MCU_VARIANT = stm32n657xx
-CFLAGS += -DSTM32N6xx
+CFLAGS += -DSTM32N657xx
-
-# For flash-jlink target
 JLINK_DEVICE = stm32n6xx
 
+LD_FILE_GCC = $(BOARD_PATH)/STM32N657XX_AXISRAM2_fsbl.ld
+
 # flash target using on-board stlink
 flash: flash-stlink
 
 PORT = 1
 
-
 SRC_C += \
 	$(BOARD_PATH)/tcpp0203/tcpp0203.c \
 	$(BOARD_PATH)/tcpp0203/tcpp0203_reg.c \
 
 INC += \
 	$(TOP)/$(BOARD_PATH)/tcpp0203 \
-
-CFLAGS += \
-	-DSEGGER_RTT_SECTION=\"noncacheable_buffer\" \
-	-DSTM32N657xx
-	-DBUFFER_SIZE_UP=0x3000 \

hw/bsp/stm32n6/family.cmake

@@ -26,14 +26,12 @@ if (NOT DEFINED RHPORT_HOST)
   set(RHPORT_HOST 1)
 endif ()
 
-if (NOT DEFINED RHPORT_SPEED)
+# N6 are all high speed
-  set(RHPORT_SPEED OPT_MODE_FULL_SPEED OPT_MODE_HIGH_SPEED)
-endif ()
 if (NOT DEFINED RHPORT_DEVICE_SPEED)
-  list(GET RHPORT_SPEED ${RHPORT_DEVICE} RHPORT_DEVICE_SPEED)
+  set(RHPORT_DEVICE_SPEED OPT_MODE_HIGH_SPEED)
 endif ()
 if (NOT DEFINED RHPORT_HOST_SPEED)
-  list(GET RHPORT_SPEED ${RHPORT_HOST} RHPORT_HOST_SPEED)
+  set(RHPORT_HOST_SPEED OPT_MODE_HIGH_SPEED)
 endif ()
 
 cmake_print_variables(RHPORT_DEVICE RHPORT_DEVICE_SPEED RHPORT_HOST RHPORT_HOST_SPEED)
@@ -61,7 +59,7 @@ function(add_board_target BOARD_TARGET)
   endif()
 
   add_library(${BOARD_TARGET} STATIC
-    ${ST_CMSIS}/Source/Templates/system_${ST_PREFIX}_ns.c
+    ${ST_CMSIS}/Source/Templates/system_${ST_PREFIX}_fsbl.c
     ${ST_HAL_DRIVER}/Src/${ST_PREFIX}_hal.c
     ${ST_HAL_DRIVER}/Src/${ST_PREFIX}_hal_cortex.c
     ${ST_HAL_DRIVER}/Src/${ST_PREFIX}_hal_dma.c
@@ -86,6 +84,8 @@ function(add_board_target BOARD_TARGET)
     BOARD_TUD_MAX_SPEED=${RHPORT_DEVICE_SPEED}
     BOARD_TUH_RHPORT=${RHPORT_HOST}
     BOARD_TUH_MAX_SPEED=${RHPORT_HOST_SPEED}
+    SEGGER_RTT_SECTION="noncacheable_buffer"
+    BUFFER_SIZE_UP=0x3000
     )
 
   update_board(${BOARD_TARGET})

hw/bsp/stm32n6/family.mk

@@ -1,6 +1,5 @@
 ST_FAMILY = n6
 ST_PREFIX = stm32${ST_FAMILY}xx
-ST_PREFIX_LONG = stm32${ST_FAMILY}57xx
 ST_CMSIS = hw/mcu/st/cmsis_device_$(ST_FAMILY)
 ST_HAL_DRIVER = hw/mcu/st/${ST_PREFIX}_hal_driver
 
@@ -12,26 +11,15 @@ CPU_CORE ?= cortex-m55
 # ----------------------
 # Port & Speed Selection
 # ----------------------
-RHPORT_SPEED ?= OPT_MODE_FULL_SPEED OPT_MODE_HIGH_SPEED
 RHPORT_DEVICE ?= 1
 RHPORT_HOST ?= 1
 
-# Determine RHPORT_DEVICE_SPEED if not defined
 ifndef RHPORT_DEVICE_SPEED
-ifeq ($(RHPORT_DEVICE), 0)
+  RHPORT_DEVICE_SPEED = OPT_MODE_HIGH_SPEED
-  RHPORT_DEVICE_SPEED = $(firstword $(RHPORT_SPEED))
-else
-  RHPORT_DEVICE_SPEED = $(lastword $(RHPORT_SPEED))
-endif
 endif
 
-# Determine RHPORT_HOST_SPEED if not defined
 ifndef RHPORT_HOST_SPEED
-ifeq ($(RHPORT_HOST), 0)
+  RHPORT_HOST_SPEED = OPT_MODE_HIGH_SPEED
-  RHPORT_HOST_SPEED = $(firstword $(RHPORT_SPEED))
-else
-  RHPORT_HOST_SPEED = $(lastword $(RHPORT_SPEED))
-endif
 endif
 
 # --------------
@@ -42,7 +30,9 @@ CFLAGS += \
 	-DBOARD_TUD_RHPORT=${RHPORT_DEVICE} \
 	-DBOARD_TUD_MAX_SPEED=${RHPORT_DEVICE_SPEED} \
 	-DBOARD_TUH_RHPORT=${RHPORT_HOST} \
-	-DBOARD_TUH_MAX_SPEED=${RHPORT_HOST_SPEED}
+	-DBOARD_TUH_MAX_SPEED=${RHPORT_HOST_SPEED} \
+	-DSEGGER_RTT_SECTION=\"noncacheable_buffer\" \
+	-DBUFFER_SIZE_UP=0x3000 \
 
 # GCC Flags
 CFLAGS_GCC += \
@@ -71,10 +61,10 @@ SRC_C += \
 	$(ST_HAL_DRIVER)/Src/${ST_PREFIX}_hal_dma.c \
 	$(ST_HAL_DRIVER)/Src/${ST_PREFIX}_hal_gpio.c \
 	$(ST_HAL_DRIVER)/Src/${ST_PREFIX}_hal_hcd.c \
-    $(ST_HAL_DRIVER)/Src/${ST_PREFIX}_hal_i2c.c \
+	$(ST_HAL_DRIVER)/Src/${ST_PREFIX}_hal_i2c.c \
 	$(ST_HAL_DRIVER)/Src/${ST_PREFIX}_hal_pcd.c \
 	$(ST_HAL_DRIVER)/Src/${ST_PREFIX}_hal_pcd_ex.c \
-    $(ST_HAL_DRIVER)/Src/${ST_PREFIX}_hal_pwr.c \
+	$(ST_HAL_DRIVER)/Src/${ST_PREFIX}_hal_pwr.c \
 	$(ST_HAL_DRIVER)/Src/${ST_PREFIX}_hal_pwr_ex.c \
 	$(ST_HAL_DRIVER)/Src/${ST_PREFIX}_hal_rcc.c \
 	$(ST_HAL_DRIVER)/Src/${ST_PREFIX}_hal_rcc_ex.c \
@@ -89,13 +79,10 @@ INC += \
 	$(TOP)/$(ST_CMSIS)/Include \
 	$(TOP)/$(ST_HAL_DRIVER)/Inc
 
-# Linker
-LD_FILE_GCC = $(BOARD_PATH)/STM32N657XX_AXISRAM2_fsbl.ld
-
 # Startup
-SRC_S_GCC += $(ST_CMSIS)/Source/Templates/gcc/startup_$(ST_PREFIX_LONG)_fsbl.s
+SRC_S_GCC += $(ST_CMSIS)/Source/Templates/gcc/startup_$(MCU_VARIANT)_fsbl.s
 SRC_S_IAR += $(ST_CMSIS)/Source/Templates/iar/startup_$(MCU_VARIANT).s
 
 # Linker
-LD_FILE_GCC ?= $(ST_CMSIS)/Source/Templates/gcc/linker/$(ST_PREFIX_LONG)_flash.ld
+LD_FILE_GCC ?= $(ST_CMSIS)/Source/Templates/gcc/linker/$(MCU_VARIANT)_flash.ld
 LD_FILE_IAR ?= $(ST_CMSIS)/Source/Templates/iar/linker/$(MCU_VARIANT)_flash.icf