fix fuzzing build
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		| @@ -194,38 +194,45 @@ extern void dcd_event_handler(dcd_event_t const * event, bool in_isr); | ||||
|  | ||||
| // helper to send bus signal event | ||||
| TU_ATTR_ALWAYS_INLINE static inline void dcd_event_bus_signal (uint8_t rhport, dcd_eventid_t eid, bool in_isr) { | ||||
|   dcd_event_t event = { .rhport = rhport, .event_id = eid }; | ||||
|   dcd_event_t event; | ||||
|   event.rhport = rhport; | ||||
|   event.event_id = eid; | ||||
|   dcd_event_handler(&event, in_isr); | ||||
| } | ||||
|  | ||||
| // helper to send bus reset event | ||||
| TU_ATTR_ALWAYS_INLINE static inline  void dcd_event_bus_reset (uint8_t rhport, tusb_speed_t speed, bool in_isr) { | ||||
|   dcd_event_t event = { .rhport = rhport, .event_id = DCD_EVENT_BUS_RESET }; | ||||
|   dcd_event_t event; | ||||
|   event.rhport = rhport; | ||||
|   event.event_id = DCD_EVENT_BUS_RESET; | ||||
|   event.bus_reset.speed = speed; | ||||
|   dcd_event_handler(&event, in_isr); | ||||
| } | ||||
|  | ||||
| // helper to send setup received | ||||
| TU_ATTR_ALWAYS_INLINE static inline void dcd_event_setup_received(uint8_t rhport, uint8_t const * setup, bool in_isr) { | ||||
|   dcd_event_t event = { .rhport = rhport, .event_id = DCD_EVENT_SETUP_RECEIVED }; | ||||
|   dcd_event_t event; | ||||
|   event.rhport = rhport; | ||||
|   event.event_id = DCD_EVENT_SETUP_RECEIVED; | ||||
|   memcpy(&event.setup_received, setup, sizeof(tusb_control_request_t)); | ||||
|  | ||||
|   dcd_event_handler(&event, in_isr); | ||||
| } | ||||
|  | ||||
| // helper to send transfer complete event | ||||
| TU_ATTR_ALWAYS_INLINE static inline void dcd_event_xfer_complete (uint8_t rhport, uint8_t ep_addr, uint32_t xferred_bytes, uint8_t result, bool in_isr) { | ||||
|   dcd_event_t event = { .rhport = rhport, .event_id = DCD_EVENT_XFER_COMPLETE }; | ||||
|  | ||||
|   dcd_event_t event; | ||||
|   event.rhport = rhport; | ||||
|   event.event_id = DCD_EVENT_XFER_COMPLETE; | ||||
|   event.xfer_complete.ep_addr = ep_addr; | ||||
|   event.xfer_complete.len     = xferred_bytes; | ||||
|   event.xfer_complete.result  = result; | ||||
|  | ||||
|   dcd_event_handler(&event, in_isr); | ||||
| } | ||||
|  | ||||
| TU_ATTR_ALWAYS_INLINE static inline void dcd_event_sof(uint8_t rhport, uint32_t frame_count, bool in_isr) { | ||||
|   dcd_event_t event = { .rhport = rhport, .event_id = DCD_EVENT_SOF }; | ||||
|   dcd_event_t event; | ||||
|   event.rhport = rhport; | ||||
|   event.event_id = DCD_EVENT_SOF; | ||||
|   event.sof.frame_count = frame_count; | ||||
|   dcd_event_handler(&event, in_isr); | ||||
| } | ||||
|   | ||||
| @@ -78,9 +78,8 @@ static void bus_reset(void) | ||||
| /*------------------------------------------------------------------*/ | ||||
| /* Controller API | ||||
|  *------------------------------------------------------------------*/ | ||||
| void dcd_init (uint8_t rhport) | ||||
| { | ||||
|   (void) rhport; | ||||
| void dcd_init(const tusb_rhport_init_t* rh_init) { | ||||
|   (void) rh_init; | ||||
|  | ||||
|   // Reset to get in a clean state. | ||||
|   USB->DEVICE.CTRLA.bit.SWRST = true; | ||||
|   | ||||
| @@ -155,8 +155,8 @@ static void bus_reset(void) | ||||
| } | ||||
|  | ||||
| // Initialize controller to device mode | ||||
| void dcd_init (uint8_t rhport) | ||||
| { | ||||
| void dcd_init(const tusb_rhport_init_t* rh_init) { | ||||
|   const uint8_t rhport = rh_init->rhport; | ||||
|   tu_memclr(_dcd_xfer, sizeof(_dcd_xfer)); | ||||
|   dcd_connect(rhport); | ||||
| } | ||||
|   | ||||
| @@ -104,8 +104,8 @@ TU_ATTR_ALWAYS_INLINE static inline void CleanInValidateCache(uint32_t *addr, in | ||||
| //------------------------------------------------------------------ | ||||
|  | ||||
| // Initialize controller to device mode | ||||
| void dcd_init (uint8_t rhport) | ||||
| { | ||||
| void dcd_init(const tusb_rhport_init_t* rh_init) { | ||||
|   const uint8_t rhport = rh_init->rhport; | ||||
|   dcd_connect(rhport); | ||||
| } | ||||
|  | ||||
|   | ||||
| @@ -50,10 +50,8 @@ static usb_descriptor_buffers_t desc; | ||||
|  *------------------------------------------------------------------*/ | ||||
|  | ||||
| // Initialize controller to device mode | ||||
| void dcd_init (uint8_t rhport) | ||||
| { | ||||
|   (void) rhport; | ||||
|  | ||||
| void dcd_init(const tusb_rhport_init_t* rh_init) { | ||||
|   (void) rh_init; | ||||
|   static pio_usb_configuration_t config = PIO_USB_DEFAULT_CONFIG; | ||||
|   usb_device = pio_usb_device_init(&config, &desc); | ||||
| } | ||||
|   | ||||
| @@ -40,54 +40,44 @@ | ||||
|  *------------------------------------------------------------------*/ | ||||
|  | ||||
| // Initialize controller to device mode | ||||
| void dcd_init (uint8_t rhport) | ||||
| { | ||||
|   (void) rhport; | ||||
| void dcd_init(const tusb_rhport_init_t* rh_init) { | ||||
|   (void) rh_init; | ||||
| } | ||||
|  | ||||
| // Enable device interrupt | ||||
| void dcd_int_enable (uint8_t rhport) | ||||
| { | ||||
| void dcd_int_enable (uint8_t rhport) { | ||||
|   (void) rhport; | ||||
| } | ||||
|  | ||||
| // Disable device interrupt | ||||
| void dcd_int_disable (uint8_t rhport) | ||||
| { | ||||
| void dcd_int_disable (uint8_t rhport) { | ||||
|   (void) rhport; | ||||
| } | ||||
|  | ||||
| // Receive Set Address request, mcu port must also include status IN response | ||||
| void dcd_set_address (uint8_t rhport, uint8_t dev_addr) | ||||
| { | ||||
| void dcd_set_address (uint8_t rhport, uint8_t dev_addr) { | ||||
|   (void) rhport; | ||||
|   (void) dev_addr; | ||||
| } | ||||
|  | ||||
| // Wake up host | ||||
| void dcd_remote_wakeup (uint8_t rhport) | ||||
| { | ||||
| void dcd_remote_wakeup (uint8_t rhport) { | ||||
|   (void) rhport; | ||||
| } | ||||
|  | ||||
| // Connect by enabling internal pull-up resistor on D+/D- | ||||
| void dcd_connect(uint8_t rhport) | ||||
| { | ||||
| void dcd_connect(uint8_t rhport) { | ||||
|   (void) rhport; | ||||
| } | ||||
|  | ||||
| // Disconnect by disabling internal pull-up resistor on D+/D- | ||||
| void dcd_disconnect(uint8_t rhport) | ||||
| { | ||||
| void dcd_disconnect(uint8_t rhport) { | ||||
|   (void) rhport; | ||||
| } | ||||
|  | ||||
| void dcd_sof_enable(uint8_t rhport, bool en) | ||||
| { | ||||
| void dcd_sof_enable(uint8_t rhport, bool en) { | ||||
|   (void) rhport; | ||||
|   (void) en; | ||||
|  | ||||
|   // TODO implement later | ||||
| } | ||||
|  | ||||
| //--------------------------------------------------------------------+ | ||||
| @@ -95,8 +85,7 @@ void dcd_sof_enable(uint8_t rhport, bool en) | ||||
| //--------------------------------------------------------------------+ | ||||
|  | ||||
| // Configure endpoint's registers according to descriptor | ||||
| bool dcd_edpt_open (uint8_t rhport, tusb_desc_endpoint_t const * ep_desc) | ||||
| { | ||||
| bool dcd_edpt_open (uint8_t rhport, tusb_desc_endpoint_t const * ep_desc) { | ||||
|   (void) rhport; | ||||
|   (void) ep_desc; | ||||
|   return false; | ||||
| @@ -118,14 +107,12 @@ bool dcd_edpt_iso_activate(uint8_t rhport, tusb_desc_endpoint_t const * desc_ep) | ||||
|   return false; | ||||
| } | ||||
|  | ||||
| void dcd_edpt_close_all (uint8_t rhport) | ||||
| { | ||||
| void dcd_edpt_close_all (uint8_t rhport) { | ||||
|   (void) rhport; | ||||
| } | ||||
|  | ||||
| // Submit a transfer, When complete dcd_event_xfer_complete() is invoked to notify the stack | ||||
| bool dcd_edpt_xfer (uint8_t rhport, uint8_t ep_addr, uint8_t * buffer, uint16_t total_bytes) | ||||
| { | ||||
| bool dcd_edpt_xfer (uint8_t rhport, uint8_t ep_addr, uint8_t * buffer, uint16_t total_bytes) { | ||||
|   (void) rhport; | ||||
|   (void) ep_addr; | ||||
|   (void) buffer; | ||||
| @@ -134,8 +121,7 @@ bool dcd_edpt_xfer (uint8_t rhport, uint8_t ep_addr, uint8_t * buffer, uint16_t | ||||
| } | ||||
|  | ||||
| // Submit a transfer where is managed by FIFO, When complete dcd_event_xfer_complete() is invoked to notify the stack - optional, however, must be listed in usbd.c | ||||
| bool dcd_edpt_xfer_fifo (uint8_t rhport, uint8_t ep_addr, tu_fifo_t * ff, uint16_t total_bytes) | ||||
| { | ||||
| bool dcd_edpt_xfer_fifo (uint8_t rhport, uint8_t ep_addr, tu_fifo_t * ff, uint16_t total_bytes) { | ||||
|   (void) rhport; | ||||
|   (void) ep_addr; | ||||
|   (void) ff; | ||||
| @@ -144,19 +130,15 @@ bool dcd_edpt_xfer_fifo (uint8_t rhport, uint8_t ep_addr, tu_fifo_t * ff, uint16 | ||||
| } | ||||
|  | ||||
| // Stall endpoint | ||||
| void dcd_edpt_stall (uint8_t rhport, uint8_t ep_addr) | ||||
| { | ||||
| void dcd_edpt_stall (uint8_t rhport, uint8_t ep_addr) { | ||||
|   (void) rhport; | ||||
|   (void) ep_addr; | ||||
| } | ||||
|  | ||||
| // clear stall, data toggle is also reset to DATA0 | ||||
| void dcd_edpt_clear_stall (uint8_t rhport, uint8_t ep_addr) | ||||
| { | ||||
| void dcd_edpt_clear_stall (uint8_t rhport, uint8_t ep_addr) { | ||||
|   (void) rhport; | ||||
|   (void) ep_addr; | ||||
| } | ||||
|  | ||||
|  | ||||
|  | ||||
| #endif | ||||
|   | ||||
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