added dcd_dma_descriptor_t typdef
reorganize test project, multiple test projects each is specifically for an MCU
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@@ -51,6 +51,7 @@
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//--------------------------------------------------------------------+
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// MACRO CONSTANT TYPEDEF
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//--------------------------------------------------------------------+
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STATIC_ dcd_dma_descriptor_t* dcd_udca[32] ATTR_ALIGNED(128) TUSB_CFG_ATTR_USBRAM;
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//--------------------------------------------------------------------+
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// INTERNAL OBJECT & FUNCTION DECLARATION
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@@ -46,11 +46,49 @@
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#ifndef _TUSB_DCD_LPC175X_6X_H_
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#define _TUSB_DCD_LPC175X_6X_H_
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#include "common/common.h"
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#ifdef __cplusplus
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extern "C" {
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#endif
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typedef struct
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{
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//------------- Word 0 -------------//
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uint32_t next;
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//------------- Word 1 -------------//
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uint16_t mode : 2; // either normal or ATLE(auto length extraction)
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uint16_t is_next_valid : 1;
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uint16_t : 1;
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uint16_t is_isochronous : 1; // is an iso endpoint
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uint16_t max_packet_size : 11;
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volatile uint16_t buffer_length;
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//------------- Word 2 -------------//
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volatile uint8_t* buffer_start_addr;
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//------------- Word 3 -------------//
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volatile uint16_t is_retired : 1; // initialized to zero
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volatile uint16_t status : 4;
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volatile uint16_t iso_last_packet_valid : 1;
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volatile uint16_t atle_is_lsb_extracted : 1; // used in ATLE mode
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volatile uint16_t atle_is_msb_extracted : 1; // used in ATLE mode
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volatile uint16_t atle_message_length_position : 6; // used in ATLE mode
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uint16_t : 2;
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volatile uint16_t present_count; // The number of bytes transferred by the DMA engine. The DMA engine updates this field after completing each packet transfer.
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//------------- Word 4 -------------//
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// uint32_t iso_packet_size_addr; // iso only, can be omitted for non-iso
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} ATTR_ALIGNED(4) dcd_dma_descriptor_t;
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#define DCD_DD_NUM 10 // TODO scale with configure
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typedef struct {
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dcd_dma_descriptor_t dd[DCD_DD_NUM];
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}dcd_data_t;
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#ifdef __cplusplus
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}
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#endif
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