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fix warning with lpcopen

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This commit is contained in:
hathach
2018-12-07 13:22:12 +07:00
parent 89820a36a1
commit f769ecddaf
35 changed files with 58 additions and 28 deletions
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1
hw/mcu/nxp/lpc_chip_43xx/src/clock_18xx_43xx.c
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@@ -194,6 +194,7 @@ static uint32_t Chip_Clock_TestMainPLLMultiplier(uint32_t InputHz, uint32_t Test
/* Returns clock rate out of a divider */
static uint32_t Chip_Clock_GetDivRate(CHIP_CGU_CLKIN_T clock, CHIP_CGU_IDIV_T divider)
{
(void) clock;
CHIP_CGU_CLKIN_T input;
uint32_t div;

2
hw/mcu/nxp/lpc_chip_43xx/src/gpio_18xx_43xx.c
View File

@@ -50,11 +50,13 @@
/* Initialize GPIO block */
void Chip_GPIO_Init(LPC_GPIO_T *pGPIO)
{
(void) pGPIO;
}
/* De-Initialize GPIO block */
void Chip_GPIO_DeInit(LPC_GPIO_T *pGPIO)
{
(void) pGPIO;
}

6
hw/mcu/nxp/lpc_chip_43xx/src/i2c_18xx_43xx.c
View File

@@ -197,11 +197,11 @@ int handleMasterXferState(LPC_I2C_T *pI2C, I2C_XFER_T *xfer)
/* Rx handling */
case 0x58: /* Data Received and NACK sent */
cclr &= ~I2C_CON_STO;
/* FALLTHRU */
case 0x50: /* Data Received and ACK sent */
*xfer->rxBuff++ = pI2C->DAT;
xfer->rxSz--;
/* FALLTHRU */
case 0x40: /* SLA+R sent and ACK received */
if (xfer->rxSz > 1) {
cclr &= ~I2C_CON_AA;
@@ -292,7 +292,7 @@ int handleSlaveXferState(LPC_I2C_T *pI2C, I2C_XFER_T *xfer)
case 0xA8: /* SLA+R received */
case 0xB0: /* SLA+R received after losing arbitration */
xfer->slaveAddr = pI2C->DAT & ~1;
/* FALLTHRU */
case 0xB8: /* DATA sent and ACK received */
pI2C->DAT = *xfer->txBuff++;
xfer->txSz--;

4
hw/mcu/nxp/lpc_chip_43xx/src/i2cm_18xx_43xx.c
View File

@@ -100,7 +100,7 @@ uint32_t Chip_I2CM_XferHandler(LPC_I2C_T *pI2C, I2CM_XFER_T *xfer)
cclr &= ~I2C_CON_STO;
break;
}
/* FALLTHRU */
case 0x18: /* SLA+W sent and ACK received */
case 0x28: /* DATA sent and ACK received */
if (!xfer->txSz) {
@@ -124,7 +124,7 @@ uint32_t Chip_I2CM_XferHandler(LPC_I2C_T *pI2C, I2CM_XFER_T *xfer)
case 0x50: /* Data Received and ACK sent */
*xfer->rxBuff++ = pI2C->DAT;
xfer->rxSz--;
/* FALLTHRU */
case 0x40: /* SLA+R sent and ACK received */
if ((xfer->rxSz > 1) || (xfer->options & I2CM_XFER_OPTION_LAST_RX_ACK)) {
cclr &= ~I2C_CON_AA;

2
hw/mcu/nxp/lpc_chip_43xx/src/sysinit_18xx_43xx.c
View File

@@ -133,7 +133,7 @@ void Chip_SetupCoreClock(CHIP_CGU_CLKIN_T clkin, uint32_t core_freq, bool setbas
/* Setup system base clocks and initial states. This won't enable and
disable individual clocks, but sets up the base clock sources for
each individual peripheral clock. */
for (i = 0; i < (sizeof(InitClkStates) / sizeof(InitClkStates[0])); i++) {
for (i = 0; i < (int) (sizeof(InitClkStates) / sizeof(InitClkStates[0])); i++) {
Chip_Clock_SetBaseClock(InitClkStates[i].clk, InitClkStates[i].clkin,
InitClkStates[i].autoblock_enab, InitClkStates[i].powerdn);
}

2
hw/mcu/nxp/lpc_chip_43xx/src/uart_18xx_43xx.c
View File

@@ -132,6 +132,8 @@ void Chip_UART_Init(LPC_USART_T *pUART)
/* Disable fractional divider */
pUART->FDR = 0x10;
(void) tmp;
}
/* De-initializes the pUART peripheral */