make sure usb buffer occupies whole cache line when DCACHE is enabled for msc,cdc,hid
HIL enable device DMA for p4
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@@ -69,8 +69,14 @@ typedef struct {
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OSAL_MUTEX_DEF(tx_ff_mutex);
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// Endpoint Transfer buffer
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CFG_TUSB_MEM_ALIGN uint8_t epout_buf[CFG_TUD_CDC_EP_BUFSIZE];
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CFG_TUSB_MEM_ALIGN uint8_t epin_buf[CFG_TUD_CDC_EP_BUFSIZE];
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union {
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CFG_TUD_MEM_ALIGN uint8_t epout_buf[CFG_TUD_CDC_EP_BUFSIZE];
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TUD_DCACHE_PADDING;
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};
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union {
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CFG_TUD_MEM_ALIGN uint8_t epin_buf[CFG_TUD_CDC_EP_BUFSIZE];
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TUD_DCACHE_PADDING;
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};
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} cdcd_interface_t;
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#define ITF_MEM_RESET_SIZE offsetof(cdcd_interface_t, wanted_char)
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