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clang compile with lpc40

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This commit is contained in:
hathach
2024-04-22 20:09:54 +07:00
parent 06c81d8bee
commit fd059ee24d
4 changed files with 45 additions and 27 deletions
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18
hw/bsp/lpc17/boards/lpcxpresso1769/lpc1769.ld
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@@ -181,15 +181,15 @@ SECTIONS
/* ## Create checksum value (used in startup) ## */ /* ## Create checksum value (used in startup) ## */
/* This cause issue with clang linker, so it is disabled */ /* This cause issue with clang linker, so it is disabled */
/* MemManage_Handler, BusFault_Handler, UsageFault_Handler may not be defined */ /* MemManage_Handler, BusFault_Handler, UsageFault_Handler may not be defined */
/* PROVIDE(__valid_user_code_checksum = 0 -*/ PROVIDE(__valid_user_code_checksum = 0 -
/* (_vStackTop*/ (_vStackTop
/* + (ResetISR + 1)*/ + (ResetISR + 1)
/* + (NMI_Handler + 1)*/ + (NMI_Handler + 1)
/* + (HardFault_Handler + 1)*/ + (HardFault_Handler + 1)
/* + (( DEFINED(MemManage_Handler) ? MemManage_Handler : 0 ) + 1)*/ + (( DEFINED(MemManage_Handler) ? MemManage_Handler : 0 ) + 1)
/* + (( DEFINED(BusFault_Handler) ? BusFault_Handler : 0 ) + 1)*/ + (( DEFINED(BusFault_Handler) ? BusFault_Handler : 0 ) + 1)
/* + (( DEFINED(UsageFault_Handler) ? UsageFault_Handler : 0 ) + 1)*/ + (( DEFINED(UsageFault_Handler) ? UsageFault_Handler : 0 ) + 1)
/* ) );*/ ) );
/* Provide basic symbols giving location and size of main text /* Provide basic symbols giving location and size of main text
* block, including initial values of RW data sections. Note that * block, including initial values of RW data sections. Note that

18
hw/bsp/lpc17/boards/mbed1768/lpc1768.ld
View File

@@ -181,15 +181,15 @@ SECTIONS
/* ## Create checksum value (used in startup) ## */ /* ## Create checksum value (used in startup) ## */
/* This cause issue with clang linker, so it is disabled */ /* This cause issue with clang linker, so it is disabled */
/* MemManage_Handler, BusFault_Handler, UsageFault_Handler may not be defined */ /* MemManage_Handler, BusFault_Handler, UsageFault_Handler may not be defined */
/* PROVIDE(__valid_user_code_checksum = 0 -*/ PROVIDE(__valid_user_code_checksum = 0 -
/* (_vStackTop*/ (_vStackTop
/* + (ResetISR + 1)*/ + (ResetISR + 1)
/* + (NMI_Handler + 1)*/ + (NMI_Handler + 1)
/* + (HardFault_Handler + 1)*/ + (HardFault_Handler + 1)
/* + (( DEFINED(MemManage_Handler) ? MemManage_Handler : 0 ) + 1)*/ + (( DEFINED(MemManage_Handler) ? MemManage_Handler : 0 ) + 1)
/* + (( DEFINED(BusFault_Handler) ? BusFault_Handler : 0 ) + 1)*/ + (( DEFINED(BusFault_Handler) ? BusFault_Handler : 0 ) + 1)
/* + (( DEFINED(UsageFault_Handler) ? UsageFault_Handler : 0 ) + 1)*/ + (( DEFINED(UsageFault_Handler) ? UsageFault_Handler : 0 ) + 1)
/* ) );*/ ) );
/* Provide basic symbols giving location and size of main text /* Provide basic symbols giving location and size of main text
* block, including initial values of RW data sections. Note that * block, including initial values of RW data sections. Note that

20
hw/bsp/lpc40/boards/ea4088_quickstart/lpc4088.ld
View File

@@ -140,7 +140,7 @@ SECTIONS
*(COMMON) *(COMMON)
. = ALIGN(4) ; . = ALIGN(4) ;
_ebss = .; _ebss = .;
PROVIDE(end = .); /* PROVIDE(end = .);*/
} > RamLoc64 } > RamLoc64
/* NOINIT section for RamPeriph32 */ /* NOINIT section for RamPeriph32 */
@@ -159,7 +159,23 @@ SECTIONS
. = ALIGN(4) ; . = ALIGN(4) ;
_end_noinit = .; _end_noinit = .;
} > RamLoc64 } > RamLoc64
PROVIDE(_pvHeapStart = DEFINED(__user_heap_base) ? __user_heap_base : .);
/* hathach add heap section for clang */
.heap (NOLOAD): {
__heap_start = .;
__HeapBase = .;
__heap_base = .;
__end = .;
PROVIDE(end = .);
PROVIDE(_end = .);
PROVIDE(__end__ = .);
KEEP(*(.heap*))
__HeapLimit = .;
__heap_limit = .;
__heap_end = .;
} > RamLoc64
/* PROVIDE(_pvHeapStart = DEFINED(__user_heap_base) ? __user_heap_base : .);*/
PROVIDE(_vStackTop = DEFINED(__user_stack_top) ? __user_stack_top : __top_RamLoc64 - 0); PROVIDE(_vStackTop = DEFINED(__user_stack_top) ? __user_stack_top : __top_RamLoc64 - 0);
/* ## Create checksum value (used in startup) ## */ /* ## Create checksum value (used in startup) ## */

16
hw/bsp/lpc40/family.cmake
View File

@@ -1,6 +1,7 @@
include_guard() include_guard()
set(SDK_DIR ${TOP}/hw/mcu/nxp/lpcopen/lpc40xx/lpc_chip_40xx) set(SDK_DIR ${TOP}/hw/mcu/nxp/lpcopen/lpc40xx/lpc_chip_40xx)
set(CMSIS_DIR ${TOP}/lib/CMSIS_5)
# include board specific # include board specific
include(${CMAKE_CURRENT_LIST_DIR}/boards/${BOARD}/board.cmake) include(${CMAKE_CURRENT_LIST_DIR}/boards/${BOARD}/board.cmake)
@@ -9,7 +10,7 @@ include(${CMAKE_CURRENT_LIST_DIR}/boards/${BOARD}/board.cmake)
set(CMAKE_SYSTEM_PROCESSOR cortex-m4 CACHE INTERNAL "System Processor") set(CMAKE_SYSTEM_PROCESSOR cortex-m4 CACHE INTERNAL "System Processor")
set(CMAKE_TOOLCHAIN_FILE ${TOP}/examples/build_system/cmake/toolchain/arm_${TOOLCHAIN}.cmake) set(CMAKE_TOOLCHAIN_FILE ${TOP}/examples/build_system/cmake/toolchain/arm_${TOOLCHAIN}.cmake)
set(FAMILY_MCUS LPC18XX CACHE INTERNAL "") set(FAMILY_MCUS LPC40XX CACHE INTERNAL "")
#------------------------------------ #------------------------------------
@@ -32,9 +33,6 @@ function(add_board_target BOARD_TARGET)
${SDK_DIR}/src/sysinit_17xx_40xx.c ${SDK_DIR}/src/sysinit_17xx_40xx.c
${SDK_DIR}/src/uart_17xx_40xx.c ${SDK_DIR}/src/uart_17xx_40xx.c
) )
target_compile_options(${BOARD_TARGET} PUBLIC
-nostdlib
)
target_compile_definitions(${BOARD_TARGET} PUBLIC target_compile_definitions(${BOARD_TARGET} PUBLIC
__USE_LPCOPEN __USE_LPCOPEN
CORE_M4 CORE_M4
@@ -42,16 +40,20 @@ function(add_board_target BOARD_TARGET)
) )
target_include_directories(${BOARD_TARGET} PUBLIC target_include_directories(${BOARD_TARGET} PUBLIC
${SDK_DIR}/inc ${SDK_DIR}/inc
${CMSIS_DIR}/CMSIS/Core/Include
) )
update_board(${BOARD_TARGET}) update_board(${BOARD_TARGET})
if (CMAKE_C_COMPILER_ID STREQUAL "GNU") if (CMAKE_C_COMPILER_ID STREQUAL "GNU")
target_compile_options(${BOARD_TARGET} PUBLIC -nostdlib)
target_link_options(${BOARD_TARGET} PUBLIC
"LINKER:--script=${LD_FILE_GNU}"
--specs=nosys.specs --specs=nano.specs
)
elseif (CMAKE_C_COMPILER_ID STREQUAL "Clang")
target_link_options(${BOARD_TARGET} PUBLIC target_link_options(${BOARD_TARGET} PUBLIC
"LINKER:--script=${LD_FILE_GNU}" "LINKER:--script=${LD_FILE_GNU}"
# nanolib
--specs=nosys.specs
--specs=nano.specs
) )
elseif (CMAKE_C_COMPILER_ID STREQUAL "IAR") elseif (CMAKE_C_COMPILER_ID STREQUAL "IAR")
target_link_options(${BOARD_TARGET} PUBLIC target_link_options(${BOARD_TARGET} PUBLIC