fix lpc43xx isr issue, fix control status response for usbd
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		| @@ -242,33 +242,24 @@ bool tusb_dcd_control_xfer(uint8_t port, tusb_dir_t dir, uint8_t * p_buffer, uin | |||||||
|   LPC_USB0_Type* const lpc_usb = LPC_USB[port]; |   LPC_USB0_Type* const lpc_usb = LPC_USB[port]; | ||||||
|   dcd_data_t* const p_dcd      = dcd_data_ptr[port]; |   dcd_data_t* const p_dcd      = dcd_data_ptr[port]; | ||||||
|  |  | ||||||
|   // determine Endpoint where Data & Status phase occurred (IN or OUT) |   uint8_t const ep_phy = (dir == TUSB_DIR_IN) ? 1 : 0; | ||||||
|   uint8_t const ep_data   = (dir == TUSB_DIR_IN) ? 1 : 0; |  | ||||||
|   uint8_t const ep_status = 1 - ep_data; |  | ||||||
|  |  | ||||||
|   while(lpc_usb->ENDPTSETUPSTAT & BIT_(0)) {} // wait until ENDPTSETUPSTAT before priming data/status in response TODO add time out |   dcd_qhd_t* qhd = &p_dcd->qhd[ep_phy]; | ||||||
| //  while(p_dcd->qhd[0].qtd_overlay.active || p_dcd->qhd[1].qtd_overlay.active) {}; // wait until previous device request is completed TODO add timeout |  | ||||||
|  |  | ||||||
|   VERIFY( !(p_dcd->qhd[0].qtd_overlay.active || p_dcd->qhd[1].qtd_overlay.active) ); |   // wait until ENDPTSETUPSTAT before priming data/status in response TODO add time out | ||||||
|  |   while(lpc_usb->ENDPTSETUPSTAT & BIT_(0)) {} | ||||||
|  |  | ||||||
|   //------------- Data Phase -------------// |   VERIFY( !qhd->qtd_overlay.active ); | ||||||
|   if (length > 0) |  | ||||||
|   { |  | ||||||
|     dcd_qtd_t* p_qtd_data = &p_dcd->qtd[0]; |  | ||||||
|     qtd_init(p_qtd_data, p_buffer, length); |  | ||||||
|     p_dcd->qhd[ep_data].qtd_overlay.next = (uint32_t) p_qtd_data; |  | ||||||
|  |  | ||||||
|     lpc_usb->ENDPTPRIME = BIT_(edpt_phy2pos(ep_data)); |   dcd_qtd_t* qtd = &p_dcd->qtd[0]; | ||||||
|   } |   qtd_init(qtd, p_buffer, length); | ||||||
|  |  | ||||||
|   //------------- Status Phase -------------// |   // skip xfer complete for Status | ||||||
|   dcd_qtd_t* p_qtd_status = &p_dcd->qtd[1]; |   qtd->int_on_complete = (length > 0 ? 1 : 0); | ||||||
|   qtd_init(p_qtd_status, NULL, 0); // zero length xfer |  | ||||||
|   p_qtd_status->int_on_complete = int_on_complete ? 1 : 0; |  | ||||||
|  |  | ||||||
|   p_dcd->qhd[ep_status].qtd_overlay.next = (uint32_t) p_qtd_status; |   qhd->qtd_overlay.next = (uint32_t) qtd; | ||||||
|  |  | ||||||
|   lpc_usb->ENDPTPRIME = BIT_(edpt_phy2pos(ep_status)); |   lpc_usb->ENDPTPRIME = BIT_(edpt_phy2pos(ep_phy)); | ||||||
|  |  | ||||||
|   return true; |   return true; | ||||||
| } | } | ||||||
| @@ -465,13 +456,14 @@ void hal_dcd_isr(uint8_t port) | |||||||
|  |  | ||||||
|     //------------- Set up Received -------------// |     //------------- Set up Received -------------// | ||||||
|     if (lpc_usb->ENDPTSETUPSTAT) |     if (lpc_usb->ENDPTSETUPSTAT) | ||||||
|     { // 23.10.10.2 Operational model for setup transfers |     { | ||||||
|  |       // 23.10.10.2 Operational model for setup transfers | ||||||
|       lpc_usb->ENDPTSETUPSTAT = lpc_usb->ENDPTSETUPSTAT;// acknowledge |       lpc_usb->ENDPTSETUPSTAT = lpc_usb->ENDPTSETUPSTAT;// acknowledge | ||||||
|  |  | ||||||
|       tusb_dcd_setup_received(port, (uint8_t*) &p_dcd->qhd[0].setup_request); |       tusb_dcd_setup_received(port, (uint8_t*) &p_dcd->qhd[0].setup_request); | ||||||
|     } |     } | ||||||
|     //------------- Control Request Completed -------------// |     //------------- Control Request Completed -------------// | ||||||
|     else if ( edpt_complete & 0x03 ) |     else if ( edpt_complete & ( BIT_(0) | BIT_(16)) ) | ||||||
|     { |     { | ||||||
|       for(uint8_t ep_idx = 0; ep_idx < 2; ep_idx++) |       for(uint8_t ep_idx = 0; ep_idx < 2; ep_idx++) | ||||||
|       { |       { | ||||||
| @@ -490,7 +482,7 @@ void hal_dcd_isr(uint8_t port) | |||||||
|     } |     } | ||||||
|  |  | ||||||
|     //------------- Transfer Complete -------------// |     //------------- Transfer Complete -------------// | ||||||
|     if ( edpt_complete & ~(0x03UL) ) |     if ( edpt_complete & ~(BIT_(0) | BIT_(16)) ) | ||||||
|     { |     { | ||||||
|       xfer_complete_isr(port, edpt_complete); |       xfer_complete_isr(port, edpt_complete); | ||||||
|     } |     } | ||||||
|   | |||||||
| @@ -317,10 +317,10 @@ tusb_error_t usbd_control_request_subtask(uint8_t port, tusb_control_request_t c | |||||||
|   error = TUSB_ERROR_NONE; |   error = TUSB_ERROR_NONE; | ||||||
|  |  | ||||||
|   //------------- Standard Control e.g in enumeration -------------// |   //------------- Standard Control e.g in enumeration -------------// | ||||||
|   if( TUSB_REQ_RCPT_DEVICE == p_request->bmRequestType_bit.recipient && |   if( TUSB_REQ_RCPT_DEVICE    == p_request->bmRequestType_bit.recipient && | ||||||
|       TUSB_REQ_TYPE_STANDARD    == p_request->bmRequestType_bit.type ) |       TUSB_REQ_TYPE_STANDARD  == p_request->bmRequestType_bit.type ) | ||||||
|   { |   { | ||||||
|     if ( TUSB_REQUEST_GET_DESCRIPTOR == p_request->bRequest ) |     if ( TUSB_REQ_GET_DESCRIPTOR == p_request->bRequest ) | ||||||
|     { |     { | ||||||
|       uint8_t const * p_buffer = NULL; |       uint8_t const * p_buffer = NULL; | ||||||
|       uint16_t length = 0; |       uint16_t length = 0; | ||||||
| @@ -329,18 +329,20 @@ tusb_error_t usbd_control_request_subtask(uint8_t port, tusb_control_request_t c | |||||||
|  |  | ||||||
|       if ( TUSB_ERROR_NONE == error ) |       if ( TUSB_ERROR_NONE == error ) | ||||||
|       { |       { | ||||||
|         OSAL_SUBTASK_INVOKED ( usbd_control_xfer_substak(port, (tusb_dir_t) p_request->bmRequestType_bit.direction, (uint8_t*) p_buffer, length ), error );; |         OSAL_SUBTASK_INVOKED ( usbd_control_xfer_substak(port, (tusb_dir_t) p_request->bmRequestType_bit.direction, (uint8_t*) p_buffer, length ), error ); | ||||||
|       } |       } | ||||||
|     } |     } | ||||||
|     else if ( TUSB_REQUEST_SET_ADDRESS == p_request->bRequest ) |     else if ( TUSB_REQ_SET_ADDRESS == p_request->bRequest ) | ||||||
|     { |     { | ||||||
|       tusb_dcd_set_address(port, (uint8_t) p_request->wValue); |       tusb_dcd_set_address(port, (uint8_t) p_request->wValue); | ||||||
|       usbd_devices[port].state = TUSB_DEVICE_STATE_ADDRESSED; |       usbd_devices[port].state = TUSB_DEVICE_STATE_ADDRESSED; | ||||||
|  |  | ||||||
|       // TODO hack nrf52 auto handle set address |       #ifdef NRF52840_XXAA | ||||||
|  |       // nrf52 auto handle set address, no need to return status | ||||||
|       SUBTASK_RETURN(TUSB_ERROR_NONE); |       SUBTASK_RETURN(TUSB_ERROR_NONE); | ||||||
|  |       #endif | ||||||
|     } |     } | ||||||
|     else if ( TUSB_REQUEST_SET_CONFIGURATION == p_request->bRequest ) |     else if ( TUSB_REQ_SET_CONFIGURATION == p_request->bRequest ) | ||||||
|     { |     { | ||||||
|       usbd_set_configure_received(port, (uint8_t) p_request->wValue); |       usbd_set_configure_received(port, (uint8_t) p_request->wValue); | ||||||
|     }else |     }else | ||||||
| @@ -368,8 +370,8 @@ tusb_error_t usbd_control_request_subtask(uint8_t port, tusb_control_request_t c | |||||||
|  |  | ||||||
|   //------------- Endpoint Request -------------// |   //------------- Endpoint Request -------------// | ||||||
|   else if ( TUSB_REQ_RCPT_ENDPOINT == p_request->bmRequestType_bit.recipient && |   else if ( TUSB_REQ_RCPT_ENDPOINT == p_request->bmRequestType_bit.recipient && | ||||||
|             TUSB_REQ_TYPE_STANDARD      == p_request->bmRequestType_bit.type && |             TUSB_REQ_TYPE_STANDARD == p_request->bmRequestType_bit.type && | ||||||
|             TUSB_REQUEST_CLEAR_FEATURE      == p_request->bRequest ) |             TUSB_REQ_CLEAR_FEATURE == p_request->bRequest ) | ||||||
|   { |   { | ||||||
|     tusb_dcd_edpt_clear_stall(port, u16_low_u8(p_request->wIndex) ); |     tusb_dcd_edpt_clear_stall(port, u16_low_u8(p_request->wIndex) ); | ||||||
|   } else |   } else | ||||||
| @@ -383,7 +385,7 @@ tusb_error_t usbd_control_request_subtask(uint8_t port, tusb_control_request_t c | |||||||
|     tusb_dcd_control_stall(port); |     tusb_dcd_control_stall(port); | ||||||
|   }else if (p_request->wLength == 0) |   }else if (p_request->wLength == 0) | ||||||
|   { |   { | ||||||
|     usbd_control_status(port, (tusb_dir_t) p_request->bmRequestType_bit.direction); |     usbd_control_status(port, 1-p_request->bmRequestType_bit.direction); | ||||||
|   } |   } | ||||||
|  |  | ||||||
|   OSAL_SUBTASK_END |   OSAL_SUBTASK_END | ||||||
|   | |||||||
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