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1541 Commits

Author SHA1 Message Date
hathach
77f0726361 fix ehci issue with portsc when enable port power and port reset 
fix attached device not regconized if attached before power on
 2023-05-09 17:32:14 +07:00
Martino Facchin
6ff62c0fe8 renesas: add fallback for targets not defining CFG_TUSB_RHPORT*_MODE 2023-05-03 11:47:41 +02:00
Martino Facchin
5f7e7b4b0a renesas_ra: support RA2A1 (FS only) 2023-05-03 10:06:13 +02:00
Martino Facchin
4afed62646 renesas_ra: host: handle retry on attach() 2023-05-03 10:05:29 +02:00
Martino Facchin
be54870c3b renesas_ra: add support for HS port 2023-05-03 10:02:24 +02:00
Ha Thach
964e7ebf21 Merge pull request #2013 from tannewt/imx_1042 
Handle iMX RT 1042 usb naming
 2023-04-24 16:53:24 +07:00
Jacek Fedorynski
9bf97e3e52 [rp2040] Make writes to SIE_CTRL aware of concurrent access 
This commit makes it so that when setting the START_TRANS bit in the
SIE_CTRL register, along with some other bits, we first set all the
other bits, then wait some cycles, and then set the START_TRANS bit.

Doing so protects against a situation where the USB controller is
reading the register at the same time and gets an incorrect value.

This mirrors the procedure already applied to buffer control
registers.
 2023-04-20 20:23:31 +02:00
Mengsk
412b557a08 Cleanup unnecessary code for 16bit access. 2023-04-17 15:34:20 +02:00
HiFiPhile
818bda18c2 Fix FIFO transfer and buffer alignment. 2023-04-14 23:37:07 +02:00
HiFiPhile
2f2c8ce9ec Fix GCC build. 2023-04-14 21:00:55 +02:00
HiFiPhile
413b0a7da5 Use PLL clock. 2023-04-14 17:12:47 +02:00
HiFiPhile
cbf4b1aec8 Merge branch 'master' of https://github.com/hathach/tinyusb into pr1942 2023-04-14 13:16:52 +02:00
Scott Shawcroft
2cda9b60c9 Handle iMX RT 1042 usb naming 2023-04-06 15:45:23 -07:00
John Cronin
718bcdb8bc Add STM32L5 support - no OTG similar to some L4s 2023-04-03 13:56:16 +01:00
hathach
71fb6469d4 separate CFG_TUSB_MEM_SECTION and CFG_TUSB_MEM_ALIGN to 
- CFG_TUD_MEM_SECTION and CFG_TUD_MEM_ALIGN
- CFG_TUH_MEM_SECTION and CFG_TUH_MEM_ALIGN
- fix missing mem section and align for host
 2023-03-24 14:05:21 +07:00
hathach
4520218786 more compatible with IAR 2023-03-20 11:33:39 +07:00
hathach
1fc203b085 more update to kinetis bsp 2023-03-18 19:50:24 +07:00
hathach
2d187777c0 merge kinetis into its own family in bsp 2023-03-18 18:30:51 +07:00
Bob Paddock
f9b8a0667a Add support for NXP FRDM_K32L2A4S eval board. 2023-03-18 16:50:50 +07:00
hathach
9f54cc1eb7 more clean up 2023-03-18 11:43:47 +07:00
hathach
bdfcd50b1b Merge branch 'master' into portability 2023-03-17 23:53:38 +07:00
hathach
3623ba1884 fix trailing space and new line 
temporarily disable codespell
 2023-03-17 16:12:49 +07:00
hathach
e7d212f337 more fix 2023-03-16 23:21:15 +07:00
hathach
92aed7e3e0 rename symbols 2023-03-16 11:28:10 +07:00
hathach
bc2127b330 rename file link to rusb2 2023-03-16 11:03:53 +07:00
hathach
cd1726c009 Merge branch 'master' into renesas-ra 2023-03-16 09:51:27 +07:00
hathach
d9a9dc5ac0 fix PICO_SHARED_IRQ_HANDLER_HIGHEST_ORDER_PRIORITY not defined in old pico-sdk 2023-03-15 17:38:14 +07:00
Ha Thach
ea8ecea59a Merge pull request #1953 from tannewt/fix_cached_imx_reset 
Flush the dcd data on reset
 2023-03-14 09:08:32 +07:00
Scott Shawcroft
d31aac453e Flush the dcd data on reset 2023-03-13 15:22:00 -07:00
Hubert Denkmair
f8a21fff17 dcd_write_packet_memory: use volatile modifier for destination pointer 2023-03-12 15:51:07 +01:00
hathach
0a7c08d16e minor format 2023-03-12 16:01:24 +07:00
Ha Thach
be21413361 Merge pull request #1948 from dhalbert/remove-volatile-cast-include 
rp2040: include hardware/sync.h explicitly
 2023-03-11 09:35:04 +07:00
hathach
fe77976765 Merge branch 'master' into renesas-ra 2023-03-11 08:15:23 +07:00
Dan Halbert
4857abdc6b rp2040: include hardware/sync.h explicitly 2023-03-10 14:01:51 -05:00
Jerzy Kasenberg
f0ddf8d10f dcd_nrf5x: ISO OUT handling 
For incoming ISO OUT packets it was possible to start
DMA from endpoint to RAM before transfer was started
resulting in unrelated memory corruption.
This is scenario that causes memory corruption:
- ISO OUT packet is received
- Packet is transferred by DMA to transfer buffer
- xfer->started is cleared and xfer->buffer is updated as
  it is in every case
- Application takes to long to handle it (it happens when debugger
  is connected breakpoint is hit slowing down software).
- Next ISO OUT packet arrives
At this point there was no check if transfer was started and packet
was copied by DMA to location beyond previous data, possibly overwriting
unrelated memory.

This solves the issue by checking that transfer was
started and there is buffer ready for incoming packet.
 2023-03-10 08:22:43 +01:00
hathach
0f8e530de1 fix incorrect merge of hcd link 2023-03-08 23:01:37 +07:00
hathach
2cf092464b fix freertos build with iar, format/indent link_type 2023-03-08 22:34:54 +07:00
hathach
05e0205ad0 Merge branch 'master' into renesas-ra 2023-03-08 21:05:06 +07:00
Hubert Denkmair
b3ad560e62 fix path to stm32g0xx.h 2023-03-08 14:22:11 +01:00
Hubert Denkmair
410ad4d0f9 add basic STM32G0 support 2023-03-08 12:05:58 +01:00
graham sanderson
b7fa90e706 rp2040: Fixup lib and example compile for LLVM Embedded Toolchain for ARM 2023-03-02 14:32:22 -06:00
hathach
5d3084a714 add TUP_USBIP_FSDEV and TUP_USBIP_FSDEV_STM32, clean up ifdef with stm32 2023-03-01 11:22:04 +07:00
Ha Thach
3c38c7dc25 Merge pull request #1828 from HiFiPhile/stm32_fsdev 
stm32_fsdev & ISO EP buffer allocation improvements
 2023-02-28 23:45:02 +07:00
hathach
ffdc100cb9 rename ep_num to ep_idx, minor clean up 2023-02-28 17:11:59 +07:00
Gunar Schorcht
4c510c12b1 synopsys/dwc2: fix SOF interrupt handling 
SOF is not a flag of the GOTGINT register but of the GINTSTS register. Therefore the flag must be written in the GINTSTS register instead of the GOTGINT register to clear the interrupt.
 2023-02-27 09:54:45 +01:00
hathach
eca96c635d comment out osal_task_delay if using os none 2023-02-22 22:28:22 +07:00
hathach
1466afafeb move and add optional tusb_app_virt_to_phys/tusb_app_phys_to_virt 
also add place holder for tusb_app_dcache_flush() and
tusb_app_dcache_invalidate()
 2023-02-22 22:14:50 +07:00
hathach
4c846af53e rename OHCI_RHPORTS to TUP_OHCI_RHPORTS 2023-02-22 16:18:45 +07:00
wooyay
4e2afdf5e1 ohci: Disable MIE interrupt during IRQ processing, zero HccADoneHead on completion 2023-02-18 10:48:39 +10:30
Ryzee119
75f6583c1c ohci: Use enum instead of magic number 2023-02-18 10:48:39 +10:30