hathach
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4da5de707b
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have p4 dma somewhat working but having issue with buffer that does not occupy the whole cache line
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2024-11-20 20:38:20 +07:00 |
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hathach
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a68c53fb8e
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clean up, add typdef for dwc2 type for device
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2024-11-14 17:34:14 +07:00 |
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hathach
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4f288c030a
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move buffer and buflen to hcd_endpoint_t to support periodic endpoint
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2024-11-01 20:58:29 +07:00 |
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hathach
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b7ff10f59c
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rename and add both CFG_TUH_DWC2_SLAVE_ENABLE/CFG_TUH_DWC2_DMA_ENABLE better out dma handle
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2024-11-01 17:54:10 +07:00 |
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hathach
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79c0a249e8
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got In transfer working, able to get 1st device descriptor and set address
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2024-10-25 22:56:25 +07:00 |
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hathach
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07abc722b6
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hcd able to send setup packet
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2024-10-25 19:00:45 +07:00 |
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hathach
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063661e3a3
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more progress on dwc2 hcd, initial code for edpt xfer
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2024-10-25 00:20:34 +07:00 |
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hathach
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8461525d48
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add tusb_time_millis(), able to reset and enable dwc2 port and get SOF active
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2024-10-21 18:18:33 +07:00 |
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hathach
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f5978876d2
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get hprt interrupt triggered
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2024-10-21 11:43:37 +07:00 |
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hathach
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b5a4f18879
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get hpri triggered
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2024-10-17 15:56:12 +07:00 |
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hathach
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8d9d3d9a2a
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move gahbcfg/gintmsk with dma to dwc2 common
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2024-10-16 13:19:28 +07:00 |
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hathach
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4012e15075
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move core init code to dwc2 common. update/correct build for esppressif
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2024-10-15 17:55:24 +07:00 |
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hathach
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10a3aa3cc8
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adding hcd dwc2
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2024-10-15 13:03:12 +07:00 |
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