5 Commits

Author	SHA1	Message	Date
hathach	2a67ce773d	change default risv-gcc to riscv-none-elf- and add _zicsr extension ... add cmake for ch32v20x, skip freertos examples for CH32V20X, also skip net webserver due to lack of RAM update to use openocd with wlinke adapter	2024-05-16 19:18:43 +07:00
Ha Thach	3e2ea77506	More ci tweak (#2636) ... * change concurrency group to ${{ github.workflow }}-${{ github.ref }} * use argparse for build.py hil_test.py, remove the need to install click * move ci win/mac to build_cmake.yml * rename build_family.yml to build_util.yml * build_util.yml support esp32 * integrate build-espressif into build.yml * build.py support make with --board option * add get_deps action * update hil test to reuse action	2024-05-10 18:55:43 +07:00
HiFiPhile	ef7be4c2ff	Fix CI.	2024-04-28 01:17:32 +02:00
kkitayam	8f04d96c07	Add small RAM MCUs/boards to skip list	2024-03-25 23:15:49 +09:00
kkitayam	5a880013c8	Add UVC 2ch example	2024-03-24 22:31:47 +09:00