hathach
|
301d6b4133
|
clean up
|
2021-11-17 09:48:08 +07:00 |
|
hathach
|
12e96ce571
|
set DCFG_XCVRDLY when using external ULPI highspeed phy
|
2021-11-15 12:18:28 +07:00 |
|
hathach
|
d87a897a7b
|
xmc4500 ported, cdc msc example run fine
|
2021-11-05 13:13:21 +07:00 |
|
hathach
|
b51d038b65
|
fix issue with bcm2711 caching issue by ading ISB() after dwc2_dcd_int_enable90
also add hwcfg_list for reference
|
2021-11-04 12:30:11 +07:00 |
|
hathach
|
7e68894726
|
grouping stm32L4 family in bsp
|
2021-11-02 16:10:40 +07:00 |
|
hathach
|
b809429873
|
minor clean up
|
2021-11-02 14:51:15 +07:00 |
|
hathach
|
aa682d7301
|
add fix for stm32l4 (version 3.10a) which generate transfer complete when setup recieved and control out data complete
|
2021-11-02 13:52:30 +07:00 |
|
hathach
|
215e0595ab
|
change F207 to use new dwc2
|
2021-10-31 00:09:40 +07:00 |
|
hathach
|
9cd5a87c64
|
add support for EFM32GG
merge GG12 GG12 to simply OPT_MCU_EFM32GG
|
2021-10-30 20:42:55 +07:00 |
|
hathach
|
660e8b8c88
|
skip snpsid check for gd32, abstract phyfs turnaround, set max timeout calibration.
still has issue with gd32 with msc (does work with running with rtt as
log).
|
2021-10-29 16:08:19 +07:00 |
|
hathach
|
6c67fc4125
|
correctly init hs phy for bcm
|
2021-10-29 00:53:30 +07:00 |
|
hathach
|
7def380058
|
support bcm2711 on pi4, enhance dcd init with utmi and ulpi hs phy
|
2021-10-28 12:52:18 +07:00 |
|
hathach
|
9f1cd1a753
|
add synopsys id check, rename GCCFG_* to STM32_GCCFG-*
|
2021-10-26 23:10:26 +07:00 |
|
hathach
|
bb5dab5c2e
|
add hw config struct
|
2021-10-26 22:48:01 +07:00 |
|
hathach
|
68fa9d4064
|
enhance fifo read/write
|
2021-10-26 13:56:56 +07:00 |
|
hathach
|
5d05f8758f
|
more clean up
|
2021-10-26 13:36:43 +07:00 |
|
hathach
|
4ebfd00d67
|
clean up
|
2021-10-26 13:33:40 +07:00 |
|
hathach
|
de413183d4
|
use dwc2->epin
|
2021-10-26 13:07:00 +07:00 |
|
hathach
|
e7655a7567
|
update the access epout
|
2021-10-26 13:02:26 +07:00 |
|
hathach
|
34844c9061
|
use dwc2->fifo[]
|
2021-10-26 12:53:29 +07:00 |
|
hathach
|
5e1a031800
|
complete dwc2 regs struct
|
2021-10-26 12:22:41 +07:00 |
|
hathach
|
3755814f57
|
add epin, epout to dwc2 regs
|
2021-10-26 11:49:59 +07:00 |
|
hathach
|
8df078dc9e
|
more rename
|
2021-10-26 11:11:46 +07:00 |
|
hathach
|
7369d2441d
|
update dwc2_type
|
2021-10-26 00:55:24 +07:00 |
|
hathach
|
dbd31895bc
|
change usage of TU_CHECK_MCU() to prevent macro conflict
|
2021-10-25 17:04:03 +07:00 |
|
hathach
|
85e18b9172
|
house keeping
|
2021-10-25 15:58:12 +07:00 |
|
hathach
|
4ccf60954d
|
moving esp32s2 to dwc2, abstract dwc2_set_turnaround()
|
2021-10-25 15:51:41 +07:00 |
|
hathach
|
61c80840c3
|
update dwc int enable/disable
|
2021-10-25 00:40:21 +07:00 |
|
hathach
|
4ab931a361
|
more clean up
|
2021-10-25 00:23:18 +07:00 |
|
hathach
|
0e7c103e98
|
minor rename
|
2021-10-25 00:11:17 +07:00 |
|
hathach
|
32742571da
|
switch gd32 and stm32f4 to use new dwc2 driver
|
2021-10-25 00:06:57 +07:00 |
|
hathach
|
06de6b725c
|
adding generalized dwc2 driver
|
2021-10-24 23:24:46 +07:00 |
|