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307cce92c4f630ab988e6eb1e77685bc1e82d85a
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1524 Commits

Author SHA1 Message Date
Camila
307cce92c4 Improved SDK 3.2.0 compatibility 
- Used usbdev_allocreq for compatibility with SDK 3.2.0
- Wrapped previous code in #ifdef for legacy compatibility
 2024-03-26 19:48:08 +01:00
Camila
eed3747661 Changes required for SDK 3.2.0: 
- Define EP_ALLOCREQ
 - Define EP_FREEREQ
 - Define EP_ALLOCBUFFER
 - Define EP_FREEBUFFER

Those were previously defined in spresense-exported-sdk, but now have been removed.
 2024-03-11 13:11:07 +01:00
hathach
a52b4647ec only save/restore CLK_RECOVER_IRC_EN/CTRL if FSL_FEATURE_USB_KHCI_IRC48M_MODULE_CLOCK_ENABLED is defined to 1 2024-02-24 17:18:30 +07:00
Ha Thach
21de8245ae Merge pull request #2168 from emb4fun/nxp_k64 
Added support for the NXP K64 series
 2024-02-24 01:11:01 +07:00
hathach
65a2e5cdf8 fix build with cpu without USB_CLK_RECOVER using old dcd_khci driver 2024-02-24 00:53:05 +07:00
hathach
3d3bf45102 frdm k64f usb work well, add kinetis_k to ci cmake 2024-02-24 00:36:07 +07:00
Ha Thach
65e60f3123 Merge pull request #2463 from kasjer/kasjer/nrf5x-isoout-corruption-detection 
nrf5x: Handle ISOOUT CRC errors
 2024-02-20 14:06:08 +07:00
Ha Thach
e9dc8f3e7d fix wrong volatile usage in ohci gtd 2024-02-19 18:12:03 +07:00
Jerzy Kasenberg
68bb858406 nrf5x: Handle ISOOUT CRC errors 
NRF5x USB controller can detect ISO OUT CRC errors.
In such case USBEVENT is signaled with EVENTCAUSE_ISOOUTCRC set.
Even if controller detects corrupted ISO OUT packet it allows
to data transfer from ednpoint to RAM however packet is corrupted
and code could just as well drop packet altogether.

With current implementation incoming ISO OUT packets were put in
FIFO and exact information how much data already in FIFO is correct
was hard to keep track of.
If was observed that on certain configurations HS hub when FS device
was connected occasionally sent invalid (short) packet. In such case
if packet length was reported odd audio stream was not recognizable any
more.

With this change corrupted packets are not passed to upper layers
and are silently dropped.
 2024-02-12 16:17:44 +01:00
Michael Fischer
ea30041168 Merge branch 'hathach:master' into nxp_k64 2024-02-04 10:55:34 +01:00
HiFiPhile
d692d77834 Merge branch 'master' into src/portable/synopsys/dwc2/fix_sof_int_handling 2024-02-01 11:12:20 +01:00
Ha Thach
4b3b401ce3 Merge pull request #2401 from Ryzee119/ohci_more_dev 
[OHCI] Allow more than 16 devices
 2024-01-12 17:48:01 +07:00
Ha Thach
71ce4b8be6 Merge pull request #2402 from Okarss/master 
[STM32 FSDEV] Fix ISR race conditions
 2024-01-12 10:26:52 +07:00
Okarss
2d3d148912 [STM32 FSDEV] Align names for consistency 2024-01-11 21:02:14 +02:00
hathach
e68c6658c9 move gtd extra out of control struct to save sram 
also rename gtd_data to gtd_extra
 2024-01-11 17:35:05 +07:00
Okarss
545821399b [STM32 FSDEV] Introduce a typedef for bus access width 2024-01-11 00:59:39 +02:00
Alex Voinea
3bf6826451 Disable ULPI clock during sleep on stm32f7 when using internal phy 2024-01-10 10:27:21 +01:00
Ryzee119
e7e19f5627 [OHCI] Allow more than 16 devices 2024-01-10 16:03:43 +10:30
Okarss
0d4b24e56c [STM32 FSDEV] Fix ISR race conditions 2024-01-10 05:43:20 +02:00
hathach
551e47a464 allow rp2040 to use max3421e as host controller 
- fix warnings build hcd max3421 with rp2040
- add tinyusb_host_max3421 target for rp2040 cmake, -DMAX3421_HOST=1
will enable this
- add max3421 driver implementation for rp2040 family
- update tusb_config for host to allow easy enable host selection for
rp2040 (default/pio-usb/max3421)
 2023-12-26 22:50:01 +07:00
Jerzy Kasenberg
7f84fe9bda dcd_nrf5x: Fix dcd_edpt_open for iso endpoint 
When ISO endpoint handling was introduced two lines that
clear stall and data toggle bit were left unchanged and they
were effective for ISO enadpoint as well.
This is incorrect behavior since EPSTALL and DTOGGLE registers
have only 3 bits for address.
Leaving code that clears toggle bit results in endpoint 0 toggle bit
being reset when iso endpoint (8) is opened.

Now code that clears stall and toggle bit is applied to non-iso endpoint only
as it was done before iso handling was introduced.
 2023-12-21 08:48:59 +01:00
HiFiPhile
f3d713ac73 Fix CI & typo. 2023-12-13 14:32:23 +01:00
henneboi
93c40b6966 Add Support stm32h5 for stm32h573i based on stm32_fsdev G0 implementation Tested on Windows with IAR and gcc toolchain ( via cubeide) Tested only with audio examples, but sould be ok for other examples Cmake pacthed : but not tested Linux build : not tested Added a temporary workaround in make file to support H5 HAL repo ( ARMCC_VERSION=0) 2023-12-12 16:04:21 +01:00
Ha Thach
be4d65221b Merge pull request #2346 from IngHK/LogLineEnds 
made log line end consistent \r\n
 2023-11-29 17:12:08 +07:00
IngHK
7e1fe2ff83 made log line end consistent \r\n 2023-11-24 22:02:58 +01:00
Ha Thach
0601d174b1 Merge branch 'master' into feature/ch32f20x 2023-11-24 11:33:34 +07:00
hathach
01f22a9e25 fix h7 running on fullspeed phy has issue with WFI if not disable ULPI clock 2023-11-22 22:50:10 +07:00
hathach
025ffa200c add spec version to dwc2 info 2023-11-22 17:36:52 +07:00
hathach
1f71625a32 add tuh_max3421_reg_read(), tuh_max3421_reg_read() for application usage 
added max3241 for feather m4 and tested
 2023-11-20 21:31:06 +07:00
HiFiPhile
8af470e06d Fix CI 2023-11-19 16:19:11 +01:00
HiFiPhile
b5b34e73d6 Add dwc2 info of F429. 2023-11-19 16:10:16 +01:00
hathach
4b9320e40e fix race condition when dev0 is removed while enumerating 2023-11-03 22:22:13 +07:00
hathach
46106c6ef4 skip tuh_max3421_spi_cs_api() in hcd_init() 
only call tuh_max3421_spi_cs_api() in SPI start/end transfer since
Arduino port use this to call begin/endTransaction()
 2023-11-02 15:22:02 +07:00
hathach
06c9d9a79a remove legacy driver st/synopsys 2023-11-01 16:36:28 +07:00
Ha Thach
4c01c5a714 Merge pull request #2300 from hathach/add-u5a5 
Add support for stm32u5a5 (highspeed with built-in femtoPHY)
 2023-10-31 13:27:54 +07:00
hathach
214a4afa6a dwc2 flush tx,rx fifo in dcd_init() 2023-10-31 11:53:40 +07:00
hathach
db3ff4b352 usb on u5a5 hs work well with correct VBVALEXTOEN/VBVALOVAL set 2023-10-31 11:26:31 +07:00
hathach
9f0223dccd minor clean up 2023-10-31 10:58:15 +07:00
hathach
305ef5d48a minor space format dwc2 driver 2023-10-30 22:22:27 +07:00
hathach
a4c542a7b4 addd dwc2_info.py/md update stm32u5a5 board clock & power configure, able to get passed otg clock reset 2023-10-30 22:21:58 +07:00
hathach
9cba9a753b update s3 devkitm with max3421 pin following metro s3, check max3421 version to make sure it is valid 2023-10-27 17:40:53 +07:00
hathach
27a2c8cba4 adding nulceo stm32u5a5, fix clock configure issue 
dwc2 core stuck at reset
 2023-10-18 18:43:07 +07:00
Ha Thach
dd588222c7 Merge pull request #2265 from bencowperthwaite/master 
STM32U5 HS Support
 2023-10-18 15:25:57 +07:00
denis.krasutski
ce627f4318 feat(ch32f20x): add support of ch32f20x 2023-10-06 13:04:54 +03:00
hathach
67e34267a6 change tuh_max3421_spi_xfer_api() signature 
tested working with sam d21 and d51, not tested with nrf52, seem not
working with esp32
 2023-10-04 18:00:32 +07:00
hathach
6b8933cfe8 fix build with new freertos host example 2023-09-28 12:55:59 +07:00
hathach
76c43a5bdc Merge branch 'master' into add-max3421-esp32 2023-09-27 17:52:18 +07:00
hathach
3b0ffd0f48 change hcd_int_handler(rhport, in_isr) signature: add in_isr 
change tuh_int_handler() to take in_isr as optional parameter (default =
true)
 2023-09-27 15:51:03 +07:00
hathach
2f6592de7f update max3421 to have hcd_int_handler_ext() 2023-09-27 11:30:18 +07:00
bac
1168e4e163 Added support for USB2 HS peripheral (with integrated HS PHY) on STM32U59x chips 2023-09-26 15:27:17 +01:00