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32f9f452afc4d431d51cb16a02f99d76c88f7fb9
Commit Graph

63 Commits

Author SHA1 Message Date
Martino Facchin
32f9f452af renesas: provide default for CFG_TUSB_RHPORT1_MODE 
Should fix CI failure for Renesas RX family
 2023-05-17 12:13:28 +02:00
Martino Facchin
6ff62c0fe8 renesas: add fallback for targets not defining CFG_TUSB_RHPORT*_MODE 2023-05-03 11:47:41 +02:00
Martino Facchin
5f7e7b4b0a renesas_ra: support RA2A1 (FS only) 2023-05-03 10:06:13 +02:00
Martino Facchin
4afed62646 renesas_ra: host: handle retry on attach() 2023-05-03 10:05:29 +02:00
Martino Facchin
be54870c3b renesas_ra: add support for HS port 2023-05-03 10:02:24 +02:00
hathach
e7d212f337 more fix 2023-03-16 23:21:15 +07:00
hathach
92aed7e3e0 rename symbols 2023-03-16 11:28:10 +07:00
hathach
bc2127b330 rename file link to rusb2 2023-03-16 11:03:53 +07:00
hathach
0a7c08d16e minor format 2023-03-12 16:01:24 +07:00
hathach
0f8e530de1 fix incorrect merge of hcd link 2023-03-08 23:01:37 +07:00
hathach
2cf092464b fix freertos build with iar, format/indent link_type 2023-03-08 22:34:54 +07:00
hathach
05e0205ad0 Merge branch 'master' into renesas-ra 2023-03-08 21:05:06 +07:00
hathach
43b255f413 more typos 2022-12-04 19:44:01 +07:00
Rafael Silva
ea81d22f18 add __evenaccess keyword for CCRX compiler compatibility 
Signed-off-by: Rafael Silva <rafaelsilva@ajtec.pt>
 2022-06-02 09:35:30 +01:00
Rafael Silva
fbc2979428 fix iso int register typo 
druing the renaming int and iso endpoint configurations were swapped

Co-authored-by: Koji KITAYAMA <45088311+kkitayam@users.noreply.github.com>
 2022-06-02 09:35:30 +01:00
Rafael Silva
79fd23974c fix host preprocessor flag typo 
Co-authored-by: Koji KITAYAMA <45088311+kkitayam@users.noreply.github.com>
 2022-06-02 09:35:30 +01:00
Rafael Silva
60aae59eeb style code for consistency with existing codebase 2022-06-02 09:35:30 +01:00
Rafael Silva
c529d0b440 remove duplicate link register bit macros 
Signed-off-by: Rafael Silva <rafaelsilva@ajtec.pt>
 2022-06-02 09:35:30 +01:00
Rafael Silva
a936bafb8c add support for renesas ra family of mcus 
Signed-off-by: Rafael Silva <rafaelsilva@ajtec.pt>
 2022-06-02 09:35:30 +01:00
Rafael Silva
03777f4a46 generalize renesas LINK core driver 
create local register access struct and move mcu specific code
	in preparation of support for other mcu families that use the LINK usb core

Signed-off-by: Rafael Silva <rafaelsilva@ajtec.pt>
 2022-06-02 09:35:30 +01:00
Rafael Silva
dcadbf3364 rename renesas driver to link 
link was chosen according to the name for the usb core on datasheets, LINK core

Signed-off-by: Rafael Silva <rafaelsilva@ajtec.pt>
 2022-06-02 09:35:30 +01:00
Ha Thach
fdeac8508b Merge pull request #1381 from hathach/add-sof-isr 
Add SOF IRQ Handler
 2022-05-31 22:25:14 +07:00
hathach
606f932d92 added dcd_sof_enable() stubs for all other ports 2022-03-07 23:05:05 +07:00
hathach
635fb9dcdd try to fix ci 2022-03-02 12:33:47 +07:00
Ha Thach
244154e087 Merge pull request #1311 from Wini-Buh/CCRX_Ext 
Solve problems with CCRX toolchain
 2022-02-26 14:34:18 +07:00
hathach
31aa077cb0 rename TUSB_OPT_HOST_ENABLED to CFG_TUH_ENABLED 2022-02-25 18:35:21 +07:00
hathach
d10326cb4e rename TUSB_OPT_DEVICE_ENABLED to CFG_TUD_ENABLED 
TUSB_OPT_DEVICE_ENABLED still usable for backward compatible
 2022-02-25 18:35:21 +07:00
Roland
e1f0c484c6 Modifications for CCRX toolchain 2022-02-01 23:45:52 +01:00
kkitayam
2b8b8a3a97 Fix hcd_edpt_clear_stall 2021-12-27 22:55:28 +09:00
kkitayam
2c0fcc2fa7 Add statements for control VBUS 2021-12-27 21:36:49 +09:00
kkitayam
a76799b085 Add hcd for Renesas RX 2021-12-27 21:19:02 +09:00
hathach
5af989384b remove ep descriptor wMaxPacketSize bitfield due to endian issue 2021-10-24 13:11:21 +07:00
hathach
a5f516893b more with -Wcast-qual 2021-10-17 16:36:53 +07:00
hathach
d077574097 reset PID to DATA0 when open endpoint 2021-09-08 17:56:22 +07:00
kkitayam
f3da48d46a Implement dcd_edpt_close_all() for Renesas RX family 2021-09-07 23:28:54 +09:00
hathach
71e77e47fa add dcd_edpt_close_all() for clear existing configured state 
correctly responded to TD 9.13 Set Configuration Test
 2021-08-26 17:07:03 +07:00
kkitayam
ff59e98a6a Add compile switch to enable SOF during suspend only 2021-08-19 23:57:34 +09:00
kkitayam
351581537f Removes redundant SOF processing from the Renesas RX family. 
The same logic regarding the resume signal was implemented by usbd.

See also: #1023
 2021-08-19 22:51:10 +09:00
hathach
26d347be17 add note for renesas rx remote wakeup 2021-08-16 20:24:07 +07:00
kkitayam
45e55a8ea0 fix: D0FIFOSEL setting was incorrectly when big-endian is selected. 
In pipe_xfer_in(), the endianness setting of D0FIFOSEL was lacking due to refactoring.
And add type cast operation to avoid warnings by CCRX.
 2021-07-31 12:20:19 +09:00
kkitayam
e7c9cf4aea Change the accessing method of TU_FIFO from read/write_n_const_addr_full_words to get_write/read_info and advance_write/read_pointer pairs. 2021-07-29 20:24:11 +09:00
kkitayam
3f49380b37 added support for dcd_edpt_xfer_fifo 2021-07-29 20:22:33 +09:00
kkitayam
1c2e353193 Refactor and clean up 2021-07-29 20:22:33 +09:00
hathach
15112fdbba clean up compiler 2021-07-22 22:10:48 +07:00
hathach
8cd23489d5 update endian 2021-07-22 17:49:39 +07:00
hathach
c4da1abb1e rename bit filed order 
clean up packed/bit order begin end
 2021-07-22 17:30:08 +07:00
hathach
4e50ceba48 rename packed begin/end 2021-07-22 17:07:39 +07:00
hathach
fa0936bf58 Merge branch 'CCRX_Port' of https://github.com/Wini-Buh/tinyusb into Wini-Buh-CCRX_Port 2021-07-22 16:48:18 +07:00
kkitayam
1ff3b76451 remove unnecessary blocking operation. 
add comments why resume event is sent manually.
 2021-07-05 21:27:08 +09:00
kkitayam
3019c6eb40 Add SUSPEND/RESUME handling for Renesas RX family. 2021-07-03 23:35:58 +09:00