hathach
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253430a765
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add example specific DEPS_SUBMODULES
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2021-03-18 16:28:44 +07:00 |
|
hathach
|
ed8f117dd1
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explicitly add dcd source file without vendor/family
|
2021-03-17 16:52:07 +07:00 |
|
hathach
|
7d877e286a
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update DEPS_SUBMODULES to optimize ci
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2021-03-05 22:24:03 +07:00 |
|
hathach
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590d8d4d5c
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rename FAMILY_SUBMODULES to DEPS_SUBMODULES
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2021-03-04 22:53:02 +07:00 |
|
hathach
|
b846ded487
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merge no-family example build
specify FAMILY_SUBMODULES for all boards
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2021-03-04 22:50:45 +07:00 |
|
hathach
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a6efe475e7
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use cmsis 5 for all stm32
|
2020-10-30 14:14:28 +07:00 |
|
hathach
|
41a36b1256
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f0 use offical st driver repo
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2020-10-30 12:48:34 +07:00 |
|
hathach
|
ec018fbf4e
|
clean up jlink default interface
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2020-10-08 17:17:37 +07:00 |
|
hathach
|
1a8ce043ed
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enable -Wcast-align
suppress vendor sdk driver at board.mk
|
2020-05-17 14:24:15 +07:00 |
|
hathach
|
50be9d7c3a
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mass rename tud/dcd_irq_handler to tud/dcd_init_handler
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2020-04-17 12:27:53 +07:00 |
|
hathach
|
9014ca5528
|
move irq for stm32 fsdev
|
2020-04-08 16:26:14 +07:00 |
|
Nathan Conrad
|
62a68034d9
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Update F0 BSP for new HAL
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2020-03-28 10:58:36 -04:00 |
|
Nathan Conrad
|
705d43cda7
|
Modify include of HAL, and remove CMSIS clock configuration code, and implement UART for STM32F407Disco
|
2020-03-26 10:10:06 -04:00 |
|
Nathan Conrad
|
eaf767b0db
|
STM32FSDEV: Rewrite transfer ISR
|
2020-03-22 14:26:48 -04:00 |
|
hathach
|
85a3315a99
|
Adding lwip_webserver to ci
- buil_al.py skip specific MCU if .skip.MCU_ exists
- reduce stm32f070 heap & stack size to compile webserver
|
2020-03-09 15:51:29 +07:00 |
|
hathach
|
04cf337b79
|
clean up flash-stlink
|
2020-01-10 15:09:59 +07:00 |
|
hathach
|
88bdb12ee5
|
close #204 define HSE_VALUE in _hal_conf instead of board.mk
|
2019-12-11 15:19:51 +07:00 |
|
hathach
|
f638594536
|
move -flto to board.mk
current board that doesn work with flto is spresense and mimxrt10xx (due
to xip image_vector_table is optimized out).
|
2019-11-20 16:06:40 +07:00 |
|
Nathan Conrad
|
cebc066813
|
Add UART HAL source file to stm32f070 makefile.
|
2019-11-03 15:25:55 -05:00 |
|
Nathan Conrad
|
5839159742
|
Enable UART debugging on F070.
|
2019-11-03 09:54:02 -05:00 |
|
hathach
|
6f952a8e84
|
fix missing board uart read/write()
|
2019-10-24 12:20:06 +07:00 |
|
hathach
|
6183dbd0ce
|
add -Wextra for more warnings to example
non-stack warning (probably mcu driver) should be suppressed in the
board.mk
|
2019-09-27 00:15:43 +07:00 |
|
Nathan Conrad
|
f830f6956e
|
Correct port assigned on the STM32F070 BSP
|
2019-09-12 14:53:53 -04:00 |
|
hathach
|
ff7261600c
|
ported stm32f2, added board stm32f207zg nucleo
close #127
|
2019-09-12 10:41:03 +07:00 |
|
hathach
|
3f02c35983
|
fix #130
|
2019-09-11 11:55:16 +07:00 |
|
Nathan Conrad
|
4f6bedeac9
|
Rename the STM32 MCU options.
|
2019-09-10 12:57:43 -04:00 |
|
Nathan Conrad
|
65e72de7ce
|
Move interrupt handler into device driver, and rename the OPT_MCU_STM32 constants.
|
2019-09-10 09:35:52 -04:00 |
|
Nathan Conrad
|
2cf2f35fa3
|
Correct JLINK_DEVICE and FREERTOS_PORT in F070RB make file. FreeRTOS and j-link are untested.
|
2019-09-10 08:28:56 -04:00 |
|
Nathan Conrad
|
f7b0aeec52
|
Start clock on F0 and F0, and handle USB interrupts.
|
2019-09-09 19:20:26 -04:00 |
|
Nathan Conrad
|
d1976a30b3
|
Update F3 BSP and create F070RB BSP. Both are untested (but compile).
|
2019-09-09 16:14:38 -04:00 |
|