hathach
a68c53fb8e
clean up, add typdef for dwc2 type for device
2024-11-14 17:34:14 +07:00
hathach
daef846aa7
rename CFG_TUD_DWC2_DMA to CFG_TUD_DWC2_DMA_ENABLE
2024-11-14 13:26:11 +07:00
hathach
c8d104fb47
fix warnings
2024-11-08 21:55:23 +07:00
hathach
b7ff10f59c
rename and add both CFG_TUH_DWC2_SLAVE_ENABLE/CFG_TUH_DWC2_DMA_ENABLE better out dma handle
2024-11-01 17:54:10 +07:00
hathach
3c1cb0e08f
correct the fifo_available comparison (words not byte)
2024-10-29 22:48:58 +07:00
hathach
dd99da9dce
implement hcd_edpt_abort_xfer, hcd_device_close,
...
check request queue available before making usb attempt. Though there is no handling when queue is full.
device_info example work well
2024-10-28 17:45:44 +07:00
hathach
79c0a249e8
got In transfer working, able to get 1st device descriptor and set address
2024-10-25 22:56:25 +07:00
hathach
07abc722b6
hcd able to send setup packet
2024-10-25 19:00:45 +07:00
hathach
063661e3a3
more progress on dwc2 hcd, initial code for edpt xfer
2024-10-25 00:20:34 +07:00
hathach
f5978876d2
get hprt interrupt triggered
2024-10-21 11:43:37 +07:00
hathach
b5a4f18879
get hpri triggered
2024-10-17 15:56:12 +07:00
hathach
8d9d3d9a2a
move gahbcfg/gintmsk with dma to dwc2 common
2024-10-16 13:19:28 +07:00
hathach
4012e15075
move core init code to dwc2 common. update/correct build for esppressif
2024-10-15 17:55:24 +07:00
hathach
10a3aa3cc8
adding hcd dwc2
2024-10-15 13:03:12 +07:00
hathach
e83e08343a
change dcd_init() return from void to bool
2024-10-14 19:42:22 +07:00
hathach
1f18be93db
change the tusb_rhport_init_t struct, exclude the rhport to make API more consistent
2024-10-14 18:27:52 +07:00
hathach
d997f0071e
change dcd_init() to take rhport struct
2024-10-11 15:31:49 +07:00
hathach
1406ad84e3
remove debug code
2024-10-10 11:05:32 +07:00
hathach
98e94a5d6d
enhance dwc2
2024-10-10 00:08:46 +07:00
hathach
599bb0c822
improving dwc2, merging diep and doep if possible
2024-10-10 00:08:45 +07:00
hathach
b2a98eadab
add stm32f769disco to hil pool
2024-10-10 00:08:45 +07:00
hathach
87f1993304
esp32p4 use port0 as fs, port1 as highspeed
2024-09-30 11:53:19 +07:00
hathach
67e5577b42
added p4, seems to work well and enumerated
2024-09-30 11:53:18 +07:00
hathach
bb2d1dd0c1
update/rename ghwcfg registers
2024-09-30 11:53:17 +07:00
hathach
6a15e7875c
more rename
2024-09-24 18:12:01 +07:00
hathach
a1244381b3
add CFG_TUD_DWC2_DMA, make it compile time option
2024-09-24 17:55:15 +07:00
hathach
86b4608365
update dfifo allocation scheme to use top pointer, update document and explanation for EPInfo address and GDFIFO.
...
some function rename
update h743 linker to use SRAM1 since USB DMA cannot access DTCM ram
update xmc4500 to use uuid for testing
2024-09-24 17:38:31 +07:00
HiFiPhile
7867464694
Merge branch 'master' into dwc2_dma
2024-09-08 17:15:28 +02:00
hathach
0bb7b992d8
dwc2: for esp32 force disconnect/connect using USB_WRAP otg pad override (DM=DP=0) in addition to dwc2's dctrl
2024-09-04 20:56:04 +07:00
hathach
4ce1cce40a
simplify dwc2 test mode
...
- all dwc2 ip seems to support test mode in both fs/hs -> remove TUP_USBIP_DWC2_TEST_MODE
- remove dcd_check_test_mode_support(), all should be supported
- move enum tusb_feature_test_mode_t to tusb_types.h
2024-07-12 20:17:14 +07:00
HiFiPhile
6d4e2f6c16
Fix GenID 3.10 issue on STM32L4.
2024-06-27 22:02:18 +02:00
HiFiPhile
eefca229b6
Merge branch 'master' of https://github.com/hathach/tinyusb into dwc2_dma
2024-06-27 20:49:40 +02:00
HiFiPhile
ad734e658c
Remove dead code.
2024-05-13 22:27:33 +02:00
HiFiPhile
e250b82377
Adjust logic.
2024-05-13 22:26:19 +02:00
HiFiPhile
0fce7d1f54
Merge branch 'master' into test-mode-support
2024-05-13 21:08:11 +02:00
HiFiPhile
02ec486610
Fix spurious EP0 completion.
2024-05-05 22:01:09 +02:00
HiFiPhile
8765568282
Change DMA condition.
2024-04-25 23:26:19 +02:00
HiFiPhile
298f7f2d81
Fix DMA FIFO reservation.
2024-04-25 23:23:43 +02:00
HiFiPhile
394dc0686a
Check IN ep count limit.
2024-04-25 22:44:48 +02:00
HiFiPhile
cde722385c
dwc2: add dma support.
2024-04-25 22:44:48 +02:00
HiFiPhile
c2f836279e
Disable EPs correctly to clear incomplete transfer.
2024-04-25 11:51:06 +07:00
hathach
0f3d6c61b5
port clang stm32: f1, f2, f3
2024-04-23 12:04:08 +07:00
hathach
3442a87d5b
- clang h743 build and run cdc_msc ok
...
- switch unit test back to gcc, since path to clang conflict on local setup (x86 and arm)
2024-04-19 23:16:57 +07:00
hathach
e1c3b5aeab
minor update to sof
2024-04-16 10:57:54 +07:00
hathach
79cbe93fcf
separate flush tx/rx fifo
2024-04-11 11:02:54 +07:00
HiFiPhile
03cfe90f3e
flush fifo in dcd_edpt_close_all()
2024-04-10 22:21:53 +02:00
hathach
724ef1af8d
set txfifo empty level to complete and change back fifo tx to normal size
2024-04-10 09:58:43 +07:00
hathach
2bce68a065
Merge branch 'master' into dwc2-interrupts
2024-04-09 22:04:43 +07:00
HiFiPhile
e160366a1e
dwc2: remove fifo free code.
2024-04-05 19:12:28 +02:00
hathach
85420c61c7
minor clean up
2024-03-31 13:49:41 +07:00
