Commit Graph

1826 Commits

Author SHA1 Message Date
hathach
b7ff10f59c rename and add both CFG_TUH_DWC2_SLAVE_ENABLE/CFG_TUH_DWC2_DMA_ENABLE better out dma handle 2024-11-01 17:54:10 +07:00
hathach
4c8ce9733a dma host work well with bulk/control 2024-11-01 16:55:12 +07:00
hathach
f7f80e844c do ping for slave out when nak/nyet 2024-10-31 23:22:49 +07:00
hathach
9afa64014c testing hcd with dma, work well after enumeration. 2024-10-31 21:37:57 +07:00
hathach
92e7ac6c23 fix bulk out and txfifo_empty(), should not rely on hcchar_bm.ep_size for OUT. msc explorer seems to work well. 2024-10-31 10:50:09 +07:00
hathach
80d8157048 handle out nak slave -> halted -> retry transfer 2024-10-30 18:11:41 +07:00
hathach
3c1cb0e08f correct the fifo_available comparison (words not byte) 2024-10-29 22:48:58 +07:00
hathach
616b5770f2 fix pid token calculation, implement hcd_edpt_clear_stall(). msc explorer example read work, but write10 still wip 2024-10-29 21:54:21 +07:00
hathach
074811c251 refactor channel_send_in_token(), support IN token for multiple transaction per transfer 2024-10-29 19:08:45 +07:00
hathach
df55d587df update handle in/out, separate allocated and xfer result to make it easier to manage. Fix channel disable/deallocated. 2024-10-29 18:23:56 +07:00
hathach
1e164412bf split handle channel slave out/in 2024-10-29 16:06:44 +07:00
hathach
cef9bab4b5 minor clean up 2024-10-29 15:07:28 +07:00
hathach
4797c4f508 fix nptx fifo empty handling 2024-10-29 14:47:44 +07:00
hathach
c93d3eda5f restructure, add hcd endpoint, xfer to minimize footprint for managing xfer. 2024-10-29 13:01:48 +07:00
hathach
f953b6bf92 minor rename 2024-10-28 18:40:21 +07:00
hathach
dd99da9dce implement hcd_edpt_abort_xfer, hcd_device_close,
check request queue available before making usb attempt. Though there is no handling when queue is full.
device_info example work well
2024-10-28 17:45:44 +07:00
hathach
79c0a249e8 got In transfer working, able to get 1st device descriptor and set address 2024-10-25 22:56:25 +07:00
hathach
07abc722b6 hcd able to send setup packet 2024-10-25 19:00:45 +07:00
hathach
063661e3a3 more progress on dwc2 hcd, initial code for edpt xfer 2024-10-25 00:20:34 +07:00
hathach
8461525d48 add tusb_time_millis(), able to reset and enable dwc2 port and get SOF active 2024-10-21 18:18:33 +07:00
hathach
f5978876d2 get hprt interrupt triggered 2024-10-21 11:43:37 +07:00
hathach
b5a4f18879 get hpri triggered 2024-10-17 15:56:12 +07:00
hathach
8d9d3d9a2a move gahbcfg/gintmsk with dma to dwc2 common 2024-10-16 13:19:28 +07:00
hathach
4012e15075 move core init code to dwc2 common. update/correct build for esppressif 2024-10-15 17:55:24 +07:00
hathach
10a3aa3cc8 adding hcd dwc2 2024-10-15 13:03:12 +07:00
hathach
e83e08343a change dcd_init() return from void to bool 2024-10-14 19:42:22 +07:00
hathach
1f18be93db change the tusb_rhport_init_t struct, exclude the rhport to make API more consistent 2024-10-14 18:27:52 +07:00
hathach
1587d48e89 hcd_init() take init struct 2024-10-11 17:53:39 +07:00
hathach
f3b7d7515e fix fuzzing build 2024-10-11 16:00:51 +07:00
hathach
d997f0071e change dcd_init() to take rhport struct 2024-10-11 15:31:49 +07:00
hathach
1406ad84e3 remove debug code 2024-10-10 11:05:32 +07:00
hathach
98e94a5d6d enhance dwc2 2024-10-10 00:08:46 +07:00
hathach
07c14f30a6 add f407disco to hil pool 2024-10-10 00:08:46 +07:00
hathach
599bb0c822 improving dwc2, merging diep and doep if possible 2024-10-10 00:08:45 +07:00
hathach
b2a98eadab add stm32f769disco to hil pool 2024-10-10 00:08:45 +07:00
hathach
cb5e273e9a enhance dwc2 markdown with field mapping 2024-10-10 00:08:41 +07:00
Ha Thach
a13dbd4452 Merge pull request #2809 from shuffle2/master
make all python files executable and standardize interpreter
2024-10-07 11:11:54 +07:00
hathach
73f7ce7103 U0 does not have dwc2 controller 2024-10-04 17:26:14 +07:00
hathach
db15f63736 Merge branch 'master' into fork/Maerdl/master 2024-10-02 18:22:06 +07:00
Haefner, Martin
3fa7da95bd support stm32U0 device 2024-10-01 15:24:11 +02:00
hathach
87f1993304 esp32p4 use port0 as fs, port1 as highspeed 2024-09-30 11:53:19 +07:00
hathach
67e5577b42 added p4, seems to work well and enumerated 2024-09-30 11:53:18 +07:00
hathach
bb2d1dd0c1 update/rename ghwcfg registers 2024-09-30 11:53:17 +07:00
hathach
47233f863a update to dwc2 register struct 2024-09-30 11:53:17 +07:00
hathach
6a15e7875c more rename 2024-09-24 18:12:01 +07:00
hathach
a1244381b3 add CFG_TUD_DWC2_DMA, make it compile time option 2024-09-24 17:55:15 +07:00
hathach
86b4608365 update dfifo allocation scheme to use top pointer, update document and explanation for EPInfo address and GDFIFO.
some function rename
update h743 linker to use SRAM1 since USB DMA cannot access DTCM ram
update xmc4500 to use uuid for testing
2024-09-24 17:38:31 +07:00
Shawn Hoffman
616532892d make all python files executable and standardize interpreter 2024-09-17 12:17:12 -07:00
HiFiPhile
7867464694 Merge branch 'master' into dwc2_dma 2024-09-08 17:15:28 +02:00
hathach
0bb7b992d8 dwc2: for esp32 force disconnect/connect using USB_WRAP otg pad override (DM=DP=0) in addition to dwc2's dctrl 2024-09-04 20:56:04 +07:00