hathach
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7187cd9a85
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fix ci, remove use of CFG_TUSB_RHPORT0_MODE in bsp
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2022-06-06 12:51:10 +07:00 |
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hathach
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7ab3da1e03
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same70 xplained uart via edbg work with board_test
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2020-11-09 01:01:05 +07:00 |
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hathach
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50be9d7c3a
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mass rename tud/dcd_irq_handler to tud/dcd_init_handler
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2020-04-17 12:27:53 +07:00 |
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hathach
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dc4bf02dcb
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mass rename tud_isr to tud_irq_handler
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2020-04-06 17:04:49 +07:00 |
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hathach
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487b887f80
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freertos demo use static only for most optmized sram
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2020-03-11 00:09:37 +07:00 |
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hathach
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85a3315a99
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Adding lwip_webserver to ci
- buil_al.py skip specific MCU if .skip.MCU_ exists
- reduce stm32f070 heap & stack size to compile webserver
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2020-03-09 15:51:29 +07:00 |
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hathach
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bc21714c7e
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detect bus reset
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2019-11-27 14:49:19 +07:00 |
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hathach
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745f0b4521
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clean up
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2019-11-27 11:02:24 +07:00 |
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hathach
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4c9c13c767
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add uart sync support
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2019-11-26 18:21:46 +07:00 |
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hathach
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387384c0d9
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fix samg55 with newlib missing end symbol
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2019-11-26 17:39:51 +07:00 |
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hathach
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c691dc4cb2
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update
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2019-11-25 10:42:32 +07:00 |
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hathach
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58e8265964
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usb hw init OK
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2019-11-24 23:46:28 +07:00 |
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hathach
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8cd19f88b9
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clean up
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2019-11-04 22:03:31 +07:00 |
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hathach
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6baa79b330
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board test works
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2019-11-04 14:54:04 +07:00 |
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