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1244 Commits

Author SHA1 Message Date
Kate Temkin
9181ce55fb add BSP for Great Scott Gadgets' LUNA boards (SAMD21) 2020-07-14 21:51:31 -06:00
hathach
0fd074afd8 change REDUCE_SPEED=0/1 to explicitly SPEED=high/full 
update readme, boards.md to add link to new stm boards
 2020-07-08 16:29:48 +07:00
Uwe Bonnes
8f433e67ac Add stm32l4r5nucleo. USB and UARTwork. 
USB runs from LSE stabilized MSI48
LPUART on PORTG needs VDDIO2 enabled.
 2020-07-03 16:34:08 +02:00
Uwe Bonnes
11c6d4cdae stlinkv3mini: Only OTG_HS has connector. 2020-07-03 10:59:02 +02:00
Uwe Bonnes
5c24d5ca72 stm32h745disco: HAL_PWREx_EnableUSBVoltageDetector() is needed for hot replug. 2020-07-03 10:53:51 +02:00
Uwe Bonnes
4b7539bd63 stm32h745disco: Only OTG_FS is available. Does not enumerate on replug yet. 2020-07-03 10:53:51 +02:00
Uwe Bonnes
fd38178189 STM32/OTG_HS: Allow OTG_HS port to run at FS speed. 
Add "REDUCE_SPEED=1" to the compile options.
 2020-07-03 10:52:57 +02:00
hathach
4cec866994 correct HSE_VALUE in hal_conf 
- although it is define in CFLAGS, it is worth to correct to be
consistent with other build
- extract set_speed()
 2020-07-02 14:57:00 +07:00
hathach
9a290febcd change default port some stm bsp 
- f769disco default port is highspeed port1
- remove PORT0 on stlink since the board only populated HS connector
 2020-07-02 11:58:40 +07:00
hathach
c2289777f7 Merge branch 'add-stm-hs' of github.com:hathach/tinyusb into add-stm-hs 2020-07-01 23:53:33 +07:00
Uwe Bonnes
5b3a67a1e2 Add bsp for stlinkv3mini. 2020-07-01 15:42:53 +02:00
hathach
77315ba7ce added uart for h743 2020-07-01 18:27:48 +07:00
hathach
a512a31c9d Merge branch 'master' into add-stm-hs 2020-07-01 17:58:02 +07:00
Ha Thach
530b0099a5 Merge pull request #439 from UweBonnes/add-stm-hs 
Add stm hs
 2020-07-01 13:09:07 +07:00
hathach
463e978134 added DA14695 DK USB bsp 2020-07-01 12:47:14 +07:00
hathach
2f946e765d rename file 2020-07-01 12:42:12 +07:00
hathach
0477446224 more clean up 2020-06-30 16:31:59 +07:00
hathach
f3a88477dc revert rhport config in nxp mcus 2020-06-30 16:18:43 +07:00
Uwe Bonnes
30a18e2605 stm32f723disco: USB HS enumerates. 2020-06-30 11:07:53 +02:00
Uwe Bonnes
f6660c39a1 Add Stm32F7xxdisco board support files 
Status with examples/device/cdc_msc:
- make BOARD=stm32f723disco        => OK
- make BOARD=stm32f723disco PORT=1 => No Reaction
- make BOARD=stm32f746disco        => OK
- make BOARD=stm32f746disco PORT=1 => Hangs during enumeration
- make BOARD=stm32f769disco        => Hangs during enumeration
 2020-06-30 11:02:38 +02:00
Uwe Bonnes
4b7f848e1f stm32h743nucleo: Enable Log via STLINK-VCP. 2020-06-30 11:01:44 +02:00
hathach
ab75998316 Merge branch 'master' into add-stm-hs 2020-06-30 01:55:57 +07:00
Ha Thach
05996aee64 Merge pull request #427 from kasjer/kasjer/add-da1469x-support 
Support for DA1469x MCU from Dialog Semiconductor
 2020-06-30 01:20:56 +07:00
Ha Thach
2b9466dbc0 Merge pull request #445 from hathach/add-kaluga-bsp 
added esp32s2 kaluga bsp
 2020-06-29 19:16:09 +07:00
hathach
2dff40236c add kaluga files 2020-06-29 18:40:23 +07:00
hathach
50b569ad1b added esp32s2 kaluga bsp 2020-06-29 16:52:08 +07:00
Jerzy Kasenberg
8e143fc962 Add board support for Dialog DA1469x-dk-pro 
This adds source files that allow to run TinyUSB stack on DA1469x-dk-pro board.
Source files .c .S and .ld are taken from Apache Mynewt repository.
Those files were stripped to allow starting board without Mynewt os.
 2020-06-29 11:02:32 +02:00
Czeslaw Makarski
7c94176b4b Update NRFX to v2.2.0 2020-06-24 15:07:28 +02:00
hathach
667eaa6dd6 fix stm32h743 priority with freeRTOS 2020-06-16 00:03:52 +07:00
hathach
0bfa839ac0 clean up, update other example config 2020-06-15 23:06:17 +07:00
hathach
a347de6e50 revert CFG_TUSB_RHPORT0_MODE to previous way 2020-06-14 18:28:45 +07:00
Jerzy Kasenberg
56f3898ced Add Dialog DA1469x register definition file 
Register definition file along with some MCU headers was taken
from Dialog SDK for DA1469x MCUs.
Those files are needed for USB port.
 2020-06-09 12:55:28 +02:00
hathach
e92118635c adding speed detect on bus reset 2020-06-01 13:40:18 +07:00
hathach
5ffba8536d able to detect as hs 2020-05-31 19:41:22 +07:00
hathach
e0490ae786 fix idf usb pin init changes 2020-05-29 13:06:33 +07:00
hathach
227bffe04b adding h743 uart, but not enabled yet since it conflict with OTG_FS2 2020-05-27 01:14:52 +07:00
hathach
0482f0d686 update h743eval with rhport=1 highspeed 2020-05-26 22:15:00 +07:00
hathach
fad088719e merge CFG_TUSB_RHPORT1_MODE into CFG_TUSB_RHPORT0_MODE 
each port is 1 byte for easy maintenance
 2020-05-26 15:21:23 +07:00
hathach
62a746bdc7 wip 2020-05-26 12:18:36 +07:00
hathach
ba9c774a2a board test work fine 2020-05-23 13:29:30 +07:00
hathach
4c01099a3d update makefile to build with ohci host 
update ses project for lpc1769 with rtt
 2020-05-22 20:57:52 +07:00
hathach
f308990ab5 Merge branch 'master' into update-host 2020-05-22 15:28:22 +07:00
hathach
58cedf4c06 usb0 host on mcb1800 work with fullspeed mode. 
use usbh_edpt_open() to correctly map ep2drv[]
 2020-05-19 00:55:43 +07:00
hathach
550746097b fix cast-align warning for nuc505 2020-05-18 13:03:41 +07:00
hathach
1a8ce043ed enable -Wcast-align 
suppress vendor sdk driver at board.mk
 2020-05-17 14:24:15 +07:00
Mark Olsson
3c43009278 Add support for stm32f746nucleo board 2020-05-15 10:23:01 +02:00
Jerzy Kasenberg
615369a6eb stm32l476disco: Fix system clock setup 
Code suggested that PLL with MSI is used resulting in 80MHz clock.
When in fact PLL was not configured and system clock was left at MSI 48MHz.

This happens because PLL configuration requires that SysTick interrupt
has interrupt priority level configured correctly.
As it seems ST code intentionally setups variable uwTickPrio to invalid
value and later when it is not setup by user code configuration
of oscillator will fail before PLL is configured.

This simple changes systick priority to some valid value that
allows clock to use PLL.
 2020-05-06 15:13:55 +02:00
Jerzy Kasenberg
d9e534f6f2 stm32l476disco: fix uninitialized filed usage 
Field PLLState was not initialized in RCC_OscInitStruct.PLL in
function SystemClock_Config().
Value is used in HAL_RCC_OscConfig() regardless of oscillator.
In lucky case value would be 0 RCC_PLL_NONE and nothing would
happen.
If value was incorrect following line would end up in assert:
assert_param(IS_RCC_PLL(RCC_OscInitStruct->PLL.PLLState));

If value was valid but no RCC_PLL_NONE pll could be configured
with some other random values.

Setting PLLState to RCC_PLL_NONE eliminates potential problem.
 2020-05-06 14:25:46 +02:00
hathach
905a80d1b2 temporarily remove osal_task_delay() from osal 
- add hcd_uframe_number() API, update EHCI to return uframe number
- get host running on ea4357
 2020-05-04 14:11:58 +07:00
hathach
4a3a448340 clean up things, add makefile for host example 2020-05-04 00:29:52 +07:00