Commit Graph

1736 Commits

Author SHA1 Message Date
hathach
1ea38ebe13 refactor read/write pma from/to fifo 2024-08-08 15:43:11 +07:00
hathach
bd64625df2 revert the use of EP_KIND. ch32v203 seems to unconditionally accept ZLP on EP0 OUT, which can incorrectly use queued_len of previous transfer. So reset total_len and queued_len to 0. 2024-08-08 12:40:11 +07:00
hathach
57c26fdc72 use EP_KIND for STATUS OUT to fix OUT packet is auto accepted after SETUP without usbd consent 2024-08-08 00:27:51 +07:00
hathach
3a22163067 fix v203 race condition between rx bufsize and RX_STAT which cause PMAOVR
fix set_rx_bufsize with invalid value for zero length packet
2024-08-07 15:16:22 +07:00
hathach
0860cd3b5e minor rename 2024-08-06 22:20:24 +07:00
hathach
d680424f62 improve dcd_int_handler()
- skip DIR and use CTR TX/RX to handle complete transfer
- clear CTR first, except for setup which we need to get data first
- separate handle_ctr_setup()
2024-08-06 22:18:25 +07:00
hathach
315dae6a85 finally fixed fsdev setup handling, which cause race condition for ch32v203 2024-08-05 17:43:27 +07:00
hathach
91e5a066c5 more fsdev clean up
hil test boards in parallel
2024-08-02 17:12:28 +07:00
hathach
e180d915c6 read/write packet enhancement, merge 16-bit and 32-bit together 2024-08-01 23:08:12 +07:00
hathach
af8609e96e fsdev improve ep bit manipulation 2024-08-01 18:36:28 +07:00
hathach
332f75cd44 simplify read/write 16-bit packet 2024-07-31 20:53:42 +07:00
hathach
7d9b399466 fix ep type bulk typo 2024-07-31 18:28:17 +07:00
hathach
7954d9cb4c rename to fsdev_type.h, use FSDDEV_REG instead of USB 2024-07-31 18:15:22 +07:00
hathach
26b0df2c26 refactor xfer_ctl_ptr() to take epnum/dir to reduce computation 2024-07-31 17:24:41 +07:00
hathach
ce0fdc5609 refactor dcd_ep_ctr_handler 2024-07-31 17:10:43 +07:00
hathach
ee831d27ac rename to ep_read/write(), drop USBx argument 2024-07-31 16:56:42 +07:00
hathach
3156f1c4a7 remove all pcd ep read, modify write 2024-07-31 16:52:00 +07:00
hathach
8139840d7a fix ep_add_dtog() 2024-07-31 15:32:37 +07:00
hathach
76cc721e8f clean up dcd_edpt_stall/clear_statll 2024-07-31 12:45:27 +07:00
hathach
e60efec6b7 improve using ep_add_status/ep_add_dtog 2024-07-31 12:09:50 +07:00
hathach
126778298e enhance dcd_ep_ctr_rx_handler() 2024-07-31 11:35:09 +07:00
hathach
0c8d41e25e correct ep toggle bit 2024-07-31 09:46:31 +07:00
hathach
f4aaad6869 add edpt0_open(), slightly update dtog 2024-07-30 21:35:24 +07:00
hathach
1cf8e34ae5 improve set endpoint 2024-07-30 20:32:26 +07:00
hathach
b15814b2f9 move align buffer to pma_alloc() 2024-07-30 16:29:54 +07:00
hathach
749f092174 refactor btable_set_rx_bufsize() 2024-07-30 13:05:46 +07:00
hathach
6771ef35d9 more btable set/get clean up 2024-07-30 11:17:55 +07:00
hathach
75d3a3be84 implement btable_set_addr/count 2024-07-26 00:02:06 +07:00
hathach
3b8f9a2b1f refactor btable tx/rx into arr[2] 2024-07-25 23:51:20 +07:00
hathach
02caf00772 simplify btable rx/tx count/address access 2024-07-25 19:00:59 +07:00
hathach
0eb0baed19 fsdev: remove unused _setup_packet 2024-07-25 11:53:42 +07:00
hathach
2f8078f5b5 minor changes 2024-07-24 16:59:12 +07:00
hathach
c0f38ebf8d fsdev read/write packet use unaligned function 2024-07-23 19:53:41 +07:00
hathach
4de46fcf97 fix a bug in fsdev introduced by #1942 2024-07-22 21:07:28 +07:00
Liam Fraser
3804ab9a67 RP2040: no need to clear usb_hw (usb registers) as they are reset to default state by a hardware reset 2024-07-17 15:47:00 +01:00
Liam Fraser
770efd9b46 RP2040: Use our own unaligned memcpy to avoid alignment faults with some memcpy implementations 2024-07-17 15:47:00 +01:00
hathach
4ce1cce40a simplify dwc2 test mode
- all dwc2 ip seems to support test mode in both fs/hs -> remove TUP_USBIP_DWC2_TEST_MODE
- remove dcd_check_test_mode_support(), all should be supported
- move enum tusb_feature_test_mode_t to tusb_types.h
2024-07-12 20:17:14 +07:00
Ha Thach
13dedddd19 Merge pull request #2686 from hathach/add-host-devinfo 2024-06-25 15:29:17 +07:00
Ha Thach
044f4d1801 Merge pull request #2676 from Okarss/fsdev_documentation
[FSDEV] Update the STM32 documentation
2024-06-21 20:45:44 +07:00
Andrew Leech
0d79da37e7 synopsys/dwc2_esp32: Add header for vTaskDelay. 2024-06-20 15:18:41 +10:00
Okarss
5083d1eb33 Update Host mode information for FSDEV devices 2024-06-18 12:12:44 +03:00
hathach
d945261aef LOG3 in isr 2024-06-18 12:53:57 +07:00
Ha Thach
007a8bd46d Merge pull request #2672 from tinic/master
Add support for STM32U535xx/STM32U545xx
2024-06-15 10:56:24 +07:00
Okarss
5f060a357d Update the STM32 documentation 2024-06-14 21:23:17 +03:00
Okarss
fb6a6acbff Revert the DSB because of RISC-V 2024-06-14 18:39:48 +03:00
Okarss
00062ddb0c [STM32 FSDEV] Simplify toggle bit logic 2024-06-14 18:16:09 +03:00
hathach
9ae0053573 newline 2024-06-14 16:08:26 +07:00
hathach
33f5547ed4 add ch32v103 bsp support, compile but does not run, probably due to compile/linker issue 2024-06-14 16:06:37 +07:00
hathach
2ed027f2bd use stock core_riscv.h for ch32 v2 v3 2024-06-14 12:51:28 +07:00
Tinic Uro
28c2433375 Add stm32u545nucleo board. 2024-06-12 08:08:25 -07:00