hathach
|
dd99da9dce
|
implement hcd_edpt_abort_xfer, hcd_device_close,
check request queue available before making usb attempt. Though there is no handling when queue is full.
device_info example work well
|
2024-10-28 17:45:44 +07:00 |
|
hathach
|
79c0a249e8
|
got In transfer working, able to get 1st device descriptor and set address
|
2024-10-25 22:56:25 +07:00 |
|
hathach
|
07abc722b6
|
hcd able to send setup packet
|
2024-10-25 19:00:45 +07:00 |
|
hathach
|
063661e3a3
|
more progress on dwc2 hcd, initial code for edpt xfer
|
2024-10-25 00:20:34 +07:00 |
|
hathach
|
8461525d48
|
add tusb_time_millis(), able to reset and enable dwc2 port and get SOF active
|
2024-10-21 18:18:33 +07:00 |
|
hathach
|
f5978876d2
|
get hprt interrupt triggered
|
2024-10-21 11:43:37 +07:00 |
|
hathach
|
b5a4f18879
|
get hpri triggered
|
2024-10-17 15:56:12 +07:00 |
|
hathach
|
8d9d3d9a2a
|
move gahbcfg/gintmsk with dma to dwc2 common
|
2024-10-16 13:19:28 +07:00 |
|
hathach
|
4012e15075
|
move core init code to dwc2 common. update/correct build for esppressif
|
2024-10-15 17:55:24 +07:00 |
|
hathach
|
10a3aa3cc8
|
adding hcd dwc2
|
2024-10-15 13:03:12 +07:00 |
|
hathach
|
e83e08343a
|
change dcd_init() return from void to bool
|
2024-10-14 19:42:22 +07:00 |
|
hathach
|
1f18be93db
|
change the tusb_rhport_init_t struct, exclude the rhport to make API more consistent
|
2024-10-14 18:27:52 +07:00 |
|
hathach
|
1587d48e89
|
hcd_init() take init struct
|
2024-10-11 17:53:39 +07:00 |
|
hathach
|
f3b7d7515e
|
fix fuzzing build
|
2024-10-11 16:00:51 +07:00 |
|
hathach
|
d997f0071e
|
change dcd_init() to take rhport struct
|
2024-10-11 15:31:49 +07:00 |
|
hathach
|
1406ad84e3
|
remove debug code
|
2024-10-10 11:05:32 +07:00 |
|
hathach
|
98e94a5d6d
|
enhance dwc2
|
2024-10-10 00:08:46 +07:00 |
|
hathach
|
07c14f30a6
|
add f407disco to hil pool
|
2024-10-10 00:08:46 +07:00 |
|
hathach
|
599bb0c822
|
improving dwc2, merging diep and doep if possible
|
2024-10-10 00:08:45 +07:00 |
|
hathach
|
b2a98eadab
|
add stm32f769disco to hil pool
|
2024-10-10 00:08:45 +07:00 |
|
hathach
|
cb5e273e9a
|
enhance dwc2 markdown with field mapping
|
2024-10-10 00:08:41 +07:00 |
|
Ha Thach
|
a13dbd4452
|
Merge pull request #2809 from shuffle2/master
make all python files executable and standardize interpreter
|
2024-10-07 11:11:54 +07:00 |
|
hathach
|
73f7ce7103
|
U0 does not have dwc2 controller
|
2024-10-04 17:26:14 +07:00 |
|
hathach
|
db15f63736
|
Merge branch 'master' into fork/Maerdl/master
|
2024-10-02 18:22:06 +07:00 |
|
Haefner, Martin
|
3fa7da95bd
|
support stm32U0 device
|
2024-10-01 15:24:11 +02:00 |
|
hathach
|
87f1993304
|
esp32p4 use port0 as fs, port1 as highspeed
|
2024-09-30 11:53:19 +07:00 |
|
hathach
|
67e5577b42
|
added p4, seems to work well and enumerated
|
2024-09-30 11:53:18 +07:00 |
|
hathach
|
bb2d1dd0c1
|
update/rename ghwcfg registers
|
2024-09-30 11:53:17 +07:00 |
|
hathach
|
47233f863a
|
update to dwc2 register struct
|
2024-09-30 11:53:17 +07:00 |
|
hathach
|
6a15e7875c
|
more rename
|
2024-09-24 18:12:01 +07:00 |
|
hathach
|
a1244381b3
|
add CFG_TUD_DWC2_DMA, make it compile time option
|
2024-09-24 17:55:15 +07:00 |
|
hathach
|
86b4608365
|
update dfifo allocation scheme to use top pointer, update document and explanation for EPInfo address and GDFIFO.
some function rename
update h743 linker to use SRAM1 since USB DMA cannot access DTCM ram
update xmc4500 to use uuid for testing
|
2024-09-24 17:38:31 +07:00 |
|
Shawn Hoffman
|
616532892d
|
make all python files executable and standardize interpreter
|
2024-09-17 12:17:12 -07:00 |
|
HiFiPhile
|
7867464694
|
Merge branch 'master' into dwc2_dma
|
2024-09-08 17:15:28 +02:00 |
|
hathach
|
0bb7b992d8
|
dwc2: for esp32 force disconnect/connect using USB_WRAP otg pad override (DM=DP=0) in addition to dwc2's dctrl
|
2024-09-04 20:56:04 +07:00 |
|
Ha Thach
|
29e025cbf5
|
Merge pull request #2731 from cumhuronat/master
Fix: Properly Handle NAK Response in MAX3421E driver
|
2024-08-30 18:10:15 +07:00 |
|
Ha Thach
|
64e62bad0d
|
Merge pull request #2784 from tannewt/fix_esp32_sx_resume
Fix ESP32-SX resume
|
2024-08-30 09:50:35 +07:00 |
|
Scott Shawcroft
|
6890975f80
|
Fix ESP32-SX resume
The interrupt handler pipes through the resume event but the
interrupt wasn't enabled in the first place.
|
2024-08-29 14:04:49 -07:00 |
|
Reinhard Griech
|
1d2c9f929d
|
change order, fixes #2778
|
2024-08-29 15:31:29 +02:00 |
|
hathach
|
27ddf19631
|
add sndfifo owner info to skip rewriting data for retrying NAKed
|
2024-08-26 14:27:23 +07:00 |
|
Cumhur Onat
|
c7851e8dcb
|
only check SNDBAV IRQ if there is data to send
|
2024-08-23 10:54:28 +07:00 |
|
Cumhur Onat
|
5bb2e66ce7
|
fix for out retry attempts with nak response
|
2024-08-23 10:54:28 +07:00 |
|
hathach
|
ea4f9ceb58
|
remove weak from dcd_edpt_close() for port without TUP_DCD_EDPT_ISO_ALLOC
|
2024-08-19 20:08:55 +07:00 |
|
hathach
|
0c9d7a2185
|
add hwfifo_flush()
|
2024-08-19 13:11:48 +07:00 |
|
hathach
|
8fdd8d9a7b
|
implement dcd_edpt_iso_alloc/dcd_edpt_iso_activate for musb. video_capture example with iso kind of work but not smoothly. audio example does not seems to work as expected
|
2024-08-19 12:04:24 +07:00 |
|
hathach
|
76eb2f5066
|
more musb update
|
2024-08-18 16:34:58 +07:00 |
|
hathach
|
fe7ffc8eda
|
rename register bit definition to prevent conflict
|
2024-08-17 19:08:48 +07:00 |
|
hathach
|
123830c1f0
|
remove unused register def
|
2024-08-17 19:06:19 +07:00 |
|
hathach
|
993473312b
|
minor update
|
2024-08-17 17:11:54 +07:00 |
|
hathach
|
e9109f36ba
|
refactor fifo configure/setup for dynamic and static fifo
|
2024-08-17 16:37:27 +07:00 |
|