andy/tinyUSB
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Commit Graph

1355 Commits

Author SHA1 Message Date
hathach
af59864ab5 Merge branch 'master' into feature/STM32G0 2023-06-01 13:28:28 +07:00
Ha Thach
eedafb23f7 Merge pull request #2063 from abakosh/develop 
fix(RA Host Portable): implement missing function __builtin_ctz(x)
 2023-05-24 20:11:50 +07:00
Aladdin Bakosh
57d2eb603b fix(RA Host Portable): implement missing function __builtin_ctz(x) for IAR 2023-05-24 11:38:40 +02:00
Ha Thach
1ef820ecfe Enhance chipidea (#2075) 
* update chipidea dcd, remove manual ep_count and use DCCPARAMS to get number of endpoint instead
* add dcd dcache for chipidea
* add cmake for lpc18
* add makefile build for mcx
* use fork of mcu sdk
* fix ci build with nrf
* flash rp2040 with openocd
 2023-05-23 21:45:00 +07:00
hathach
7211dd18b4 more dcache fix 2023-05-19 13:42:26 +07:00
hathach
5dae5e1292 ehci fix dcache clean when control endpoint failed 2023-05-19 13:32:49 +07:00
hathach
f26a93908e only clean/invalidate dcache on imxrt if memory is not in DTCM 2023-05-19 10:56:52 +07:00
hathach
ec4bd39a92 refactor ehci: add attached_buffer for dcache invalidate for IN transfer 2023-05-18 16:41:06 +07:00
hathach
27acaa013b refactor ehci, since usbh only queue 1 TD per queue head 2023-05-18 15:44:08 +07:00
hathach
49e2aabc81 EHCI more improvement 
- more dcache clean/invalidate
- extract init_periodic_list()
- improve isr list handling
 2023-05-18 13:45:38 +07:00
hathach
a0aea52a11 more cache, fix an similar issue with OHCI when removing an queue head 2023-05-18 12:39:53 +07:00
hathach
e4f4ad5bc3 use weak local for dcache function to skip if() 2023-05-18 10:21:11 +07:00
hathach
a3e017bfd2 EHCI adding dcahe support, passing enumertaion 2023-05-18 10:04:48 +07:00
hathach
eb89df4115 adding hcd_dcache_clean/hcd_dcache_invalidate 2023-05-17 16:14:35 +07:00
hathach
a9aa0e3a1a fix error on EHCI causes xfer error in non-queued qhd which cause memory fault 2023-05-16 11:10:44 +07:00
hathach
1e998ce3bd usbd: fix control transfer issue for chipidea hs when previous status and new setup complete in the same isr frame 
change usbd edpt busy/stalled/claimed value to 0/1 instead of
(true/false) since they are 1-bit field.
 2023-05-16 11:09:23 +07:00
hathach
1c4f22a54c EHCI: fix xfer failed with disconnected device as stalled 
- change CFG_TUH_ENDPOINT_MAX to 16 (max endpoint pair per device) if
not defined
- change QHD_MAX for EHCI, should be user configurable and more
optimized in the future
 2023-05-16 11:09:22 +07:00
hathach
206d63e038 correct EHCI reporting failed xfer (instead of stalled) when device is unplugged 2023-05-16 11:09:21 +07:00
hathach
c0e4c02b9d allow imxrt build with dual exmaples 2023-05-10 11:15:11 +07:00
hathach
77f0726361 fix ehci issue with portsc when enable port power and port reset 
fix attached device not regconized if attached before power on
 2023-05-09 17:32:14 +07:00
Ha Thach
964e7ebf21 Merge pull request #2013 from tannewt/imx_1042 
Handle iMX RT 1042 usb naming
 2023-04-24 16:53:24 +07:00
Jacek Fedorynski
9bf97e3e52 [rp2040] Make writes to SIE_CTRL aware of concurrent access 
This commit makes it so that when setting the START_TRANS bit in the
SIE_CTRL register, along with some other bits, we first set all the
other bits, then wait some cycles, and then set the START_TRANS bit.

Doing so protects against a situation where the USB controller is
reading the register at the same time and gets an incorrect value.

This mirrors the procedure already applied to buffer control
registers.
 2023-04-20 20:23:31 +02:00
Mengsk
412b557a08 Cleanup unnecessary code for 16bit access. 2023-04-17 15:34:20 +02:00
HiFiPhile
818bda18c2 Fix FIFO transfer and buffer alignment. 2023-04-14 23:37:07 +02:00
HiFiPhile
2f2c8ce9ec Fix GCC build. 2023-04-14 21:00:55 +02:00
HiFiPhile
413b0a7da5 Use PLL clock. 2023-04-14 17:12:47 +02:00
HiFiPhile
cbf4b1aec8 Merge branch 'master' of https://github.com/hathach/tinyusb into pr1942 2023-04-14 13:16:52 +02:00
Scott Shawcroft
2cda9b60c9 Handle iMX RT 1042 usb naming 2023-04-06 15:45:23 -07:00
John Cronin
718bcdb8bc Add STM32L5 support - no OTG similar to some L4s 2023-04-03 13:56:16 +01:00
hathach
71fb6469d4 separate CFG_TUSB_MEM_SECTION and CFG_TUSB_MEM_ALIGN to 
- CFG_TUD_MEM_SECTION and CFG_TUD_MEM_ALIGN
- CFG_TUH_MEM_SECTION and CFG_TUH_MEM_ALIGN
- fix missing mem section and align for host
 2023-03-24 14:05:21 +07:00
hathach
4520218786 more compatible with IAR 2023-03-20 11:33:39 +07:00
hathach
1fc203b085 more update to kinetis bsp 2023-03-18 19:50:24 +07:00
hathach
2d187777c0 merge kinetis into its own family in bsp 2023-03-18 18:30:51 +07:00
Bob Paddock
f9b8a0667a Add support for NXP FRDM_K32L2A4S eval board. 2023-03-18 16:50:50 +07:00
hathach
9f54cc1eb7 more clean up 2023-03-18 11:43:47 +07:00
hathach
bdfcd50b1b Merge branch 'master' into portability 2023-03-17 23:53:38 +07:00
hathach
3623ba1884 fix trailing space and new line 
temporarily disable codespell
 2023-03-17 16:12:49 +07:00
hathach
e7d212f337 more fix 2023-03-16 23:21:15 +07:00
hathach
92aed7e3e0 rename symbols 2023-03-16 11:28:10 +07:00
hathach
bc2127b330 rename file link to rusb2 2023-03-16 11:03:53 +07:00
hathach
cd1726c009 Merge branch 'master' into renesas-ra 2023-03-16 09:51:27 +07:00
hathach
d9a9dc5ac0 fix PICO_SHARED_IRQ_HANDLER_HIGHEST_ORDER_PRIORITY not defined in old pico-sdk 2023-03-15 17:38:14 +07:00
Ha Thach
ea8ecea59a Merge pull request #1953 from tannewt/fix_cached_imx_reset 
Flush the dcd data on reset
 2023-03-14 09:08:32 +07:00
Scott Shawcroft
d31aac453e Flush the dcd data on reset 2023-03-13 15:22:00 -07:00
Hubert Denkmair
f8a21fff17 dcd_write_packet_memory: use volatile modifier for destination pointer 2023-03-12 15:51:07 +01:00
hathach
0a7c08d16e minor format 2023-03-12 16:01:24 +07:00
Ha Thach
be21413361 Merge pull request #1948 from dhalbert/remove-volatile-cast-include 
rp2040: include hardware/sync.h explicitly
 2023-03-11 09:35:04 +07:00
hathach
fe77976765 Merge branch 'master' into renesas-ra 2023-03-11 08:15:23 +07:00
Dan Halbert
4857abdc6b rp2040: include hardware/sync.h explicitly 2023-03-10 14:01:51 -05:00
Jerzy Kasenberg
f0ddf8d10f dcd_nrf5x: ISO OUT handling 
For incoming ISO OUT packets it was possible to start
DMA from endpoint to RAM before transfer was started
resulting in unrelated memory corruption.
This is scenario that causes memory corruption:
- ISO OUT packet is received
- Packet is transferred by DMA to transfer buffer
- xfer->started is cleared and xfer->buffer is updated as
  it is in every case
- Application takes to long to handle it (it happens when debugger
  is connected breakpoint is hit slowing down software).
- Next ISO OUT packet arrives
At this point there was no check if transfer was started and packet
was copied by DMA to location beyond previous data, possibly overwriting
unrelated memory.

This solves the issue by checking that transfer was
started and there is buffer ready for incoming packet.
 2023-03-10 08:22:43 +01:00